From f4167342b572c6122c712e8c6e5391808c1e5503 Mon Sep 17 00:00:00 2001 From: Andy Walls Date: Sun, 2 Nov 2008 18:54:10 -0300 Subject: [PATCH] V4L/DVB (9514): cx18: Fix PLL freq computation for debug display cx18: Fix PLL freq computation for debug display. The code to compute the PLL freq from register values was storing an intermediate 56 bit result in a 32 bit type, causing a nonsense value to be displayed. Signed-off-by: Andy Walls Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx18/cx18-av-core.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/media/video/cx18/cx18-av-core.c b/drivers/media/video/cx18/cx18-av-core.c index 5c079e35e61..518bd701d39 100644 --- a/drivers/media/video/cx18/cx18-av-core.c +++ b/drivers/media/video/cx18/cx18-av-core.c @@ -273,10 +273,9 @@ void cx18_av_std_setup(struct cx18 *cx) pll_int, pll_frac, pll_post); if (pll_post) { - int fin, fsc; - int pll = 28636363L * ((((u64)pll_int) << 25) + pll_frac); + int fin, fsc, pll; - pll >>= 25; + pll = (28636364L * ((((u64)pll_int) << 25) + pll_frac)) >> 25; pll /= pll_post; CX18_DEBUG_INFO("PLL = %d.%06d MHz\n", pll / 1000000, pll % 1000000); -- 2.46.0