From f2d0d263b51d13efe55f0aae9254b69ba2855f1c Mon Sep 17 00:00:00 2001 From: Shaohua Li Date: Thu, 23 Mar 2006 02:59:52 -0800 Subject: [PATCH] [PATCH] x86: cpuid.4 doesn't need cpu level 5 Detecting cache line using cpuid.4, cpuid level 4 is enough. Signed-off-by: Shaohua Li Cc: Dave Jones Cc: "Seth, Rohit" Cc: Andi Kleen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/i386/kernel/cpu/intel_cacheinfo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c index 36c9b370663..ce61921369e 100644 --- a/arch/i386/kernel/cpu/intel_cacheinfo.c +++ b/arch/i386/kernel/cpu/intel_cacheinfo.c @@ -174,7 +174,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c) unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */ unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */ - if (c->cpuid_level > 4) { + if (c->cpuid_level > 3) { static int is_initialized; if (is_initialized == 0) { -- 2.46.0