From 788d4433dc38549d80c3f7f3ca1982383157a65a Mon Sep 17 00:00:00 2001 From: Damien Lespiau Date: Mon, 20 Jan 2014 15:52:31 +0000 Subject: [PATCH] drm/i915: Reorder the AUX_CTL bits in descending order So it's easier to compare what we program with the documentation, not having to jump at all. Signed-off-by: Damien Lespiau Reviewed-by: Jani Nikula Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_dp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 62d60a5c1e3..cc4b85bb2a9 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -435,14 +435,14 @@ static uint32_t i9xx_get_aux_send_ctl(struct intel_dp *intel_dp, timeout = DP_AUX_CH_CTL_TIME_OUT_400us; return DP_AUX_CH_CTL_SEND_BUSY | + DP_AUX_CH_CTL_DONE | (has_aux_irq ? DP_AUX_CH_CTL_INTERRUPT : 0) | + DP_AUX_CH_CTL_TIME_OUT_ERROR | timeout | + DP_AUX_CH_CTL_RECEIVE_ERROR | (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) | - (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) | - DP_AUX_CH_CTL_DONE | - DP_AUX_CH_CTL_TIME_OUT_ERROR | - DP_AUX_CH_CTL_RECEIVE_ERROR; + (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT); } static int -- 2.46.0