From 4fd2847e9bfa592ef8f76d5ec8a5c809682c323d Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 17 Jun 2011 16:11:31 +1000 Subject: [PATCH] drm/nva3/pm: parse/reclock vdec/41a0 clocks Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nouveau_drv.h | 2 ++ drivers/gpu/drm/nouveau/nouveau_perf.c | 4 ++++ drivers/gpu/drm/nouveau/nva3_pm.c | 20 ++++++++++++++++++++ 3 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 7a88d9cb2ac..06867055181 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -449,8 +449,10 @@ struct nouveau_pm_level { u32 core; u32 memory; u32 shader; + u32 vdec; u32 unk05; u32 unk0a; + u32 unka0; u32 volt_min; /* microvolts */ u32 volt_max; diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c b/drivers/gpu/drm/nouveau/nouveau_perf.c index b0e995fdcba..b00cf4b5046 100644 --- a/drivers/gpu/drm/nouveau/nouveau_perf.c +++ b/drivers/gpu/drm/nouveau/nouveau_perf.c @@ -291,6 +291,8 @@ nouveau_perf_init(struct drm_device *dev) perflvl->core = ROM16(subent(0)) & 0xfff; perflvl->shader = ROM16(subent(1)) & 0xfff; perflvl->memory = ROM16(subent(2)) & 0xfff; + perflvl->vdec = ROM16(subent(3)) & 0xfff; + perflvl->unka0 = ROM16(subent(4)) & 0xfff; } else { perflvl->shader = ROM16(subent(3)) & 0xfff; perflvl->core = perflvl->shader / 2; @@ -302,6 +304,8 @@ nouveau_perf_init(struct drm_device *dev) perflvl->shader *= 1000; perflvl->memory *= 1000; perflvl->unk0a *= 1000; + perflvl->vdec *= 1000; + perflvl->unka0 *= 1000; break; } diff --git a/drivers/gpu/drm/nouveau/nva3_pm.c b/drivers/gpu/drm/nouveau/nva3_pm.c index 562e781c4f5..a9e3de4a952 100644 --- a/drivers/gpu/drm/nouveau/nva3_pm.c +++ b/drivers/gpu/drm/nouveau/nva3_pm.c @@ -151,6 +151,8 @@ nva3_pm_clocks_get(struct drm_device *dev, struct nouveau_pm_level *perflvl) perflvl->core = read_pll(dev, 0x4200, 0); perflvl->shader = read_pll(dev, 0x4220, 1); perflvl->memory = read_pll(dev, 0x4000, 2); + perflvl->unka0 = read_clk(dev, 0x20, false); + perflvl->vdec = read_clk(dev, 0x21, false); return 0; } @@ -158,6 +160,8 @@ struct nva3_pm_state { struct creg nclk; struct creg sclk; struct creg mclk; + struct creg vdec; + struct creg unka0; }; void * @@ -182,6 +186,14 @@ nva3_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl) if (ret < 0) goto out; + ret = calc_clk(dev, 0x0000, 0x20, perflvl->unka0, &info->unka0); + if (ret < 0) + goto out; + + ret = calc_clk(dev, 0x0000, 0x21, perflvl->vdec, &info->vdec); + if (ret < 0) + goto out; + out: if (ret < 0) { kfree(info); @@ -215,6 +227,12 @@ prog_pll(struct drm_device *dev, u32 pll, int clk, struct creg *reg) } } +static void +prog_clk(struct drm_device *dev, int clk, struct creg *reg) +{ + nv_mask(dev, 0x004120 + (clk * 4), 0x003f3141, 0x00000101 | reg->clk); +} + void nva3_pm_clocks_set(struct drm_device *dev, void *pre_state) { @@ -222,6 +240,8 @@ nva3_pm_clocks_set(struct drm_device *dev, void *pre_state) prog_pll(dev, 0x004200, 0, &info->nclk); prog_pll(dev, 0x004220, 1, &info->sclk); + prog_clk(dev, 0x20, &info->unka0); + prog_clk(dev, 0x21, &info->vdec); nv_wr32(dev, 0x100210, 0); nv_wr32(dev, 0x1002dc, 1); -- 2.41.0