From: Paulo Zanoni Date: Wed, 24 Oct 2012 13:34:43 +0000 (-0200) Subject: drm/i915: implement workaround for VTOTAL when using TRANSCODER_EDP X-Git-Tag: v3.8-rc1~82^2~192^2~118 X-Git-Url: https://openfabrics.org/gitweb/?a=commitdiff_plain;h=b5e508d4c01b4aab6abb90488603f9bcfbb64b52;p=~emulex%2Finfiniband.git drm/i915: implement workaround for VTOTAL when using TRANSCODER_EDP See the documentation for the DDI_FUNC_CTL register, EDP Input Select bits: when the EDP input selection is B, the VTOTAL_B must be programmed with the VTOTAL_EDP value, same thing for selection C. V2: Use I915_READ as suggested by Daniel Vetter. Signed-off-by: Paulo Zanoni Reviewed-by: Rodrigo Vivi Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0f3187c516c..a5be3466429 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4524,6 +4524,14 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc, (adjusted_mode->crtc_vsync_start - 1) | ((adjusted_mode->crtc_vsync_end - 1) << 16)); + /* Workaround: when the EDP input selection is B, the VTOTAL_B must be + * programmed with the VTOTAL_EDP value. Same for VTOTAL_C. This is + * documented on the DDI_FUNC_CTL register description, EDP Input Select + * bits. */ + if (IS_HASWELL(dev) && cpu_transcoder == TRANSCODER_EDP && + (pipe == PIPE_B || pipe == PIPE_C)) + I915_WRITE(VTOTAL(pipe), I915_READ(VTOTAL(cpu_transcoder))); + /* pipesrc controls the size that is scaled from, which should * always be the user's requested size. */