From: sleybo Date: Wed, 7 Feb 2007 13:16:32 +0000 (+0000) Subject: [MTHCA/VSTAT] added print of PCIE link capabilities X-Git-Url: https://openfabrics.org/gitweb/?a=commitdiff_plain;h=8b2b0f04dc19710dc2f36b43f6f48b6f790fcde5;p=~shefty%2Frdma-win.git [MTHCA/VSTAT] added print of PCIE link capabilities git-svn-id: svn://openib.tc.cornell.edu/gen1@585 ad392aa1-c5ef-ae45-8dd8-e69d62a5ef86 --- diff --git a/trunk/hw/mthca/kernel/hca_pci.c b/trunk/hw/mthca/kernel/hca_pci.c index 5b077878..7f6afeb2 100644 --- a/trunk/hw/mthca/kernel/hca_pci.c +++ b/trunk/hw/mthca/kernel/hca_pci.c @@ -672,7 +672,11 @@ hca_tune_pci( p_uplink_info->bus_type = UPLINK_BUS_PCIE; if ((pPciExpCap->LinkStatus & 15) == 1) p_uplink_info->u.pci_e.link_speed = UPLINK_BUS_PCIE_SDR; + if ((pPciExpCap->LinkStatus & 15) == 2) + p_uplink_info->u.pci_e.link_speed = UPLINK_BUS_PCIE_DDR; p_uplink_info->u.pci_e.link_width = (uint8_t)((pPciExpCap->LinkStatus >> 4) & 0x03f); + p_uplink_info->u.pci_e.capabilities = (uint8_t)((pPciExpCap->LinkCapabilities >> 2) & 0xfc); + p_uplink_info->u.pci_e.capabilities |= pPciExpCap->LinkCapabilities & 3; if (g_tune_pci) { /* Update Max_Read_Request_Size. */ diff --git a/trunk/inc/mthca/mthca_vc.h b/trunk/inc/mthca/mthca_vc.h index 7309e25f..3fdf7fff 100644 --- a/trunk/inc/mthca/mthca_vc.h +++ b/trunk/inc/mthca/mthca_vc.h @@ -64,9 +64,10 @@ typedef struct { uint16_t frequency; /* in MHz */ } pci_x; struct { - uint8_t reserve; + uint8_t capabilities; uint8_t link_speed; /* 1X link speed */ #define UPLINK_BUS_PCIE_SDR 1 /* 2.5 Gbps */ +#define UPLINK_BUS_PCIE_DDR 2 /* 5 Gbps */ uint8_t link_width; /* x1, x2, x4, x8, x12, x16, x32 */ } pci_e; } u; diff --git a/trunk/tools/vstat/user/vstat_main.c b/trunk/tools/vstat/user/vstat_main.c index 391aeea2..9e219b53 100644 --- a/trunk/tools/vstat/user/vstat_main.c +++ b/trunk/tools/vstat/user/vstat_main.c @@ -197,7 +197,7 @@ void printPortInfo(ib_port_attr_t* portPtr, BOOLEAN fullPrint){ void print_uplink_info(ib_ca_attr_t* ca_attr) { uplink_info_t*p_uplink_info = mthca_get_uplink_info(ca_attr); - char *bus_type, *link_speed; + char *bus_type, *link_speed, cap; int freq; switch (p_uplink_info->bus_type) { @@ -218,12 +218,17 @@ void print_uplink_info(ib_ca_attr_t* ca_attr) return; case UPLINK_BUS_PCIE: + cap = p_uplink_info->u.pci_e.capabilities; if (p_uplink_info->u.pci_e.link_speed == UPLINK_BUS_PCIE_SDR) link_speed = "2.5 Gbps"; + else + if (p_uplink_info->u.pci_e.link_speed == UPLINK_BUS_PCIE_DDR) + link_speed = "5.0 Gbps"; else link_speed = "unknown"; - printf("\tuplink={BUS=%s, SPEED=%s, WIDTH=x%d}\n", - bus_type, link_speed, p_uplink_info->u.pci_e.link_width ); + printf("\tuplink={BUS=%s, SPEED=%s, WIDTH=x%d, CAPS=%s*x%d}\n", + bus_type, link_speed, p_uplink_info->u.pci_e.link_width, + (cap&1) ? "2.5" : "5", cap>>2 ); return; } }