From: Linus Torvalds Date: Wed, 19 Dec 2012 00:51:10 +0000 (-0800) Subject: Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux X-Git-Url: https://openfabrics.org/gitweb/?a=commitdiff_plain;h=752451f01c4567b506bf4343082682dbb8fb30dd;p=~shefty%2Frdma-dev.git Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux Pull i2c-embedded changes from Wolfram Sang: - CBUS driver (an I2C variant) - continued rework of the omap driver - s3c2410 gets lots of fixes and gains pinctrl support - at91 gains DMA support - the GPIO muxer gains devicetree probing - typical fixes and additions all over * 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (45 commits) i2c: omap: Remove the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE flag i2c: at91: add dma support i2c: at91: change struct members indentation i2c: at91: fix compilation warning i2c: mxs: Do not disable the I2C SMBus quick mode i2c: mxs: Handle i2c DMA failure properly i2c: s3c2410: Remove recently introduced performance overheads i2c: ocores: Move grlib set/get functions into #ifdef CONFIG_OF block i2c: s3c2410: Add fix for i2c suspend/resume i2c: s3c2410: Fix code to free gpios i2c: i2c-cbus-gpio: introduce driver i2c: ocores: Add support for the GRLIB port of the controller and use function pointers for getreg and setreg functions i2c: ocores: Add irq support for sparc i2c: omap: Move the remove constraint ARM: dts: cfa10049: Add the i2c muxer buses to the CFA-10049 i2c: s3c2410: do not special case HDMIPHY stuck bus detection i2c: s3c2410: use exponential back off while polling for bus idle i2c: s3c2410: do not generate STOP for QUIRK_HDMIPHY i2c: s3c2410: grab adapter lock while changing i2c clock i2c: s3c2410: Add support for pinctrl ... --- 752451f01c4567b506bf4343082682dbb8fb30dd diff --cc Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt index b6cb5a12c67,00000000000..e9611ace879 mode 100644,000000..100644 --- a/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt @@@ -1,43 -1,0 +1,55 @@@ +* Samsung's I2C controller + +The Samsung's I2C controller is used to interface with I2C devices. + +Required properties: + - compatible: value should be either of the following. + (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c. + (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c. + (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used + inside HDMIPHY block found on several samsung SoCs + - reg: physical base address of the controller and length of memory mapped + region. + - interrupts: interrupt number to the cpu. + - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges. + ++Required for all cases except "samsung,s3c2440-hdmiphy-i2c": ++ - Samsung GPIO variant (deprecated): ++ - gpios: The order of the gpios should be the following: . ++ The gpio specifier depends on the gpio controller. Required in all ++ cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output ++ lines are permanently wired to the respective clienta ++ - Pinctrl variant (preferred, if available): ++ - pinctrl-0: Pin control group to be used for this controller. ++ - pinctrl-names: Should contain only one value - "default". ++ +Optional properties: - - gpios: The order of the gpios should be the following: . - The gpio specifier depends on the gpio controller. Required in all - cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output - lines are permanently wired to the respective client + - samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not + specified, default value is 0. + - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not + specified, the default value in Hz is 100000. + +Example: + + i2c@13870000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x13870000 0x100>; + interrupts = <345>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <100000>; ++ /* Samsung GPIO variant begins here */ + gpios = <&gpd1 2 0 /* SDA */ + &gpd1 3 0 /* SCL */>; ++ /* Samsung GPIO variant ends here */ ++ /* Pinctrl variant begins here */ ++ pinctrl-0 = <&i2c3_bus>; ++ pinctrl-names = "default"; ++ /* Pinctrl variant ends here */ + #address-cells = <1>; + #size-cells = <0>; + + wm8994@1a { + compatible = "wlf,wm8994"; + reg = <0x1a>; + }; + }; diff --cc arch/arm/mach-omap2/board-n8x0.c index a4e167c55c1,bbfd74263c4..0abb30fe399 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@@ -20,9 -21,9 +21,10 @@@ #include #include #include + #include #include #include +#include #include #include diff --cc arch/arm/mach-omap2/i2c.c index fbb9b152cd5,fc57e67b321..df6d6acbc9e --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@@ -106,62 -104,3 +106,81 @@@ int omap_i2c_reset(struct omap_hwmod *o return 0; } + +static int __init omap_i2c_nr_ports(void) +{ + int ports = 0; + + if (cpu_is_omap24xx()) + ports = 2; + else if (cpu_is_omap34xx()) + ports = 3; + else if (cpu_is_omap44xx()) + ports = 4; + return ports; +} + ++/* ++ * XXX This function is a temporary compatibility wrapper - only ++ * needed until the I2C driver can be converted to call ++ * omap_pm_set_max_dev_wakeup_lat() and handle a return code. ++ */ ++static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t) ++{ ++ omap_pm_set_max_mpu_wakeup_lat(dev, t); ++} ++ +static const char name[] = "omap_i2c"; + +int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata, + int bus_id) +{ + int l; + struct omap_hwmod *oh; + struct platform_device *pdev; + char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; + struct omap_i2c_bus_platform_data *pdata; + struct omap_i2c_dev_attr *dev_attr; + + if (bus_id > omap_i2c_nr_ports()) + return -EINVAL; + + omap2_i2c_mux_pins(bus_id); + + l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id); + WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN, + "String buffer overflow in I2C%d device setup\n", bus_id); + oh = omap_hwmod_lookup(oh_name); + if (!oh) { + pr_err("Could not look up %s\n", oh_name); + return -EEXIST; + } + + pdata = i2c_pdata; + /* + * pass the hwmod class's CPU-specific knowledge of I2C IP revision in + * use, and functionality implementation flags, up to the OMAP I2C + * driver via platform data + */ + pdata->rev = oh->class->rev; + + dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; + pdata->flags = dev_attr->flags; + ++ /* ++ * When waiting for completion of a i2c transfer, we need to ++ * set a wake up latency constraint for the MPU. This is to ++ * ensure quick enough wakeup from idle, when transfer ++ * completes. ++ * Only omap3 has support for constraints ++ */ ++ if (cpu_is_omap34xx()) ++ pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat; + pdev = omap_device_build(name, bus_id, oh, pdata, + sizeof(struct omap_i2c_bus_platform_data), + NULL, 0, 0); + WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name); + + return PTR_RET(pdev); +} +