From: Mikael Pettersson Date: Tue, 11 Sep 2007 20:28:37 +0000 (+0200) Subject: pdc202xx_new: PLL detection fix X-Git-Tag: v2.6.23-rc7~96^2 X-Git-Url: https://openfabrics.org/gitweb/?a=commitdiff_plain;h=56fe23d5a702a39ee3bb29a04b55db292479d07a;p=~shefty%2Frdma-dev.git pdc202xx_new: PLL detection fix Fix a bitmask typo in the pdc202xx_new PLL frequency detection code which causes it to truncate an intermediate difference to 26 bits instead of the correct 30 bits (the PLL's bitwidth). Signed-off-by: Mikael Pettersson Signed-off-by: Bartlomiej Zolnierkiewicz --- diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c index f74a02aba58..7b0e479c355 100644 --- a/drivers/ide/pci/pdc202xx_new.c +++ b/drivers/ide/pci/pdc202xx_new.c @@ -341,7 +341,7 @@ static long __devinit detect_pll_input_clock(unsigned long dma_base) */ usec_elapsed = (end_time.tv_sec - start_time.tv_sec) * 1000000 + (end_time.tv_usec - start_time.tv_usec); - pll_input = ((start_count - end_count) & 0x3ffffff) / 10 * + pll_input = ((start_count - end_count) & 0x3fffffff) / 10 * (10000000 / usec_elapsed); DBG("start[%ld] end[%ld]\n", start_count, end_count);