From: Chris Wilson Date: Mon, 9 Aug 2010 13:50:53 +0000 (+0100) Subject: drm/i915/crt: Flush register prior to waiting for vblank. X-Git-Tag: v2.6.37-rc1~92^2~28^2~250 X-Git-Url: https://openfabrics.org/gitweb/?a=commitdiff_plain;h=19c55da11660fea1a0f1ddbb33ecf38d4f728799;p=~emulex%2Finfiniband.git drm/i915/crt: Flush register prior to waiting for vblank. If we don't flush the write then we can not be sure that the border colour will have taken effect by the time we try to read it back. Signed-off-by: Chris Wilson --- diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index c2982e48b61..626279791b8 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -327,6 +327,7 @@ intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder if (IS_I9XX(dev)) { uint32_t pipeconf = I915_READ(pipeconf_reg); I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); + POSTING_READ(pipeconf_reg); /* Wait for next Vblank to substitue * border color for Color info */ intel_wait_for_vblank(dev, pipe);