powerpc/85xx: Rework PCI nodes on P1020RDB

* Move SoC specific details like irq mapping to SoC dtsi
* Update interrupt property to cover both error interrupt and PCIe
  runtime interrupts

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index d6a8ae4581370482d3f2b050f472a69c3facf57a..8b1a7ee5ed7b46c01788e92eca057b8bad0889db 100644 (file)
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -257,19 +257,8 @@
        pci0: pcie@ffe09000 {
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-               interrupt-map = <
-                       /* IDSEL 0x0 */
-                       0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                       0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                       0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                       0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                       >;
+               reg = <0 0xffe09000 0 0x1000>;
                pcie@0 {
-                       reg = <0x0 0x0 0x0 0x0 0x0>;
-                       #size-cells = <2>;
-                       #address-cells = <3>;
-                       device_type = "pci";
                        ranges = <0x2000000 0x0 0xa0000000
                                  0x2000000 0x0 0xa0000000
                                  0x0 0x20000000
@@ -281,21 +270,10 @@
        };
 
        pci1: pcie@ffe0a000 {
+               reg = <0 0xffe0a000 0 0x1000>;
                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-               interrupt-map = <
-                       /* IDSEL 0x0 */
-                       0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                       0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                       0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                       0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                       >;
                pcie@0 {
-                       reg = <0x0 0x0 0x0 0x0 0x0>;
-                       #size-cells = <2>;
-                       #address-cells = <3>;
-                       device_type = "pci";
                        ranges = <0x2000000 0x0 0x80000000
                                  0x2000000 0x0 0x80000000
                                  0x0 0x20000000

diff --git a/arch/powerpc/boot/dts/p1020si.dtsi b/arch/powerpc/boot/dts/p1020si.dtsi
index 5c5acb66c3fce27c83cdbef70bf81a8ff0aa6aef..58f6b30e029c3805d9e4272fad90fffacf8cbe40 100644 (file)
--- a/arch/powerpc/boot/dts/p1020si.dtsi
+++ b/arch/powerpc/boot/dts/p1020si.dtsi
@@ -352,26 +352,58 @@
        pci0: pcie@ffe09000 {
                compatible = "fsl,mpc8548-pcie";
                device_type = "pci";
-               #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0 0xffe09000 0 0x1000>;
                bus-range = <0 255>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <16 2>;
+
+               pcie@0 {
+                       reg = <0 0 0 0 0>;
+                       #interrupt-cells = <1>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       device_type = "pci";
+                       interrupts = <16 2>;
+                       interrupt-map-mask = <0xf800 0 0 7>;
+                       interrupt-map = <
+                               /* IDSEL 0x0 */
+                               0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                               0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                               0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                               0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                               >;
+               };
+
        };
 
        pci1: pcie@ffe0a000 {
                compatible = "fsl,mpc8548-pcie";
                device_type = "pci";
-               #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
-               reg = <0 0xffe0a000 0 0x1000>;
                bus-range = <0 255>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <16 2>;
+
+               pcie@0 {
+                       reg = <0 0 0 0 0>;
+                       #interrupt-cells = <1>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       device_type = "pci";
+                       interrupts = <16 2>;
+                       interrupt-map-mask = <0xf800 0 0 7>;
+
+                       interrupt-map = <
+                               /* IDSEL 0x0 */
+                               0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                               0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                               0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                               0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                               >;
+               };
        };
 };