return FLINT_FAILED;
}
}
+
+ // perform some checks incase of a corrupt CX4
+ // TODO: remove this check in MFT-4.1.0
+ if(_burnParams.burnFailsafe) {
+ if (!_fwOps->CheckCX4Device()) {
+ printf(" An inconsistency was detected in the device parameters. A fix must be performed before burning FW.\n");
+ printf(" Please do not terminate the process. Operation is not failsafe.\n");
+ if (!askUser()) {
+ return FLINT_FAILED;
+ }
+ }
+ }
if (!_fwOps->FwBurnAdvanced(_imgOps, _burnParams)) {
reportErr(true, FLINT_FS3_BURN_ERROR, _fwOps->err());
return FLINT_FAILED;
}
if (fw_sector_size != NULL) {
- *fw_sector_size = mfpa.sector_size ? ((1 << mfpa.sector_size) * 1024) : 0; // 2^log2_sector_size_in_kb * 1k
+ if (mfpa.sector_size) {
+ *fw_sector_size = 1 << mfpa.sector_size; // 2^log2_sector_size_in_KB
+ // Hack: some CX3 FW has this number in KB, possible values : 4 or 64
+ if (*fw_sector_size == 4 || *fw_sector_size == 64 ) {
+ *fw_sector_size *= 1024;
+ }
+ } else {
+ *fw_sector_size = 0;
+ }
}
return MFE_OK;
if (_mf) {
mclose(_mf);
}
- for(vector<CfgParams*>::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) {
- delete *it;
+ for(map<mlxCfgType, CfgParams*>::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) {
+ delete it->second;
}
return;
}
}
// update cfg specific info.
- for (int i = Mct_Sriov; i < Mct_Last; i++) {
- _cfgList[i]->setDevCapVec(_suppVec);
- if (_cfgList[i]->cfgSupported(_mf)) {
- ret = _cfgList[i]->getDefaultParams(_mf);
+ for (std::map<mlxCfgType, CfgParams*>::iterator paramIt = _cfgList.begin(); paramIt != _cfgList.end(); paramIt++) {
+ paramIt->second->setDevCapVec(_suppVec);
+ if (paramIt->second->cfgSupported(_mf)) {
+ ret = paramIt->second->getDefaultParams(_mf);
if (ret && ret!= MCE_GET_DEFAULT_PARAMS && ret != MCE_NOT_IMPLEMENTED) {
return ret;
}
}
// init _cfgList
- _cfgList.resize(Mct_Last);
if (_isFifthGen) {
- _cfgList[Mct_Sriov] = new SriovParams5thGen();
- _cfgList[Mct_Wol_P1] = new WolParams5thGen(1);
- _cfgList[Mct_Wol_P2] = new WolParams5thGen(2);
- _cfgList[Mct_Vpi_P1] = new VpiParams5thGen(1);
- _cfgList[Mct_Vpi_P2] = new VpiParams5thGen(2);
+ _cfgList[Mct_Sriov] = new SriovParams5thGen();
+ _cfgList[Mct_Wol_P1] = new WolParams5thGen(1);
+ _cfgList[Mct_Wol_P2] = new WolParams5thGen(2);
+ _cfgList[Mct_Vpi_P1] = new VpiParams5thGen(1);
+ _cfgList[Mct_Vpi_P2] = new VpiParams5thGen(2);
_cfgList[Mct_Bar_Size] = new BarSzParams5thGen();
+ _cfgList[Mct_Pci] = new PciParams5thGen();
} else {
- _cfgList[Mct_Sriov] = new SriovParams4thGen();
- _cfgList[Mct_Wol_P1] = new WolParams4thGen(1);
- _cfgList[Mct_Wol_P2] = new WolParams4thGen(2);
- _cfgList[Mct_Vpi_P1] = new VpiParams4thGen(1);
- _cfgList[Mct_Vpi_P2] = new VpiParams4thGen(2);
+ _cfgList[Mct_Sriov] = new SriovParams4thGen();
+ _cfgList[Mct_Wol_P1] = new WolParams4thGen(1);
+ _cfgList[Mct_Wol_P2] = new WolParams4thGen(2);
+ _cfgList[Mct_Vpi_P1] = new VpiParams4thGen(1);
+ _cfgList[Mct_Vpi_P2] = new VpiParams4thGen(2);
_cfgList[Mct_Bar_Size] = new BarSzParams4thGen();
}
void MlxCfgOps::setIgnoreSoftLimits(bool val)
{
- for(std::vector<CfgParams*>::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) {
- (*it)->setIgnoreSoftLimits(val);
+ for(std::map<mlxCfgType, CfgParams*>::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) {
+ it->second->setIgnoreSoftLimits(val);
}
return;
}
void MlxCfgOps::setIgnoreHardLimits(bool val)
{
- for(std::vector<CfgParams*>::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) {
- (*it)->setIgnoreHardLimits(val);
+ for(std::map<mlxCfgType, CfgParams*>::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) {
+ it->second->setIgnoreHardLimits(val);
}
return;
}
bool MlxCfgOps::isLegal(mlxCfgType cfg)
{
- if (cfg >= Mct_Sriov && cfg < Mct_Last) {
+ if (_cfgList.find(cfg) != _cfgList.end()) {
return true;
}
errmsg("illegal configuration");
}
+const char* MlxCfgOps::loadConfigurationGetStr()
+{
+ int rc;
+ struct cibfw_register_mfrl mfrl;
+ memset(&mfrl, 0, sizeof(mfrl));
+ if (_isFifthGen && _deviceId == DeviceConnectX4) {
+ // send warm boot (bit 6)
+ mfrl.reset_level = 1 << 6;
+ rc = reg_access_mfrl(_mf,REG_ACCESS_METHOD_SET, &mfrl);
+ if (rc) {
+ return "Please power cycle machine to load new configurations.";
+ }
+ }
+ return "Please reboot machine to load new configurations.";
+}
+
mlxCfgType MlxCfgOps::cfgParam2Type(mlxCfgParam param)
{
switch (param) {
case Mcp_Sriov_En :
- return Mct_Sriov;
+ return _isFifthGen ? Mct_Pci :Mct_Sriov;
case Mcp_Num_Of_Vfs :
- return Mct_Sriov;
+ return _isFifthGen ? Mct_Pci : Mct_Sriov;
+ case Mcp_Fpp_En:
+ return _isFifthGen ? Mct_Pci : Mct_Last;
case Mcp_Wol_Magic_En_P1 :
return Mct_Wol_P1;
case Mcp_Wol_Magic_En_P2 :
// Set/Un-Set Ignore limits per configuration
// Adrianc: TBD
+ const char* loadConfigurationGetStr();
+
private:
int openComChk();
int supportsToolsHCR();
int invalidateCfgs4thGen();
int invalidateCfgs5thGen();
- static mlxCfgType cfgParam2Type(mlxCfgParam param);
- std::vector<CfgParams*> _cfgList; // needs to be initialized in constructor and freed in destructor, will contain all the tools supported cfgs
+ mlxCfgType cfgParam2Type(mlxCfgParam param);
+ std::map<mlxCfgType, CfgParams*> _cfgList; // needs to be initialized in constructor and freed in destructor, will contain all the tools supported cfgs
dm_dev_id_t _deviceId;
mfile* _mf;
u_int64_t _suppVec;
return;
}
+/*
+ * Adrianc: TODO: create a SetTlv class and two child classess , for 4th/5th gen.
+ * each param class will have an instance of SetTlv class
+ */
+
MError mnvaCom4thGen(mfile* mf, u_int8_t* buff, u_int16_t len, u_int16_t tlvTypeIdx, reg_access_method_t method, u_int16_t typeMod)
{
struct tools_open_mnva mnvaTlv;
errmsg("illegal VPI link type (should be 1|2).");
return false;
}
+
+/*
+ * PciParams5thGen Class implementation:
+ */
+
+// Adrianc: atm we check only for SRIOV support.
+// need to add mechanism to check support for a specific parameter.
+bool PciParams5thGen::cfgSupported(mfile* mf)
+{
+ MError rc;
+ bool suppRead, suppWrite;
+ rc = nvqcCom5thGen(mf, getPciCapabilitiesTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get PCI capabilities parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ if (!suppRead) {
+ return false;
+ }
+
+ if (getDefaultsAndCapabilities(mf) != MCE_SUCCESS) {
+ return false;
+ }
+
+ if (!_sriovSupported && !_fppSupported) {
+ return false;
+ }
+
+ rc = nvqcCom5thGen(mf, getPciSettingsTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get PCI settings parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ return suppRead&suppWrite;
+}
+
+void PciParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ if (paramType == Mcp_Sriov_En) {
+ _sriovEn = val;
+ } else if (paramType == Mcp_Num_Of_Vfs) {
+ _numOfVfs = val;
+ } else if (paramType == Mcp_Fpp_En) {
+ _fppEn = val;
+ }
+}
+
+u_int32_t PciParams5thGen::getParam(mlxCfgParam paramType)
+{
+ if (paramType == Mcp_Sriov_En) {
+ return _sriovEn;
+ } else if (paramType == Mcp_Num_Of_Vfs) {
+ return _numOfVfs;
+ } else if (paramType == Mcp_Fpp_En) {
+ return _fppEn;
+ }
+
+ return MLXCFG_UNKNOWN;
+}
+
+int PciParams5thGen::getFromDev(mfile* mf)
+{
+ MError mRc;
+ u_int8_t tlvBuff[TOOLS_OPEN_PCI_CONFIGURATION_SIZE] = {0};
+ struct tools_open_pci_configuration pciSettingsTlv;
+ memset(&pciSettingsTlv, 0, sizeof(pciSettingsTlv));
+
+ if (_updated) {
+ return MCE_SUCCESS;
+ }
+
+ mRc = mnvaCom5thGen(mf, &tlvBuff[0], TOOLS_OPEN_PCI_CONFIGURATION_SIZE, getPciSettingsTlvTypeBe(), REG_ACCESS_METHOD_GET);
+
+ if (mRc) {
+ if (mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {
+ return MCE_SUCCESS;
+ }
+ return errmsg("Failed to get PCI configuration: %s", m_err2str(mRc));
+ }
+ // unpack and update
+ tools_open_pci_configuration_unpack(&pciSettingsTlv, &tlvBuff[0]);
+ if (pciSettingsTlv.sriov_valid) {
+ _sriovEn = pciSettingsTlv.sriov_en;
+ _numOfVfs = pciSettingsTlv.total_vfs;
+ _updated = true;
+ }
+ if (pciSettingsTlv.fpp_valid) {
+ _fppEn = pciSettingsTlv.fpp_en;
+ _updated = true;
+ }
+ return MCE_SUCCESS;
+}
+
+int PciParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
+{
+ MError mRc;
+
+ if (_fppEn == MLXCFG_UNKNOWN && (_sriovEn == MLXCFG_UNKNOWN || _numOfVfs == MLXCFG_UNKNOWN)) {
+ return errmsg("%s please specify all the parameters for SRIOV settings.", err() ? err() : "");
+ }
+
+ if (!ignoreCheck && !checkCfg()) {
+ return MCE_BAD_PARAMS;
+ }
+ // get Tlv modify it and set it
+ u_int8_t tlvBuff[TOOLS_OPEN_PCI_CONFIGURATION_SIZE] = {0};
+ struct tools_open_pci_configuration pciSettingsTlv;
+ memset(&pciSettingsTlv, 0, sizeof(pciSettingsTlv));
+
+ mRc = mnvaCom5thGen(mf, tlvBuff, TOOLS_OPEN_PCI_CONFIGURATION_SIZE, getPciSettingsTlvTypeBe(), REG_ACCESS_METHOD_GET);
+ if (mRc && mRc != ME_REG_ACCESS_RES_NOT_AVLBL) {
+ return errmsg("failed to set PCI settings: %s", m_err2str(mRc));
+ }
+ tools_open_pci_configuration_unpack(&pciSettingsTlv, tlvBuff);
+
+ if (_sriovSupported) {
+ pciSettingsTlv.sriov_valid = 1;
+ pciSettingsTlv.sriov_en = _sriovEn;
+ pciSettingsTlv.total_vfs = _numOfVfs;
+ } else if (pciSettingsTlv.sriov_valid && pciSettingsTlv.sriov_en != _sriovEn) {
+ return errmsg("SRIOV_EN is not configurable!");
+ }
+ if (_fppSupported) {
+ pciSettingsTlv.fpp_en = _fppEn;
+ pciSettingsTlv.fpp_valid = 1;
+ } else if (pciSettingsTlv.fpp_valid && pciSettingsTlv.fpp_en != _fppEn) {
+ return errmsg("FPP_EN is not configurable!");
+ }
+
+ if (pciSettingsTlv.sriov_en && !pciSettingsTlv.fpp_en) {
+ return errmsg("FPP should be enabled while SRIOV is enabled");
+ }
+ /* Turning on FPP where num of PFs < 2 in devices with dual ports (max pfs > 1)
+ * should apply numOfPfs to 2 */
+ if (pciSettingsTlv.fpp_en && _numPfsSupported && (_maxNumPfs > 1) && (pciSettingsTlv.num_pfs < 2)) {
+ pciSettingsTlv.num_pfs = 2;
+ }
+ // pack it
+ tools_open_pci_configuration_pack(&pciSettingsTlv, tlvBuff);
+
+ mRc = mnvaCom5thGen(mf, tlvBuff, TOOLS_OPEN_PCI_CONFIGURATION_SIZE, getPciSettingsTlvTypeBe(), REG_ACCESS_METHOD_SET);
+
+ if (mRc) {
+ return errmsg("failed to set PCI settings: %s", m_err2str(mRc));
+ }
+ _updated = false;
+
+ return MCE_SUCCESS;
+}
+
+int PciParams5thGen::getDefaultParams(mfile* mf)
+{
+ return getDefaultsAndCapabilities(mf);
+}
+
+int PciParams5thGen::getDefaultsAndCapabilities(mfile* mf)
+{
+ MError rc;
+ u_int8_t tlvBuff[TOOLS_OPEN_PCI_CAPABILITIES_SIZE] = {0};
+ struct tools_open_pci_capabilities pciCapabilitesTlv;
+ memset(&pciCapabilitesTlv, 0, sizeof(pciCapabilitesTlv));
+ rc = mnvaCom5thGen(mf, &tlvBuff[0], TOOLS_OPEN_PCI_CAPABILITIES_SIZE, getPciCapabilitiesTlvTypeBe(), REG_ACCESS_METHOD_GET);
+ if (rc) {
+ return errmsg("Failed to get PCI capabilities parameter. %s", m_err2str(rc));
+ }
+ tools_open_pci_capabilities_unpack(&pciCapabilitesTlv, tlvBuff);
+ _sriovSupported = pciCapabilitesTlv.sriov_support;
+ _maxVfsPerPf = pciCapabilitesTlv.max_vfs_per_pf_valid ? pciCapabilitesTlv.max_vfs_per_pf : 0;
+ _fppSupported = pciCapabilitesTlv.fpp_support;
+ _numPfsSupported = pciCapabilitesTlv.num_pfs_supported;
+ _maxNumPfs = pciCapabilitesTlv.max_num_pfs;
+
+ return MCE_SUCCESS;
+}
+
+u_int32_t PciParams5thGen::getPciSettingsTlvTypeBe()
+{
+ struct tools_open_global_type type;
+ u_int32_t tlvType = 0;
+
+ type.param_class = CLASS_GLOBAL;
+ type.param_idx = tlvTypeIdx;
+ tools_open_global_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+u_int32_t PciParams5thGen::getPciCapabilitiesTlvTypeBe()
+{
+ struct tools_open_global_type type;
+ u_int32_t tlvType = 0;
+
+ type.param_class = CLASS_GLOBAL;
+ type.param_idx = PCI_CAPABILITES_TYPE;
+ tools_open_global_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+bool PciParams5thGen::hardLimitCheck()
+{
+ if ((_numOfVfs > _maxVfsPerPf)) {
+ errmsg("Number of VFs exceeds limit (%d).", _maxVfsPerPf);
+ return false;
+ }
+
+ if (_sriovEn != 0 && _sriovEn != 1) {
+ errmsg("Illegal SRIOV_EN parameters value. (should be 0 or 1)");
+ return false;
+ }
+
+ if (_fppEn != 0 && _fppEn != 1) {
+ errmsg("Illegal FPP_EN parameters value. (should be 0 or 1)");
+ return false;
+ }
+
+
+ return true;
+}
#define SRIOV_TYPE 0x11
#define VPI_TYPE 0x12
#define BAR_SIZE_TYPE 0x13
+#define PCI_SETTINGS_TYPE 0x80
+#define PCI_CAPABILITES_TYPE 0x81
typedef enum {
Mct_Vpi_P1,
Mct_Vpi_P2,
Mct_Bar_Size,
+ Mct_Pci,
Mct_Last
} mlxCfgType;
typedef enum {
Mcp_Sriov_En = 0,
Mcp_Num_Of_Vfs,
+ Mcp_Fpp_En,
Mcp_Wol_Magic_En_P1,
Mcp_Wol_Magic_En_P2,
Mcp_Link_Type_P1,
* Basic Param Class
*/
+/* Adrianc: add Initialize/Open pure method that will contain all needed initializations (configuration supported defaults capabilities etc...)
+ * add cfgSupported(mfile* mf, mlxCfgParam param) = 0; to suppot "sub-configuraion" of a specific Parameter
+*/
+
class CfgParams : public ErrMsg
{
public:
virtual int getDefaultBarSz(mfile* mf);
};
+/*
+ * PCI parameters Class (5thGen devices only)
+ */
+
+class PciParams5thGen : public CfgParams
+{
+public:
+ PciParams5thGen() : CfgParams(Mct_Pci, PCI_SETTINGS_TYPE) , _sriovEn(MLXCFG_UNKNOWN), _numOfVfs(MLXCFG_UNKNOWN),\
+ _fppEn(MLXCFG_UNKNOWN), _sriovSupported(false), _maxVfsPerPf(0), _fppSupported(false),\
+ _numPfsSupported(false), _maxNumPfs(0){}
+ ~PciParams5thGen() {};
+
+ virtual bool cfgSupported(mfile* mf);
+
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
+ virtual int getFromDev(mfile* mf);
+ virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
+ virtual int getDefaultParams(mfile* mf);
+
+protected:
+ virtual bool hardLimitCheck();
+ int getDefaultsAndCapabilities(mfile* mf);
+ u_int32_t getPciSettingsTlvTypeBe();
+ u_int32_t getPciCapabilitiesTlvTypeBe();
+
+ u_int32_t _sriovEn;
+ u_int32_t _numOfVfs;
+ u_int32_t _fppEn;
+
+ // defaults and capabilities
+ bool _sriovSupported;
+ u_int32_t _maxVfsPerPf;
+ bool _fppSupported;
+ bool _numPfsSupported;
+ u_int32_t _maxNumPfs;
+
+};
+
#endif /* MLXCFG_PARAM_LIB_H_ */
// print supported commands
printf("\n");
printf(IDENT"Supported Configurations:\n");
- printf(IDENT2"%-24s : %s\n","SRIOV", "SRIOV_EN=<1|0> NUM_OF_VFS=<NUM>");
+ printf(IDENT2"%-24s : %s\n","SRIOV", "SRIOV_EN=<1|0> NUM_OF_VFS=<NUM> | FPP_EN=<1|0> for ConnectIB and newer devices.");
printf(IDENT2"%-24s : %s\n","WOL_PORT1", "WOL_MAGIC_EN_P1");
printf(IDENT2"%-24s : %s\n","WOL_PORT2", "WOL_MAGIC_EN_P2=<1|0>");
printf(IDENT2"%-24s : %s\n","VPI_SETTINGS_PORT1", "LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense).");
printf("\n");
printf(IDENT"Supported devices:\n");
printf(IDENT2"ConnectX3, ConnectX3-Pro (FW 2.31.5000 and above).\n");
- printf(IDENT2"ConnectX4.\n");
+ printf(IDENT2"ConnectIB, ConnectX4.\n");
printf("\n");
}
#define NO_DEV_ERR "No devices found, mst might be stopped. You may need to run 'mst start' to load MST modules. "
#endif
-std::string MlxCfgParams::param2str[Mcp_Last]= {"SRIOV_EN", "NUM_OF_VFS", "WOL_MAGIC_EN_P1", "WOL_MAGIC_EN_P2",\
+std::string MlxCfgParams::param2str[Mcp_Last]= {"SRIOV_EN", "NUM_OF_VFS", "FPP_EN", "WOL_MAGIC_EN_P1", "WOL_MAGIC_EN_P2",\
"LINK_TYPE_P1", "LINK_TYPE_P2", "LOG_BAR_SIZE"};
u_int32_t MlxCfgParams::getParamVal(mlxCfgParam p)
}
printf("Done!\n");
- printf("-I- Please reboot machine to load new configurations.\n");
+ const char* resetStr = ops.loadConfigurationGetStr();
+ printf("-I- %s\n", resetStr);
return MLX_CFG_OK;
}
if (rc) {
return err(false, "failed to reset configurations. %s", ops.err());
}
-
+ ops.loadConfigurationGetStr();
return MLX_CFG_OK;
}
virtual bool FwDeleteRom(bool ignoreProdIdCheck, ProgressCallBack progressFunc=(ProgressCallBack)NULL);
// virtual bool FwSetGuids(std::vector<guid_t>& userGuids, std::vector<guid_t>& userMacs, bool updateCrc=true, PrintCallBack callBackFunc=(PrintCallBack)NULL);
- virtual bool FwSetGuids(sg_params_t& sgParam, PrintCallBack callBackFunc, ProgressCallBack progressFunc);
+ virtual bool FwSetGuids(sg_params_t& sgParam, PrintCallBack callBackFunc=(PrintCallBack)NULL, ProgressCallBack progressFunc=(ProgressCallBack)NULL);
virtual bool FwSetMFG(fs3_uid_t baseGuid, PrintCallBack callBackFunc=(PrintCallBack)NULL);
virtual bool FwSetMFG(guid_t baseGuid, PrintCallBack callBackFunc=(PrintCallBack)NULL);
#include <vector>
#include <tools_utils.h>
+#include <bit_slice.h>
#include <mtcr.h>
#include <reg_access/reg_access.h>
#define FS3_DFLT_GUID_NUM_TO_ALLOCATE 8
#define FS3_DFLT_GUID_STEP 1
+// FW Binary version
+
+// max supported major version
+#define FS3_MAX_BIN_VER_MAJOR 1
+
+// min supported version
+#define FS3_MIN_BIN_VER_MAJOR 1
+#define FS3_MIN_BIN_VER_MINOR 1
+
const u_int32_t Fs3Operations::_itocSignature[4] = {
ITOC_ASCII, // Ascii of "MTFW"
TOC_RAND1, // Random data
#define CHECK_IMAGE_INFO_VERSION(major)\
((major) == 0)
+#define FAIL_NO_OCR(str) do { \
+ if (_fwParams.ignoreCacheRep == 0) {\
+ return errmsg("-ocr flag must be specified for %s operation.", str);\
+ }\
+ } while (0)
+
bool Fs3Operations::GetImageInfo(u_int8_t *buff)
{
struct cibfw_image_info image_info;
return true;
}
+bool Fs3Operations::CheckBinVersion(u_int8_t binVerMajor, u_int8_t binVerMinor)
+{
+ if (binVerMajor == 0 && binVerMinor == 0) {
+ return true;
+ }
+
+ if (binVerMajor > FS3_MAX_BIN_VER_MAJOR) {
+ return errmsg("Unsupported binary version (%d.%d) please update to latest MFT package", binVerMajor, binVerMinor);
+ }
+
+ if (binVerMajor < FS3_MIN_BIN_VER_MAJOR || (binVerMajor == FS3_MIN_BIN_VER_MAJOR && binVerMinor < FS3_MIN_BIN_VER_MINOR)) {
+ return errmsg("Unsupported binary version (%d.%d) minimal supported version (%d.%d)", \
+ binVerMajor, binVerMinor, FS3_MIN_BIN_VER_MAJOR, FS3_MIN_BIN_VER_MINOR);
+ }
+
+ return true;
+}
+
bool Fs3Operations::Fs3Verify(VerifyCallBack verifyCallBackFunc, bool show_itoc, struct QueryOptions queryOptions)
{
u_int32_t cntx_image_start[CNTX_START_POS_SIZE];
u_int32_t cntx_image_num;
u_int32_t buff[FS3_BOOT_START_IN_DW];
u_int32_t offset;
+ u_int8_t binVerMajor = 0, binVerMinor = 0;
bool bad_signature;
CntxFindAllImageStart(_ioAccess, cntx_image_start, &cntx_image_num);
READBUF((*_ioAccess), image_start, buff, FS3_BOOT_START, "Image header");
Fs3UpdateImgCache((u_int8_t*)buff, 0, FS3_BOOT_START);
TOCPUn(buff, FS3_BOOT_START_IN_DW);
- _maxImgLog2Size = ((u_int8_t*)buff)[FS3_LOG2_CHUNK_SIZE_BYTE_OFFSET] ? ((u_int8_t*)buff)[FS3_LOG2_CHUNK_SIZE_BYTE_OFFSET] : FS3_LOG_CHUNK_SIZE;
+ _maxImgLog2Size = EXTRACT(buff[FS3_LOG2_CHUNK_SIZE_DW_OFFSET],16,8) ? EXTRACT(buff[FS3_LOG2_CHUNK_SIZE_DW_OFFSET],16,8) : FS3_LOG_CHUNK_SIZE;
+ binVerMajor = EXTRACT(buff[FS3_LOG2_CHUNK_SIZE_DW_OFFSET], 8, 8);
+ binVerMinor = EXTRACT(buff[FS3_LOG2_CHUNK_SIZE_DW_OFFSET], 0, 8);
+ // check if binary version is supported by the tool
+ if (!CheckBinVersion(binVerMajor, binVerMinor)) {
+ return false;
+ }
// Put info
_fwImgInfo.imgStart = image_start;
// read the chunk size from the image header
return true;
}
+bool Fs3Operations::DevDataHackCheck(struct cibfw_itoc_entry *devTocEntry)
+{
+ if (_fwImgInfo.ext_info.chip_type != CT_CONNECT_IB) {
+ return false;
+ }
+ switch(devTocEntry->type) {
+ case FS3_NV_DATA2 :
+ case FS3_FW_NV_LOG :
+ case FS3_NV_DATA0 :
+ if (devTocEntry->device_data == 0 && devTocEntry->no_crc == 0 && devTocEntry->relative_addr == 1) {
+ return true;
+ }
+ break;
+ default :
+ break;
+ }
+ return false;
+}
+
+#define GET_DIFFER_STR(flash_toc_entry, image_toc_entry) \
+ (flash_toc_entry->device_data != image_toc_entry->device_data) ? "device_data" : \
+ (flash_toc_entry->no_crc != image_toc_entry->no_crc) ? "no_crc" : \
+ (flash_toc_entry->relative_addr != image_toc_entry->relative_addr) ? "relative_addr" : ""
-bool Fs3Operations::UpdateDevDataITOC(u_int8_t *image_data, struct toc_info *image_toc_entry, struct toc_info *flash_toc_arr, int flash_toc_size)
+bool Fs3Operations::UpdateDevDataITOC(u_int8_t *image_data, struct toc_info *image_toc_info_entry, struct toc_info *flash_toc_arr, int flash_toc_size)
{
u_int8_t itoc_data[CIBFW_ITOC_ENTRY_SIZE];
+ struct cibfw_itoc_entry *image_toc_entry = &image_toc_info_entry->toc_entry;
for (int i = 0; i < flash_toc_size; i++) {
struct toc_info *flash_toc_info = &flash_toc_arr[i];
struct cibfw_itoc_entry *flash_toc_entry = &flash_toc_info->toc_entry;
- if (flash_toc_entry->type == image_toc_entry->toc_entry.type) {
+ if (flash_toc_entry->type == image_toc_entry->type) {
+ // sanity checks on itoc entry
+ if ( (flash_toc_entry->device_data != image_toc_entry->device_data) || \
+ (flash_toc_entry->no_crc != image_toc_entry->no_crc) || \
+ (flash_toc_entry->relative_addr != image_toc_entry->relative_addr)) {
+ /* HACK: adrianc:remove at MFT-4.1.0
+ * if we encounter NV_DATA0/NV_DATA1/FW_NV_LOG that are marked in the device as non dev data
+ * it means a corrupt binary was burnt on device. take those entries from the image
+ */
+ if (DevDataHackCheck(flash_toc_entry)) {
+ // perform HACK : i.e keep itoc entry as is in the image
+ continue;
+ } else {
+ return errmsg("An inconsistency was found in %s section attributes. %s ITOC attribute differs",\
+ GetSectionNameByType(image_toc_entry->type), GET_DIFFER_STR(flash_toc_entry, image_toc_entry));
+ }
+ }
+ // replace itoc entry in the image
memset(itoc_data, 0, CIBFW_ITOC_ENTRY_SIZE);
cibfw_itoc_entry_pack(flash_toc_entry, itoc_data);
- memcpy(&image_data[image_toc_entry->entry_addr], itoc_data, CIBFW_ITOC_ENTRY_SIZE);
- cibfw_itoc_entry_unpack(&image_toc_entry->toc_entry, &image_data[image_toc_entry->entry_addr]);
+ memcpy(&image_data[image_toc_info_entry->entry_addr], itoc_data, CIBFW_ITOC_ENTRY_SIZE);
+ cibfw_itoc_entry_unpack(&image_toc_info_entry->toc_entry, &image_data[image_toc_info_entry->entry_addr]);
}
}
return true;
}
}
}
-
+ // sanity check on the image itoc array
+ if (!imageOps.CheckItocArray()) {
+ return errmsg("%s", imageOps.err());
+ }
//find total image size that will be written
for (int i = 0; i < imageOps._fs3ImgInfo.numOfItocs; i++) {
struct toc_info *itoc_info_p = &imageOps._fs3ImgInfo.tocArr[i];
if (boot_address_was_updated == false) {
report_warn("Failed to update FW boot address. Power cycle the device in order to load the new FW.\n");
}
-
return true;
}
bool Fs3Operations::Fs3Burn(Fs3Operations &imageOps, ExtBurnParams& burnParams)
return false;
}
+ // TODO: adrianc: remove this in MFT-4.1.0
+ if(burnParams.burnFailsafe) {
+ if(!CheckAndFixCX4(false)) {
+ return false;
+ }
+ if(!FixCX4WriteProtection(false)) {
+ return false;
+ }
+ }
+
if (burnParams.burnFailsafe) {
// Check image and device chunk sizes are Ok
if (_fwImgInfo.cntxLog2ChunkSize != imageOps._fwImgInfo.cntxLog2ChunkSize) {
imgToBurn->FwCleanUp();
delete imgToBurn;
}
- return rc;
+
+ return rc ;
}
bool Fs3Operations::FwBurn(FwOperations *imageOps, u_int8_t forceVersion, ProgressCallBack progressFunc)
if (baseGuid.base_mac_specified && !CheckMac(baseGuid.base_mac)) {
return errmsg("Bad MAC (" MAC_FORMAT ") given: %s. Please specify a valid MAC value", baseGuid.base_mac.h, baseGuid.base_mac.l, err());
}
-
+ FAIL_NO_OCR("set manufacture GUIDs/MACs");
if (!Fs3UpdateSection(&baseGuid, FS3_MFG_INFO, false, CMD_SET_MFG_GUIDS, callBackFunc)) {
return false;
}
bool Fs3Operations::FwSetMFG(guid_t baseGuid, PrintCallBack callBackFunc)
{
- // in FS3 default behavior when setting GUIDs / MFG is to assign 8 guids per port with step size of 1 between them.
+ // in FS3 default behavior when setting GUIDs / MFG is to assign ini default step size and number.
fs3_uid_t bGuid = {baseGuid, 1, {0, 0}, 0, 0, 0, 1};
return FwSetMFG(bGuid, callBackFunc);
}
if (!usrGuid.base_guid_specified && !usrGuid.base_mac_specified) {
return errmsg("base GUID/MAC were not specified.");
}
- if (!Fs3UpdateSection(&usrGuid, FS3_DEV_INFO, true, CMD_SET_GUIDS, callBackFunc)) {
+ FAIL_NO_OCR("set GUIDs/MACs");
+ if (!Fs3UpdateSection(&usrGuid, FS3_DEV_INFO, false, CMD_SET_GUIDS, callBackFunc)) {
return false;
}
// on image verify that image is OK after modification (we skip this on device for performance reasons)
if (!vpdFileStr) {
return errmsg("Please specify a valid vpd file.");
}
+ FAIL_NO_OCR("set VPD");
if (!Fs3UpdateSection(vpdFileStr, FS3_VPD_R0, false, CMD_BURN_VPD, callBackFunc)) {
return false;
if (strlen(vsdStr) > VSD_LEN) {
return errmsg("VSD string is too long(%d), max allowed length: %d", (int)strlen(vsdStr), (int)VSD_LEN);
}
-
- if (!Fs3UpdateSection(vsdStr, FS3_DEV_INFO, true, CMD_SET_VSD, printFunc)) {
+ FAIL_NO_OCR("set VSD");
+ if (!Fs3UpdateSection(vsdStr, FS3_DEV_INFO, false, CMD_SET_VSD, printFunc)) {
return false;
}
// on image verify that image is OK after modification (we skip this on device for performance reasons)
u_int32_t Fs3Operations::getAbsAddr(toc_info* toc) {
if (toc->toc_entry.relative_addr) {
- return ((toc ->toc_entry.flash_addr << 2) + _fwImgInfo.imgStart);
+ return ((toc->toc_entry.flash_addr << 2) + _fwImgInfo.imgStart);
}
- return toc ->toc_entry.flash_addr << 2;
+ return toc->toc_entry.flash_addr << 2;
+}
+
+u_int32_t Fs3Operations::getAbsAddr(toc_info* toc, u_int32_t imgStart) {
+ if (toc->toc_entry.relative_addr) {
+ return ((toc->toc_entry.flash_addr << 2) + imgStart);
+ }
+ return toc->toc_entry.flash_addr << 2;
}
//get the last fw section address (i.e the maximal address + size of the fw section)
bool Fs3Operations::TocComp::operator() (toc_info* elem1, toc_info* elem2)
{
- u_int32_t absAddr1 = elem1->toc_entry.relative_addr ? elem1->toc_entry.flash_addr + _startAdd : elem1->toc_entry.flash_addr;
- u_int32_t absAddr2 = elem2->toc_entry.relative_addr ? elem2->toc_entry.flash_addr + _startAdd : elem2->toc_entry.flash_addr;
+ u_int32_t absAddr1 = (elem1->toc_entry.flash_addr << 2) + ( elem1->toc_entry.relative_addr ? _startAdd : 0);
+ u_int32_t absAddr2 = (elem2->toc_entry.flash_addr << 2) + ( elem2->toc_entry.relative_addr ? _startAdd : 0);
if (absAddr1 < absAddr2) {
return true;
}
return true;
}
+
+bool Fs3Operations::CheckItocArrConsistency(std::vector<struct toc_info*>& sortedTocVec, u_int32_t imageStartAddr) {
+ u_int32_t sectEndAddr = 0, nextSectStrtAddr = 0;
+ std::vector<struct toc_info*>::iterator it = sortedTocVec.begin(), itNext = sortedTocVec.begin();
+ itNext++;
+ for ( ; itNext != sortedTocVec.end(); it++, itNext++) {
+ sectEndAddr = getAbsAddr(*it, imageStartAddr) + ((*it)->toc_entry.size << 2) - 1;
+ nextSectStrtAddr = getAbsAddr(*itNext, imageStartAddr);
+ if (sectEndAddr >= nextSectStrtAddr) {
+ return errmsg("inconsistency found in ITOC. %s(0x%x) section will potentially overwrite %s(0x%x) section.",\
+ GetSectionNameByType((*it)->toc_entry.type), (*it)->toc_entry.type,\
+ GetSectionNameByType((*itNext)->toc_entry.type), (*itNext)->toc_entry.type);
+ }
+ }
+ return true;
+}
+
+
+bool Fs3Operations::CheckItocArray()
+{
+ // sort the itocs
+ std::vector<struct toc_info*> sortedTocs(_fs3ImgInfo.numOfItocs);
+ for (int i=0 ; i< _fs3ImgInfo.numOfItocs ; i++) {
+ sortedTocs[i]= &(_fs3ImgInfo.tocArr[i]);
+ }
+ std::sort(sortedTocs.begin(), sortedTocs.end(), TocComp(0));
+ // check for inconsistency image burnt on 1st half
+ if(!CheckItocArrConsistency(sortedTocs, 0)) {
+ return false;
+ }
+
+ std::sort(sortedTocs.begin(), sortedTocs.end(), TocComp((1 << _fwImgInfo.cntxLog2ChunkSize)));
+ // check for inconsistency image burn on second half
+ if(!CheckItocArrConsistency(sortedTocs, (1 << _fwImgInfo.cntxLog2ChunkSize))) {
+ return false;
+ }
+ return true;
+}
+
const char* Fs3Operations::FwGetResetRecommandationStr()
{
#if defined(_WIN_) || defined(MST_UL)
}
return true;
}
+
+
+#define IS_EMPTY_CX4_MFG_UIDS(fs3_uids_info) \
+ (((fs3_uids_info).cx4_uids.base_guid.uid == 0x0ULL) && ((fs3_uids_info).cx4_uids.base_mac.uid == 0x0ULL))
+
+#define FLASH_RESTORE(origFlashObj) \
+ if (origFlashObj) {\
+ _ioAccess->close();\
+ delete _ioAccess;\
+ _ioAccess = origFlashObj;\
+ _fwParams.ignoreCacheRep = 0;\
+ }
+#define GET_UID_LOW(uid) \
+ ((uid) & 0xffffffffULL)
+
+#define GET_UID_HIGH(uid) \
+ ((uid) >> 32)
+
+bool Fs3Operations::CheckAndFixCX4(bool justCheck)
+{
+ // assuming query/verify was ran before and this is being called on an MST device during burn
+ FBase* origFlashObj = NULL;
+
+ if (!_ioAccess->is_flash()) {
+ return true;
+ }
+
+ if (((Flash*)_ioAccess)->get_dev_id() != CX4_HW_ID || _maxImgLog2Size != 0x16) {
+ // nothing to do return
+ return true;
+ }
+
+ // re-open flash with -ocr if needed
+ if (_fwParams.ignoreCacheRep == 0) {
+ origFlashObj = _ioAccess;
+ _fwParams.ignoreCacheRep = 1;
+ if (!FwOperations::FwAccessCreate(_fwParams, &_ioAccess)) {
+ _ioAccess = origFlashObj;
+ _fwParams.ignoreCacheRep = 0;
+ return errmsg("Failed to open device for direct flash access");
+ }
+ }
+ // check if Flash0 last sub-sector is write protected (indication if we need to continue)
+ ext_flash_attr_t attr;
+ memset(&attr, 0, sizeof(attr));
+
+ if (!((Flash*)_ioAccess)->get_attr(attr)) {
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Failed to perform Flash operation");
+ }
+
+ if (attr.type_str) {
+ delete [] attr.type_str;
+ }
+
+ if (!(attr.protect_info_array[0].is_subsector && attr.protect_info_array[0].sectors_num == 1 && attr.protect_info_array[0].is_bottom == 0)) {
+ // Flash0 protection is not as expected : Flash0.Top,1-SubSectors. nothing to do
+ FLASH_RESTORE(origFlashObj);
+ return true;
+ }
+ // mlxmodfw has corrupted dev_data sections and flash protection. attempt to fix
+
+ if (justCheck) {
+ // just perform checks and return
+ FLASH_RESTORE(origFlashObj);
+ return false;
+ }
+
+ char paramName[50] = {0};
+ char paramVal[50] = {0};
+ bool rc = FixCX4Uids();
+
+ // set write protection to last sector
+ strncpy(paramName, "Flash0.WriteProtected", 50);
+ strncpy(paramVal, "Top,1-Sectors", 50);
+ if (!((Flash*)_ioAccess)->set_attr(paramName, paramVal)) {
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Failed to perform Flash operation");
+ }
+ // wait for flash op to finish
+ msleep(500);
+ FLASH_RESTORE(origFlashObj);
+
+ if (!rc || !Fs3IntQuery()) {
+ return false;
+ }
+ return true;
+}
+
+bool Fs3Operations::FixCX4Uids()
+{
+ // fix mfg guids_num and step_size
+ fs3_uid_t baseUid;
+ memset(&baseUid, 0, sizeof(baseUid));
+ if(IS_EMPTY_CX4_MFG_UIDS(_fs3ImgInfo.ext_info.orig_fs3_uids_info)) {
+ // fix macs/guids
+ // adrianc: if MFGs are zero: set the same uids as in dev_info.
+ baseUid.base_guid.l = GET_UID_LOW(_fs3ImgInfo.ext_info.fs3_uids_info.cx4_uids.base_guid.uid);
+ baseUid.base_guid.h = GET_UID_HIGH(_fs3ImgInfo.ext_info.fs3_uids_info.cx4_uids.base_guid.uid);
+
+ baseUid.base_mac.l = GET_UID_LOW(_fs3ImgInfo.ext_info.fs3_uids_info.cx4_uids.base_mac.uid);
+ baseUid.base_mac.h = GET_UID_HIGH(_fs3ImgInfo.ext_info.fs3_uids_info.cx4_uids.base_mac.uid);
+
+ baseUid.base_guid_specified = 1;
+ baseUid.base_mac_specified = 1;
+ baseUid.set_mac_from_guid = 0;
+ baseUid.num_of_guids = 0;
+ baseUid.step_size = 0;
+
+ // set manufacture guids
+ if (!FwSetMFG(baseUid)) {
+ return false;
+ }
+ }
+ return true;
+}
+
+#define OPEN_OCR(origFlashObj) do {\
+ origFlashObj = _ioAccess;\
+ _fwParams.ignoreCacheRep = 1;\
+ if (!FwOperations::FwAccessCreate(_fwParams, &_ioAccess)) {\
+ _ioAccess = origFlashObj;\
+ _fwParams.ignoreCacheRep = 0;\
+ return errmsg("Failed to open device for direct flash access");\
+ }\
+ } while (0)
+
+#define SET_WRITE_PROTECT(name, val) do { \
+ char paramName[50] = {0};\
+ char paramVal[50] = {0};\
+ strncpy(paramName, name, 50);\
+ strncpy(paramVal, val, 50);\
+ if (!((Flash*)_ioAccess)->set_attr(paramName, paramVal)) {\
+ FLASH_RESTORE(origFlashObj);\
+ return errmsg("Failed to perform Flash operation");\
+ }\
+ msleep(500);\
+ } while (0)
+
+bool Fs3Operations::FixCX4WriteProtection(bool justCheck)
+{
+ if (!_ioAccess->is_flash() || ((Flash*)_ioAccess)->get_dev_id() != CX4_HW_ID) {
+ return true;
+ }
+
+ struct toc_info* mfgToc = NULL;
+ struct toc_info* vpdToc = NULL;
+ u_int32_t mfgAddr = 0;
+ u_int32_t vpdAddr = 0;
+ u_int32_t flashSize = 0;
+ u_int32_t shiftSize = 0x8000;
+ FBase* origFlashObj = NULL;
+ std::vector<u_int8_t> newVpdSection;
+ int retries = 0;
+ if (!Fs3GetItocInfo(_fs3ImgInfo.tocArr, _fs3ImgInfo.numOfItocs, FS3_MFG_INFO, mfgToc)) {
+ return errmsg("failed to locate MFG_INFO address within the FW image");
+ }
+ ext_flash_attr_t attr;
+ memset(&attr, 0, sizeof(attr));
+ if (!((Flash*)_ioAccess)->get_attr(attr)) {
+ return errmsg("Failed to perform Flash operation");
+ }
+ flashSize = attr.size;
+ mfgAddr = getAbsAddr(mfgToc);
+ /* If the flash size is 16-MB and the MFG at the end 0xff0000
+ * Move it with the VPD the bottom 32-bit (shift 0x8000) and
+ * FlashProtected Top,8-SubSectors
+ */
+ if (flashSize != 0x1000000 || mfgAddr != 0xff0000) {
+ return true;
+ }
+
+ if (justCheck) {
+ // just perform checks and return
+ FLASH_RESTORE(origFlashObj);
+ return false;
+ }
+ // re-open flash with -ocr if needed
+ if (_fwParams.ignoreCacheRep == 0) {
+ OPEN_OCR(origFlashObj);
+ }
+ /*
+ * Check if write protected and disable it
+ */
+ if (((Flash*)_ioAccess)->is_flash_write_protected()) {
+ SET_WRITE_PROTECT("Flash0.WriteProtected", "Disabled");
+ }
+ while (((Flash*)_ioAccess)->is_flash_write_protected() && retries < 5) {
+ msleep(500);
+ }
+ if (retries == 5) {
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Failed to disable flash write protection");
+ }
+ /*
+ * MOVE MFG & VPD Sections to +0x8000
+ */
+ const char* flashParamName = "Flash0.WriteProtected";
+ const char* flashParamVal = "Top,8-SubSectors";
+
+ /*
+ * Moving VPD section
+ */
+ if (!Fs3GetItocInfo(_fs3ImgInfo.tocArr, _fs3ImgInfo.numOfItocs, FS3_VPD_R0, vpdToc)) {
+ SET_WRITE_PROTECT(flashParamName, flashParamVal);
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Failed to locate VPD_R0 address within the FW image");
+ }
+ /*
+ * VPD_R0 address is after the MFG_INFO section
+ */
+ vpdAddr = mfgAddr + mfgToc->toc_entry.size * 4;
+ GetSectData(newVpdSection, (u_int32_t*)vpdToc->data, vpdToc->toc_entry.size * 4);
+ if (!Fs3UpdateItocInfo(vpdToc, vpdAddr + shiftSize, vpdToc->toc_entry.size, newVpdSection)) {
+ SET_WRITE_PROTECT(flashParamName, flashParamVal);
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Failed to shift VPD_R0 section");
+ }
+ if (!Fs3ReburnItocSection(vpdAddr + shiftSize, vpdToc->toc_entry.size * 4, newVpdSection, "VPD")) {
+ SET_WRITE_PROTECT(flashParamName, flashParamVal);
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Failed to burn VPD_R0 section, the image maybe left in bad situation");;
+ }
+ if (!Fs3UpdateItocInfo(mfgToc, mfgAddr + shiftSize)) {
+ SET_WRITE_PROTECT(flashParamName, flashParamVal);
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Failed to shift MFG_INFO section");
+ }
+ if (!Fs3ReburnItocSection(mfgAddr + shiftSize, mfgToc->toc_entry.size * 4, mfgToc->section_data, "GUID")) {
+ SET_WRITE_PROTECT(flashParamName, flashParamVal);
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Failed to burn MFG_INFO section, the image maybe left in bad situation");
+ }
+ /*
+ * Enable Flash protected
+ */
+ SET_WRITE_PROTECT(flashParamName, flashParamVal);
+ FLASH_RESTORE(origFlashObj);
+ /*
+ * Query for check
+ */
+ if (!Fs3IntQuery()) {
+ return errmsg("Failed to query device after fixing write protected sections");
+ }
+ return true;
+}
virtual bool FwBurnAdvanced(FwOperations *imageOps, ExtBurnParams& burnParams);
virtual bool FwBurnBlock(FwOperations* imageOps, ProgressCallBack progressFunc);
- virtual bool FwSetGuids(sg_params_t& sgParam, PrintCallBack callBack, ProgressCallBack progressFunc);
+ virtual bool FwSetGuids(sg_params_t& sgParam, PrintCallBack callBack=(PrintCallBack)NULL, ProgressCallBack progressFunc=(ProgressCallBack)NULL);
virtual bool FwSetMFG(guid_t baseGuid, PrintCallBack callBackFunc=(PrintCallBack)NULL);
virtual bool FwSetMFG(fs3_uid_t baseGuid, PrintCallBack callBackFunc=(PrintCallBack)NULL);
virtual bool FwGetSection (u_int32_t sectType, std::vector<u_int8_t>& sectInfo, bool stripedImage=false);
virtual bool FwResetNvData();
virtual bool FwShiftDevData(PrintCallBack progressFunc=(PrintCallBack)NULL);
virtual const char* FwGetResetRecommandationStr();
+ virtual bool CheckCX4Device() {return (CheckAndFixCX4() && FixCX4WriteProtection());}
+
private:
#define CRC_CHECK_OUTPUT CRC_CHECK_OLD")"
#define PRE_CRC_OUTPUT " "
#define MAX_TOCS_NUM 64
#define FS3_DEFAULT_SECTOR_SIZE 0x1000
- #define FS3_LOG2_CHUNK_SIZE_BYTE_OFFSET 0x26
+ #define FS3_LOG2_CHUNK_SIZE_DW_OFFSET 0x9
#define ITOC_ASCII 0x49544f43
#define DTOC_ASCII 0x64544f43
#define TOC_RAND1 0x04081516
bool Fs3IntQuery(bool readRom = true, bool quickQuery=true);
bool Fs3Burn(Fs3Operations &imageOps, ExtBurnParams& burnParams);
bool BurnFs3Image(Fs3Operations &imageOps, ExtBurnParams& burnParams);
- bool UpdateDevDataITOC(u_int8_t *image_data, struct toc_info *image_toc_entry, struct toc_info *flash_toc_arr, int flash_toc_size);
+ bool UpdateDevDataITOC(u_int8_t *image_data, struct toc_info *image_toc_info_entry, struct toc_info *flash_toc_arr, int flash_toc_size);
bool AddDevDataITOC(struct toc_info *flash_toc_entry, u_int8_t *image_data, struct toc_info *image_toc_arr, int& image_toc_size);
bool Fs3UpdateSection(void *new_info, fs3_section_t sect_type=FS3_DEV_INFO, bool is_sect_failsafe=true, CommandType cmd_type=CMD_UNKNOWN, PrintCallBack callBackFunc=(PrintCallBack)NULL );
bool Fs3GetItocInfo(struct toc_info *tocArr, int num_of_itocs, fs3_section_t sect_type, struct toc_info *&curr_toc);
ProgressCallBack progressFunc);
bool CheckFs3ImgSize(Fs3Operations& imageOps, bool useImageDevData=false);
bool GetMaxImageSize(u_int32_t flash_size, bool image_is_fs, u_int32_t &max_image_size);
+ bool CheckItocArray();
+ bool CheckItocArrConsistency(std::vector<struct toc_info*>& sortedTocVec, u_int32_t imageStartAddr);
+ bool CheckBinVersion(u_int8_t binVerMajor, u_int8_t binVerMinor);
u_int32_t getAbsAddr(toc_info* toc);
+ u_int32_t getAbsAddr(toc_info* toc, u_int32_t imgStart);
bool getLastFwSAddr(u_int32_t& lastAddr);
bool getFirstDevDataAddr(u_int32_t& firstAddr);
bool reburnItocSection(PrintCallBack callBackFunc);
bool Fs3IsfuActivateImage(u_int32_t newImageStart);
+ bool CheckAndFixCX4(bool justCheck=true);
+ bool FixCX4Uids();
+ bool FixCX4WriteProtection(bool justCheck=true);
+ bool DevDataHackCheck(struct cibfw_itoc_entry *devTocEntry);
+
// this class is for sorting the itoc array by ascending absolute flash_addr used in FwShiftDevData
class TocComp {
public:
void FwOperations::FwCleanUp()
{
- _ioAccess->close();
- delete _ioAccess;
- if (_fname != NULL) {
+ if (_ioAccess) {
+ _ioAccess->close();
+ delete _ioAccess;
+ _ioAccess = NULL;
+ }
+ if (_fname) {
delete[] _fname;
+ _fname = NULL;
}
- if (_devName != NULL) {
+ if (_devName) {
delete[] _devName;
+ _devName = NULL;
+ }
+ if (_fwParams.fileHndl) {
+ delete[] _fwParams.fileHndl;
+ _fwParams.fileHndl = NULL;
+ }
+ if (_fwParams.mstHndl) {
+ delete[] _fwParams.mstHndl;
+ _fwParams.mstHndl = NULL;
+ }
+ if (_fwParams.psid) {
+ delete[] _fwParams.psid;
+ _fwParams.psid = NULL;
}
}
FwOperations* FwOperations::FwOperationsCreate(void* fwHndl, void *info, char* psid, fw_hndl_type_t hndlType, char* errBuff, int buffSize)
{
fw_ops_params_t fwParams;
+ memset(&fwParams, 0 , sizeof(fwParams));
fwParams.psid = psid;
fwParams.hndlType = hndlType;
fwParams.errBuff = errBuff;
return FwOperationsCreate(fwParams);
}
+void FwOperations::BackUpFwParams(fw_ops_params_t& fwParams)
+{
+ _fwParams.hndlType = fwParams.hndlType;
+ _fwParams.buffHndl = fwParams.buffHndl;
+ _fwParams.buffSize = fwParams.buffSize;
+ _fwParams.cx3FwAccess = fwParams.cx3FwAccess;
+ _fwParams.errBuff = NULL;
+ _fwParams.errBuffSize = 0;
+ _fwParams.fileHndl = (fwParams.hndlType == FHT_FW_FILE && fwParams.fileHndl) ? \
+ strncpy((char*)(new char[(strlen(fwParams.fileHndl) + 1)]), fwParams.fileHndl, strlen(fwParams.fileHndl) + 1) : NULL;
+ // no support for flash params
+ _fwParams.flashParams = NULL;
+ _fwParams.forceLock = fwParams.forceLock;
+ _fwParams.ignoreCacheRep = fwParams.ignoreCacheRep;
+ _fwParams.mstHndl = (fwParams.hndlType == FHT_MST_DEV && fwParams.mstHndl) ? \
+ strncpy((char*)(new char[(strlen(fwParams.mstHndl) + 1)]), fwParams.mstHndl, strlen(fwParams.mstHndl) + 1) : NULL;
+ _fwParams.noFlashVerify = fwParams.noFlashVerify;
+ _fwParams.numOfBanks = fwParams.numOfBanks;
+ _fwParams.psid = fwParams.psid ? strncpy((char*)(new char[(strlen(fwParams.psid) + 1)]), fwParams.psid, strlen(fwParams.psid) + 1) : NULL;
+ _fwParams.readOnly = fwParams.readOnly;
+ _fwParams.shortErrors = fwParams.shortErrors;
+ _fwParams.uefiExtra = fwParams.uefiExtra;
+ _fwParams.uefiHndl = fwParams.uefiHndl;
+}
+
FwOperations* FwOperations::FwOperationsCreate(fw_ops_params_t& fwParams)
{
FwOperations* fwops;
WriteToErrBuff(fwParams.errBuff,"invalid Firmware Format (found FS Gen 1)", fwParams.errBuffSize);
return (FwOperations*)NULL;
}
+ // save initialization parameters
+ fwops->BackUpFwParams(fwParams);
+
fwops->_advErrors = !fwParams.shortErrors;
fwops->FwInit();
if (fwParams.hndlType == FHT_FW_FILE) {
{
memset(_sectionsToRead, 0, sizeof(_sectionsToRead));
memset(&_fwImgInfo, 0, sizeof(_fwImgInfo));
+ memset(&_fwParams, 0, sizeof(_fwParams));
};
//needed for flint low level operations
bool FwSwReset();
+ virtual bool CheckCX4Device() {return true;}
//virtual bool FwBurnBlock(FwOperations &FwImageAccess); // Add call back
bool ModifyImageFile(const char *fimage, u_int32_t addr, void *data, int cnt);
bool WriteImageToFile(const char *file_name, u_int8_t *data, u_int32_t length);
bool FwBurnData(u_int32_t *data, u_int32_t dataSize, ProgressCallBack progressFunc);
-
+ static bool FwAccessCreate(fw_ops_params_t& fwParams, FBase **ioAccessP);
// Protected Members
FBase* _ioAccess;
bool _isCached;
FwImgInfo _fwImgInfo;
+ fw_ops_params_t _fwParams;
std::vector<u_int8_t> _romSect;
std::vector<u_int8_t> _fwConfSect;
std::vector<u_int8_t> _hashFileSect;
#endif
static int getFileSignature(const char* fname);
static int getBufferSignature(u_int8_t* buf, u_int32_t size);
- static bool FwAccessCreate(fw_ops_params_t& fwParams, FBase **ioAccessP);
static u_int8_t CheckFwFormat(FBase& f, bool getFwFormatFromImg = false);
static bool CntxFindMagicPattern (FBase* ioAccess, u_int32_t addr);
static void WriteToErrBuff(char* errBuff, const char* errStr, int size);
+ void BackUpFwParams(fw_ops_params_t& fwParams);
static const char * err2str(int errNum);
// Methods
0x060f80,6,
0x060fa0,7,
0x060fd8,2,
-0x061000,6,
+0x060fe4,1,
+0x060ff0,10,
0x061020,16,
0x061084,1,
0x0610c0,16,
0x0c2070,3,
0x0c2080,6,
0x0c2100,9,
-0x0c2220,1,
+0x0c2204,1,
+0x0c220c,6,
0x0c2240,13,
0x0c2280,16,
0x0c2400,8,
0x206070,3,
0x206080,6,
0x206100,9,
-0x206220,1,
+0x206204,1,
+0x20620c,6,
0x206240,13,
0x206280,16,
0x206800,19,
0x216070,3,
0x216080,6,
0x216100,9,
-0x216220,1,
+0x216204,1,
+0x21620c,6,
0x216240,13,
0x216280,16,
0x216800,19,
0x226070,3,
0x226080,6,
0x226100,9,
-0x226220,1,
+0x226204,1,
+0x22620c,6,
0x226240,13,
0x226280,16,
0x226800,19,
0x236070,3,
0x236080,6,
0x236100,9,
-0x236220,1,
+0x236204,1,
+0x23620c,6,
0x236240,13,
0x236280,16,
0x236800,19,
0x246070,3,
0x246080,6,
0x246100,9,
-0x246220,1,
+0x246204,1,
+0x24620c,6,
0x246240,13,
0x246280,16,
0x246400,8,
0x256070,3,
0x256080,6,
0x256100,9,
-0x256220,1,
+0x256204,1,
+0x25620c,6,
0x256240,13,
0x256280,16,
0x256800,19,
0x266070,3,
0x266080,6,
0x266100,9,
-0x266220,1,
+0x266204,1,
+0x26620c,6,
0x266240,13,
0x266280,16,
0x266800,19,
0x276070,3,
0x276080,6,
0x276100,9,
-0x276220,1,
+0x276204,1,
+0x27620c,6,
0x276240,13,
0x276280,16,
0x276800,19,
0x286070,3,
0x286080,6,
0x286100,9,
-0x286220,1,
+0x286204,1,
+0x28620c,6,
0x286240,13,
0x286280,16,
0x286800,19,
0x296070,3,
0x296080,6,
0x296100,9,
-0x296220,1,
+0x296204,1,
+0x29620c,6,
0x296240,13,
0x296280,16,
0x296800,19,
0x2a6070,3,
0x2a6080,6,
0x2a6100,9,
-0x2a6220,1,
+0x2a6204,1,
+0x2a620c,6,
0x2a6240,13,
0x2a6280,16,
0x2a6800,19,
0x2b6070,3,
0x2b6080,6,
0x2b6100,9,
-0x2b6220,1,
+0x2b6204,1,
+0x2b620c,6,
0x2b6240,13,
0x2b6280,16,
0x2b6800,19,
0x2c6070,3,
0x2c6080,6,
0x2c6100,9,
-0x2c6220,1,
+0x2c6204,1,
+0x2c620c,6,
0x2c6240,13,
0x2c6280,16,
0x2c6800,19,
0x2d6070,3,
0x2d6080,6,
0x2d6100,9,
-0x2d6220,1,
+0x2d6204,1,
+0x2d620c,6,
0x2d6240,13,
0x2d6280,16,
0x2d6400,8,
0x2e6070,3,
0x2e6080,6,
0x2e6100,9,
-0x2e6220,1,
+0x2e6204,1,
+0x2e620c,6,
0x2e6240,13,
0x2e6280,16,
0x2e6800,19,
0x2f6070,3,
0x2f6080,6,
0x2f6100,9,
-0x2f6220,1,
+0x2f6204,1,
+0x2f620c,6,
0x2f6240,13,
0x2f6280,16,
0x2f6800,19,
0x306070,3,
0x306080,6,
0x306100,9,
-0x306220,1,
+0x306204,1,
+0x30620c,6,
0x306240,13,
0x306280,16,
0x306800,19,
0x316070,3,
0x316080,6,
0x316100,9,
-0x316220,1,
+0x316204,1,
+0x31620c,6,
0x316240,13,
0x316280,16,
0x316800,19,
static
int mtcr_pciconf_open(mfile *mf, const char *name)
{
- unsigned signature;
int err;
int rc;
struct pciconf_context *ctx;
}
mf->mclose = mtcr_pciconf_mclose;
- /* Kernels before 2.6.12 carry the high bit in each byte
- * on <device>/config writes, overriding higher bits.
- * Make sure the high bit is set in some signature bytes,
- * to catch this. */
- /* Do this test before mtcr_check_signature,
- to avoid system failure on access to an illegal address. */
- signature = 0xfafbfcfd;
-
- rc = _flock_int(mf->fdlock, LOCK_EX);
- if (rc) {
- goto end;
- }
-
- rc = pwrite(ctx->fd, &signature, 4, 22*4);
- if (rc != 4) {
- _flock_int(mf->fdlock, LOCK_UN);
- rc = -1;
- goto end;
- }
-
- rc = pread(ctx->fd, &signature, 4, 22*4);
- _flock_int(mf->fdlock, LOCK_UN);
- if (rc != 4) {
- rc = -1;
- goto end;
- }
-
- if (signature != 0xfafbfcfd) {
- rc = -1;
- errno = EIO;
- goto end;
- }
-
rc = mtcr_check_signature(mf);
if (rc) {
rc = -1;
goto end;
}
+
end:
if (rc) {
err = errno;
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
+
/***
*** This file was generated at "2015-03-30 10:56:56"
tools_open_mnv_cfg_print(ptr_struct, file, 0);
}
+void tools_open_pci_capabilities_pack(const struct tools_open_pci_capabilities *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=7;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->pf_bar_size_supported);
+
+ offset=6;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->vf_bar_size_supported);
+
+ offset=5;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->num_pf_msix_supported);
+
+ offset=4;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->num_vf_msix_supported);
+
+ offset=3;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->num_pfs_supported);
+
+ offset=2;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->log_max_total_bar_valid);
+
+ offset=1;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->max_total_msix_valid);
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->max_vfs_per_pf_valid);
+
+ offset=48;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->max_vfs_per_pf);
+
+ offset=44;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->max_num_pfs);
+
+ offset=34;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->fpp_support);
+
+ offset=33;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->vf_qos_control_support);
+
+ offset=32;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->sriov_support);
+
+ offset=90;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->log_max_pf_uar_bar_size1);
+
+ offset=84;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->log_max_vf_uar_bar_size);
+
+ offset=74;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 10, (u_int32_t)ptr_struct->max_num_pf_msix);
+
+ offset=64;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 10, (u_int32_t)ptr_struct->max_num_vf_msix);
+
+ offset=96;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->max_total_msix);
+
+ offset=128;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->log_max_total_bar_h);
+
+ offset=160;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->log_max_total_bar_l);
+
+}
+
+void tools_open_pci_capabilities_unpack(struct tools_open_pci_capabilities *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=7;
+ ptr_struct->pf_bar_size_supported = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=6;
+ ptr_struct->vf_bar_size_supported = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=5;
+ ptr_struct->num_pf_msix_supported = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=4;
+ ptr_struct->num_vf_msix_supported = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=3;
+ ptr_struct->num_pfs_supported = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=2;
+ ptr_struct->log_max_total_bar_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=1;
+ ptr_struct->max_total_msix_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=0;
+ ptr_struct->max_vfs_per_pf_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=48;
+ ptr_struct->max_vfs_per_pf = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
+
+ offset=44;
+ ptr_struct->max_num_pfs = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
+
+ offset=34;
+ ptr_struct->fpp_support = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=33;
+ ptr_struct->vf_qos_control_support = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=32;
+ ptr_struct->sriov_support = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=90;
+ ptr_struct->log_max_pf_uar_bar_size1 = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
+
+ offset=84;
+ ptr_struct->log_max_vf_uar_bar_size = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
+
+ offset=74;
+ ptr_struct->max_num_pf_msix = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 10);
+
+ offset=64;
+ ptr_struct->max_num_vf_msix = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 10);
+
+ offset=96;
+ ptr_struct->max_total_msix = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
+ offset=128;
+ ptr_struct->log_max_total_bar_h = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
+ offset=160;
+ ptr_struct->log_max_total_bar_l = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
+}
+
+void tools_open_pci_capabilities_print(const struct tools_open_pci_capabilities *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_pci_capabilities ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "pf_bar_size_supported : "UH_FMT"\n", ptr_struct->pf_bar_size_supported);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "vf_bar_size_supported : "UH_FMT"\n", ptr_struct->vf_bar_size_supported);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_pf_msix_supported : "UH_FMT"\n", ptr_struct->num_pf_msix_supported);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_vf_msix_supported : "UH_FMT"\n", ptr_struct->num_vf_msix_supported);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_pfs_supported : "UH_FMT"\n", ptr_struct->num_pfs_supported);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_max_total_bar_valid : "UH_FMT"\n", ptr_struct->log_max_total_bar_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_total_msix_valid : "UH_FMT"\n", ptr_struct->max_total_msix_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_vfs_per_pf_valid : "UH_FMT"\n", ptr_struct->max_vfs_per_pf_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_vfs_per_pf : "UH_FMT"\n", ptr_struct->max_vfs_per_pf);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_num_pfs : "UH_FMT"\n", ptr_struct->max_num_pfs);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "fpp_support : "UH_FMT"\n", ptr_struct->fpp_support);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "vf_qos_control_support : "UH_FMT"\n", ptr_struct->vf_qos_control_support);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "sriov_support : "UH_FMT"\n", ptr_struct->sriov_support);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_max_pf_uar_bar_size1 : "UH_FMT"\n", ptr_struct->log_max_pf_uar_bar_size1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_max_vf_uar_bar_size : "UH_FMT"\n", ptr_struct->log_max_vf_uar_bar_size);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_num_pf_msix : "UH_FMT"\n", ptr_struct->max_num_pf_msix);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_num_vf_msix : "UH_FMT"\n", ptr_struct->max_num_vf_msix);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_total_msix : "U32H_FMT"\n", ptr_struct->max_total_msix);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_max_total_bar_h : "U32H_FMT"\n", ptr_struct->log_max_total_bar_h);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_max_total_bar_l : "U32H_FMT"\n", ptr_struct->log_max_total_bar_l);
+
+}
+
+int tools_open_pci_capabilities_size(void){
+ return 24;
+}
+
+void tools_open_pci_capabilities_dump(const struct tools_open_pci_capabilities *ptr_struct, FILE* file) {
+ tools_open_pci_capabilities_print(ptr_struct, file, 0);
+}
+
+void tools_open_pci_configuration_pack(const struct tools_open_pci_configuration *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=7;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->pf_bar_size_valid);
+
+ offset=6;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->vf_bar_size_valid);
+
+ offset=5;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->num_pfs_msix_valid);
+
+ offset=4;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->num_vfs_msix_valid);
+
+ offset=3;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->num_pfs_valid);
+
+ offset=2;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->fpp_valid);
+
+ offset=1;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->full_vf_qos_valid);
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->sriov_valid);
+
+ offset=48;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->total_vfs);
+
+ offset=44;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->num_pfs);
+
+ offset=34;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->fpp_en);
+
+ offset=33;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->full_vf_qos);
+
+ offset=32;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->sriov_en);
+
+ offset=90;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->log_vf_uar_bar_size);
+
+ offset=84;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->log_pf_uar_bar_size);
+
+ offset=74;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 10, (u_int32_t)ptr_struct->num_pf_msix);
+
+ offset=64;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 10, (u_int32_t)ptr_struct->num_vf_msix);
+
+}
+
+void tools_open_pci_configuration_unpack(struct tools_open_pci_configuration *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=7;
+ ptr_struct->pf_bar_size_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=6;
+ ptr_struct->vf_bar_size_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=5;
+ ptr_struct->num_pfs_msix_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=4;
+ ptr_struct->num_vfs_msix_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=3;
+ ptr_struct->num_pfs_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=2;
+ ptr_struct->fpp_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=1;
+ ptr_struct->full_vf_qos_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=0;
+ ptr_struct->sriov_valid = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=48;
+ ptr_struct->total_vfs = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
+
+ offset=44;
+ ptr_struct->num_pfs = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
+
+ offset=34;
+ ptr_struct->fpp_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=33;
+ ptr_struct->full_vf_qos = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=32;
+ ptr_struct->sriov_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=90;
+ ptr_struct->log_vf_uar_bar_size = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
+
+ offset=84;
+ ptr_struct->log_pf_uar_bar_size = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
+
+ offset=74;
+ ptr_struct->num_pf_msix = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 10);
+
+ offset=64;
+ ptr_struct->num_vf_msix = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 10);
+
+}
+
+void tools_open_pci_configuration_print(const struct tools_open_pci_configuration *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_pci_configuration ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "pf_bar_size_valid : "UH_FMT"\n", ptr_struct->pf_bar_size_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "vf_bar_size_valid : "UH_FMT"\n", ptr_struct->vf_bar_size_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_pfs_msix_valid : "UH_FMT"\n", ptr_struct->num_pfs_msix_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_vfs_msix_valid : "UH_FMT"\n", ptr_struct->num_vfs_msix_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_pfs_valid : "UH_FMT"\n", ptr_struct->num_pfs_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "fpp_valid : "UH_FMT"\n", ptr_struct->fpp_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "full_vf_qos_valid : "UH_FMT"\n", ptr_struct->full_vf_qos_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "sriov_valid : "UH_FMT"\n", ptr_struct->sriov_valid);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "total_vfs : "UH_FMT"\n", ptr_struct->total_vfs);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_pfs : "UH_FMT"\n", ptr_struct->num_pfs);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "fpp_en : "UH_FMT"\n", ptr_struct->fpp_en);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "full_vf_qos : "UH_FMT"\n", ptr_struct->full_vf_qos);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "sriov_en : "UH_FMT"\n", ptr_struct->sriov_en);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_vf_uar_bar_size : "UH_FMT"\n", ptr_struct->log_vf_uar_bar_size);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_pf_uar_bar_size : "UH_FMT"\n", ptr_struct->log_pf_uar_bar_size);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_pf_msix : "UH_FMT"\n", ptr_struct->num_pf_msix);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "num_vf_msix : "UH_FMT"\n", ptr_struct->num_vf_msix);
+
+}
+
+int tools_open_pci_configuration_size(void){
+ return 12;
+}
+
+void tools_open_pci_configuration_dump(const struct tools_open_pci_configuration *ptr_struct, FILE* file) {
+ tools_open_pci_configuration_print(ptr_struct, file, 0);
+}
+
void tools_open_iscsi_settings_pack(const struct tools_open_iscsi_settings *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
void tools_open_nv_cfg_pack(const union tools_open_nv_cfg *ptr_struct, u_int8_t* ptr_buff)
{
- tools_open_iscsi_settings_pack(&(ptr_struct->iscsi_settings), ptr_buff);
+ tools_open_pci_capabilities_pack(&(ptr_struct->pci_capabilities), ptr_buff);
}
void tools_open_nv_cfg_unpack(union tools_open_nv_cfg *ptr_struct, const u_int8_t* ptr_buff)
{
- tools_open_iscsi_settings_unpack(&(ptr_struct->iscsi_settings), ptr_buff);
+ tools_open_pci_capabilities_unpack(&(ptr_struct->pci_capabilities), ptr_buff);
}
void tools_open_nv_cfg_print(const union tools_open_nv_cfg *ptr_struct, FILE* file, int indent_level){
fprintf(file, "iscsi_settings:\n");
tools_open_iscsi_settings_print(&(ptr_struct->iscsi_settings), file, indent_level + 1);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "pci_configuration:\n");
+ tools_open_pci_configuration_print(&(ptr_struct->pci_configuration), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "pci_capabilities:\n");
+ tools_open_pci_capabilities_print(&(ptr_struct->pci_capabilities), file, indent_level + 1);
+
}
int tools_open_nv_cfg_size(void){
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
+
/***
*** This file was generated at "2015-03-30 10:56:56"
struct tools_open_nvdi nvdi;
};
+/* Description - */
+/* Size in bytes - 24 */
+struct tools_open_pci_capabilities {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - 1 when max_pf_uar_bar_size field is configurable and the log_max_pf_uar_bar_size field is valid */
+ /* 0.24 - 0.24 */
+ u_int8_t pf_bar_size_supported;
+ /* Description - 1 when max_vf_uar_bar_size field is configurable and the log_max_vf_uar_bar_size field is valid */
+ /* 0.25 - 0.25 */
+ u_int8_t vf_bar_size_supported;
+ /* Description - 1 when num_pf_msix field is configurable and the max_num_pf_msix field is valid */
+ /* 0.26 - 0.26 */
+ u_int8_t num_pf_msix_supported;
+ /* Description - 1 when the num_vf_msix field is configurable and max_num_pfs is valid */
+ /* 0.27 - 0.27 */
+ u_int8_t num_vf_msix_supported;
+ /* Description - 1 when the num_pfs field is configurable and max_num_pfs is valid */
+ /* 0.28 - 0.28 */
+ u_int8_t num_pfs_supported;
+ /* Description - 1 when the log_max_total_bar field is valid */
+ /* 0.29 - 0.29 */
+ u_int8_t log_max_total_bar_valid;
+ /* Description - 1 when the total_msix field is valid */
+ /* 0.30 - 0.30 */
+ u_int8_t max_total_msix_valid;
+ /* Description - 1 when max_vfs_per_pf fields is valid. */
+ /* 0.31 - 4.31 */
+ u_int8_t max_vfs_per_pf_valid;
+/*---------------- DWORD[1] (Offset 0x4) ----------------*/
+ /* Description - The maximum number of VFs that can be set in the total_vfs settings (per PF) */
+ /* 4.0 - 4.15 */
+ u_int16_t max_vfs_per_pf;
+ /* Description - Maximum number of PFs per port */
+ /* 4.16 - 4.19 */
+ u_int8_t max_num_pfs;
+ /* Description - 1 - function per port settings is configurable */
+ /* 4.29 - 4.29 */
+ u_int8_t fpp_support;
+ /* Description - 1 - the device supports controlling the VF QoS setting */
+ /* 4.30 - 4.30 */
+ u_int8_t vf_qos_control_support;
+ /* Description - 1 when SRIOV is configurable */
+ /* 4.31 - 8.31 */
+ u_int8_t sriov_support;
+/*---------------- DWORD[2] (Offset 0x8) ----------------*/
+ /* Description - Log 2 of the maximum size of a PF's UAR BAR */
+ /* 8.0 - 8.5 */
+ u_int8_t log_max_pf_uar_bar_size1;
+ /* Description - Log 2 of the maximum size of a VF's UAR BAR */
+ /* 8.6 - 8.11 */
+ u_int8_t log_max_vf_uar_bar_size;
+ /* Description - Maximum number of MSI-X vectors and EQs per PF */
+ /* 8.12 - 8.21 */
+ u_int16_t max_num_pf_msix;
+ /* Description - Maximum number of MSI-X vectors and EQs per VF */
+ /* 8.22 - 12.31 */
+ u_int16_t max_num_vf_msix;
+/*---------------- DWORD[3] (Offset 0xc) ----------------*/
+ /* Description - Maximum number of MSI-X for the aggregat of all PF and VFs */
+ /* 12.0 - 16.31 */
+ u_int32_t max_total_msix;
+/*---------------- DWORD[4] (Offset 0x10) ----------------*/
+ /* Description - Log 2 of the maximum total of the MMIO space for all PFs and VFs combined */
+ /* 16.0 - 20.31 */
+ u_int32_t log_max_total_bar_h;
+/*---------------- DWORD[5] (Offset 0x14) ----------------*/
+ /* Description - Log 2 of the maximum total of the MMIO space for all PFs and VFs combined */
+ /* 20.0 - 24.31 */
+ u_int32_t log_max_total_bar_l;
+};
+
+/* Description - */
+/* Size in bytes - 12 */
+struct tools_open_pci_configuration {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - 1 when log_pf_uar_bar_size field is valid */
+ /* 0.24 - 0.24 */
+ u_int8_t pf_bar_size_valid;
+ /* Description - 1 when log_vf_uar_bar_size field is valid */
+ /* 0.25 - 0.25 */
+ u_int8_t vf_bar_size_valid;
+ /* Description - 1 when num_pfs_msix field is valid */
+ /* 0.26 - 0.26 */
+ u_int8_t num_pfs_msix_valid;
+ /* Description - 1 when num_vfs_msix field is valid */
+ /* 0.27 - 0.27 */
+ u_int8_t num_vfs_msix_valid;
+ /* Description - 1 when num_pfs field is valid */
+ /* 0.28 - 0.28 */
+ u_int8_t num_pfs_valid;
+ /* Description - 1 when fpp_en field is valid */
+ /* 0.29 - 0.29 */
+ u_int8_t fpp_valid;
+ /* Description - 1 when the full_vf_qos field below is valid */
+ /* 0.30 - 0.30 */
+ u_int8_t full_vf_qos_valid;
+ /* Description - 1 when the sriov_en and total_vfs field below are valid. */
+ /* 0.31 - 4.31 */
+ u_int8_t sriov_valid;
+/*---------------- DWORD[1] (Offset 0x4) ----------------*/
+ /* Description - The total number of VFs that can be supported */
+ /* 4.0 - 4.15 */
+ u_int16_t total_vfs;
+ /* Description - Number of PFs per port */
+ /* 4.16 - 4.19 */
+ u_int8_t num_pfs;
+ /* Description - 0 - single PF for both ports
+1 - function per-port */
+ /* 4.29 - 4.29 */
+ u_int8_t fpp_en;
+ /* Description - 0 - Use reduced QoS support level on VFs
+1 - Support full QoS on VFs */
+ /* 4.30 - 4.30 */
+ u_int8_t full_vf_qos;
+ /* Description - 1 when SRIOV is enabled: SRIOV capability will appear in the PCI configuration header */
+ /* 4.31 - 8.31 */
+ u_int8_t sriov_en;
+/*---------------- DWORD[2] (Offset 0x8) ----------------*/
+ /* Description - Log 2 of the size of a VF's UAR BAR */
+ /* 8.0 - 8.5 */
+ u_int8_t log_vf_uar_bar_size;
+ /* Description - Log 2 of the size of a PF's UAR BAR */
+ /* 8.6 - 8.11 */
+ u_int8_t log_pf_uar_bar_size;
+ /* Description - Number of MSI-X vectors and EQs per PF */
+ /* 8.12 - 8.21 */
+ u_int16_t num_pf_msix;
+ /* Description - Number of MSI-X vectors and EQs per VF */
+ /* 8.22 - 12.31 */
+ u_int16_t num_vf_msix;
+};
+
/* Description - */
/* Size in bytes - 12 */
struct tools_open_iscsi_settings {
/* Description - */
/* 0.0 - 12.31 */
struct tools_open_iscsi_settings iscsi_settings;
+ /* Description - */
+ /* 0.0 - 12.31 */
+ struct tools_open_pci_configuration pci_configuration;
+ /* Description - */
+ /* 0.0 - 24.31 */
+ struct tools_open_pci_capabilities pci_capabilities;
};
/* Description - */
int tools_open_mnv_cfg_size(void);
#define TOOLS_OPEN_MNV_CFG_SIZE (0x100)
void tools_open_mnv_cfg_dump(const union tools_open_mnv_cfg *ptr_struct, FILE* file);
+/* pci_capabilities */
+void tools_open_pci_capabilities_pack(const struct tools_open_pci_capabilities *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_pci_capabilities_unpack(struct tools_open_pci_capabilities *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_pci_capabilities_print(const struct tools_open_pci_capabilities *ptr_struct, FILE* file, int indent_level);
+int tools_open_pci_capabilities_size(void);
+#define TOOLS_OPEN_PCI_CAPABILITIES_SIZE (0x18)
+void tools_open_pci_capabilities_dump(const struct tools_open_pci_capabilities *ptr_struct, FILE* file);
+/* pci_configuration */
+void tools_open_pci_configuration_pack(const struct tools_open_pci_configuration *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_pci_configuration_unpack(struct tools_open_pci_configuration *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_pci_configuration_print(const struct tools_open_pci_configuration *ptr_struct, FILE* file, int indent_level);
+int tools_open_pci_configuration_size(void);
+#define TOOLS_OPEN_PCI_CONFIGURATION_SIZE (0xc)
+void tools_open_pci_configuration_dump(const struct tools_open_pci_configuration *ptr_struct, FILE* file);
/* iscsi_settings */
void tools_open_iscsi_settings_pack(const struct tools_open_iscsi_settings *ptr_struct, u_int8_t* ptr_buff);
void tools_open_iscsi_settings_unpack(struct tools_open_iscsi_settings *ptr_struct, const u_int8_t* ptr_buff);
projects / ~adrianc / mstflint.git / commitdiff