staging: comedi: pcl812: convert boardinfo declaration to C99 format

To reduce editing errors and make the data more maintainable, convert
the boardinfo declaration to C99 format.

For aesthetics, move the declaration closer to the definition and remove
the unnecessary comments in the definition.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/pcl812.c b/drivers/staging/comedi/drivers/pcl812.c
index 095b3253054af20c4efd7bf03c8807e00401c15e..609036005169ab7f0c2f51c68e8e66eb9ce19e7d 100644 (file)
--- a/drivers/staging/comedi/drivers/pcl812.c
+++ b/drivers/staging/comedi/drivers/pcl812.c
@@ -331,23 +331,332 @@ static const struct comedi_lrange range_a821pgh_ai = {
 };
 
 struct pcl812_board {
-
-       const char *name;       /*  board name */
-       int board_type;         /*  type of this board */
-       int n_aichan;           /*  num of AI chans in S.E. */
-       int n_aichan_diff;      /*  DIFF num of chans */
-       int n_aochan;           /*  num of DA chans */
-       int n_dichan;           /*  DI and DO chans */
+       const char *name;
+       int board_type;
+       int n_aichan;
+       int n_aichan_diff;
+       int n_aochan;
+       int n_dichan;
        int n_dochan;
-       int ai_maxdata;         /*  AI resolution */
-       unsigned int ai_ns_min; /*  max sample speed of card v ns */
-       unsigned int i8254_osc_base;    /*  clock base */
-       const struct comedi_lrange *rangelist_ai;       /*  rangelist for A/D */
-       const struct comedi_lrange *rangelist_ao;       /*  rangelist for D/A */
-       unsigned int IRQbits;   /*  allowed IRQ */
-       unsigned char DMAbits;  /*  allowed DMA chans */
-       unsigned char io_range; /*  iorange for this board */
-       unsigned char haveMPC508;       /*  1=board use MPC508A multiplexor */
+       int ai_maxdata;
+       unsigned int ai_ns_min;
+       unsigned int i8254_osc_base;
+       const struct comedi_lrange *rangelist_ai;
+       const struct comedi_lrange *rangelist_ao;
+       unsigned int IRQbits;
+       unsigned char DMAbits;
+       unsigned char io_range;
+       unsigned char haveMPC508;
+};
+
+static const struct pcl812_board boardtypes[] = {
+       {
+               .name           = "pcl812",
+               .board_type     = boardPCL812,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 0,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 33000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_bipolar10,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "pcl812pg",
+               .board_type     = boardPCL812PG,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 0,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 33000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_pcl812pg_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "acl8112pg",
+               .board_type     = boardPCL812PG,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 0,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_pcl812pg_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "acl8112dg",
+               .board_type     = boardACL8112,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_acl8112dg_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 1,
+       }, {
+               .name           = "acl8112hg",
+               .board_type     = boardACL8112,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_acl8112hg_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 1,
+       }, {
+               .name           = "a821pgl",
+               .board_type     = boardA821,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 1,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_pcl813b_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0x000c,
+               .DMAbits        = 0x00,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "a821pglnda",
+               .board_type     = boardA821,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 0,
+               .n_dichan       = 0,
+               .n_dochan       = 0,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_pcl813b_ai,
+               .rangelist_ao   = NULL,
+               .IRQbits        = 0x000c,
+               .DMAbits        = 0x00,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "a821pgh",
+               .board_type     = boardA821,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 1,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_a821pgh_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0x000c,
+               .DMAbits        = 0x00,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "a822pgl",
+               .board_type     = boardACL8112,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_acl8112dg_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "a822pgh",
+               .board_type     = boardACL8112,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_acl8112hg_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "a823pgl",
+               .board_type     = boardACL8112,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 8000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_acl8112dg_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "a823pgh",
+               .board_type     = boardACL8112,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 8000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_acl8112hg_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "pcl813",
+               .board_type     = boardPCL813,
+               .n_aichan       = 32,
+               .n_aichan_diff  = 0,
+               .n_aochan       = 0,
+               .n_dichan       = 0,
+               .n_dochan       = 0,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 0,
+               .i8254_osc_base = 0,
+               .rangelist_ai   = &range_pcl813b_ai,
+               .rangelist_ao   = NULL,
+               .IRQbits        = 0x0000,
+               .DMAbits        = 0x00,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "pcl813b",
+               .board_type     = boardPCL813B,
+               .n_aichan       = 32,
+               .n_aichan_diff  = 0,
+               .n_aochan       = 0,
+               .n_dichan       = 0,
+               .n_dochan       = 0,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 0,
+               .i8254_osc_base = 0,
+               .rangelist_ai   = &range_pcl813b_ai,
+               .rangelist_ao   = NULL,
+               .IRQbits        = 0x0000,
+               .DMAbits        = 0x00,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "acl8113",
+               .board_type     = boardACL8113,
+               .n_aichan       = 32,
+               .n_aichan_diff  = 0,
+               .n_aochan       = 0,
+               .n_dichan       = 0,
+               .n_dochan       = 0,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 0,
+               .i8254_osc_base = 0,
+               .rangelist_ai   = &range_acl8113_1_ai,
+               .rangelist_ao   = NULL,
+               .IRQbits        = 0x0000,
+               .DMAbits        = 0x00,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "iso813",
+               .board_type     = boardISO813,
+               .n_aichan       = 32,
+               .n_aichan_diff  = 0,
+               .n_aochan       = 0,
+               .n_dichan       = 0,
+               .n_dochan       = 0,
+               .ai_maxdata     = 0x0fff,
+               .ai_ns_min      = 0,
+               .i8254_osc_base = 0,
+               .rangelist_ai   = &range_iso813_1_ai,
+               .rangelist_ao   = NULL,
+               .IRQbits        = 0x0000,
+               .DMAbits        = 0x00,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       }, {
+               .name           = "acl8216",
+               .board_type     = boardACL8216,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0xffff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_pcl813b2_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 1,
+       }, {
+               .name           = "a826pg",
+               .board_type     = boardACL8216,
+               .n_aichan       = 16,
+               .n_aichan_diff  = 8,
+               .n_aochan       = 2,
+               .n_dichan       = 16,
+               .n_dochan       = 16,
+               .ai_maxdata     = 0xffff,
+               .ai_ns_min      = 10000,
+               .i8254_osc_base = I8254_OSC_BASE_2MHZ,
+               .rangelist_ai   = &range_pcl813b2_ai,
+               .rangelist_ao   = &range_unipolar5,
+               .IRQbits        = 0xdcfc,
+               .DMAbits        = 0x0a,
+               .io_range       = PCLx1x_IORANGE,
+               .haveMPC508     = 0,
+       },
 };
 
 struct pcl812_private {
@@ -1400,63 +1709,6 @@ static void pcl812_detach(struct comedi_device *dev)
        comedi_legacy_detach(dev);
 }
 
-static const struct pcl812_board boardtypes[] = {
-       {"pcl812", boardPCL812, 16, 0, 2, 16, 16, 0x0fff,
-        33000, I8254_OSC_BASE_2MHZ, &range_bipolar10, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 0},
-       {"pcl812pg", boardPCL812PG, 16, 0, 2, 16, 16, 0x0fff,
-        33000, I8254_OSC_BASE_2MHZ, &range_pcl812pg_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 0},
-       {"acl8112pg", boardPCL812PG, 16, 0, 2, 16, 16, 0x0fff,
-        10000, I8254_OSC_BASE_2MHZ, &range_pcl812pg_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 0},
-       {"acl8112dg", boardACL8112, 16, 8, 2, 16, 16, 0x0fff,
-        10000, I8254_OSC_BASE_2MHZ, &range_acl8112dg_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 1},
-       {"acl8112hg", boardACL8112, 16, 8, 2, 16, 16, 0x0fff,
-        10000, I8254_OSC_BASE_2MHZ, &range_acl8112hg_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 1},
-       {"a821pgl", boardA821, 16, 8, 1, 16, 16, 0x0fff,
-        10000, I8254_OSC_BASE_2MHZ, &range_pcl813b_ai, &range_unipolar5,
-        0x000c, 0x00, PCLx1x_IORANGE, 0},
-       {"a821pglnda", boardA821, 16, 8, 0, 0, 0, 0x0fff,
-        10000, I8254_OSC_BASE_2MHZ, &range_pcl813b_ai, NULL,
-        0x000c, 0x00, PCLx1x_IORANGE, 0},
-       {"a821pgh", boardA821, 16, 8, 1, 16, 16, 0x0fff,
-        10000, I8254_OSC_BASE_2MHZ, &range_a821pgh_ai, &range_unipolar5,
-        0x000c, 0x00, PCLx1x_IORANGE, 0},
-       {"a822pgl", boardACL8112, 16, 8, 2, 16, 16, 0x0fff,
-        10000, I8254_OSC_BASE_2MHZ, &range_acl8112dg_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 0},
-       {"a822pgh", boardACL8112, 16, 8, 2, 16, 16, 0x0fff,
-        10000, I8254_OSC_BASE_2MHZ, &range_acl8112hg_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 0},
-       {"a823pgl", boardACL8112, 16, 8, 2, 16, 16, 0x0fff,
-        8000, I8254_OSC_BASE_2MHZ, &range_acl8112dg_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 0},
-       {"a823pgh", boardACL8112, 16, 8, 2, 16, 16, 0x0fff,
-        8000, I8254_OSC_BASE_2MHZ, &range_acl8112hg_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 0},
-       {"pcl813", boardPCL813, 32, 0, 0, 0, 0, 0x0fff,
-        0, 0, &range_pcl813b_ai, NULL,
-        0x0000, 0x00, PCLx1x_IORANGE, 0},
-       {"pcl813b", boardPCL813B, 32, 0, 0, 0, 0, 0x0fff,
-        0, 0, &range_pcl813b_ai, NULL,
-        0x0000, 0x00, PCLx1x_IORANGE, 0},
-       {"acl8113", boardACL8113, 32, 0, 0, 0, 0, 0x0fff,
-        0, 0, &range_acl8113_1_ai, NULL,
-        0x0000, 0x00, PCLx1x_IORANGE, 0},
-       {"iso813", boardISO813, 32, 0, 0, 0, 0, 0x0fff,
-        0, 0, &range_iso813_1_ai, NULL,
-        0x0000, 0x00, PCLx1x_IORANGE, 0},
-       {"acl8216", boardACL8216, 16, 8, 2, 16, 16, 0xffff,
-        10000, I8254_OSC_BASE_2MHZ, &range_pcl813b2_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 1},
-       {"a826pg", boardACL8216, 16, 8, 2, 16, 16, 0xffff,
-        10000, I8254_OSC_BASE_2MHZ, &range_pcl813b2_ai, &range_unipolar5,
-        0xdcfc, 0x0a, PCLx1x_IORANGE, 0},
-};
-
 static struct comedi_driver pcl812_driver = {
        .driver_name    = "pcl812",
        .module         = THIS_MODULE,