- compatible: Should be "atmel,<chip>-aic"
- interrupt-controller: Identifies the node as an interrupt controller.
- interrupt-parent: For single AIC system, it is an empty property.
-- #interrupt-cells: The number of cells to define the interrupts. It sould be 3.
+- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
The second cell is used to specify flags:
bits[3:0] trigger type and level flags:
Optional
- interrupts : Interrupt source of the parent interrupt controller on
- secondary GICs, or VGIC maintainance interrupt on primary GIC (see
+ secondary GICs, or VGIC maintenance interrupt on primary GIC (see
below).
- cpu-offset : per-cpu offset within the distributor and cpu interface
virtual interface control register base and size. The 2nd additional
region is the GIC virtual cpu interface register base and size.
-- interrupts : VGIC maintainance interrupt.
+- interrupts : VGIC maintenance interrupt.
Example:
- OMAP3 Tobi with Overo : Commercial expansion board with daughter board
compatible = "ti,omap3-tobi", "ti,omap3-overo", "ti,omap3"
-- OMAP4 SDP : Software Developement Board
+- OMAP4 SDP : Software Development Board
compatible = "ti,omap4-sdp", "ti,omap4430"
- OMAP4 PandaBoard : Low cost community board
compatible = "ti,omap4-panda", "ti,omap4430"
-- OMAP3 EVM : Software Developement Board for OMAP35x, AM/DM37x
+- OMAP3 EVM : Software Development Board for OMAP35x, AM/DM37x
compatible = "ti,omap3-evm", "ti,omap3"
-- AM335X EVM : Software Developement Board for AM335x
+- AM335X EVM : Software Development Board for AM335x
compatible = "ti,am335x-evm", "ti,am33xx", "ti,omap3"
- AM335X Bone : Low cost community board
* DMA Engine.
The Octeon DMA Engine transfers between the Boot Bus and main memory.
-The DMA Engine will be refered to by phandle by any device that is
+The DMA Engine will be referred to by phandle by any device that is
connected to it.
Properties:
* compatible: should be
- "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
- specific extentions.
+ specific extensions.
- "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
- specific extentions.
+ specific extensions.
- "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
- specific extentions.
+ specific extensions.
* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
};
Note: This example shows both SoC specific and board specific properties
- in a single device node. The properties can be actually be seperated
+ in a single device node. The properties can be actually be separated
into SoC specific node and board specific node.
Definition: Must include "fsl,srio" for IP blocks with IP Block
Revision Register (SRIO IPBRR1) Major ID equal to 0x01c0.
- Optionally, a compatiable string of "fsl,srio-vX.Y" where X is Major
+ Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major
version in IP Block Revision Register and Y is Minor version. If this
- compatiable is provided it should be ordered before "fsl,srio".
+ compatible is provided it should be ordered before "fsl,srio".
- reg
Usage: required
- ti,vsel1-gpio: Gpio for controlling VSEL1 line.
If this property is missing, then assume that there is no GPIO
for vsel1 control.
-- ti,vsel0-state-high: Inital state of vsel0 input is high.
+- ti,vsel0-state-high: Initial state of vsel0 input is high.
If this property is missing, then assume the state as low (0).
-- ti,vsel1-state-high: Inital state of vsel1 input is high.
+- ti,vsel1-state-high: Initial state of vsel1 input is high.
If this property is missing, then assume the state as low (0).
Any property defined as part of the core regulator binding, defined in
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: Two interrupt numbers to the cpu should be specified. First
- interrupt number is the rtc alarm interupt and second interrupt number
+ interrupt number is the rtc alarm interrupt and second interrupt number
is the rtc tick interrupt. The number of cells representing a interrupt
depends on the parent interrupt controller.
The Samsung's Watchdog controller is used for resuming system operation
after a preset amount of time during which the WDT reset event has not
-occured.
+occurred.
Required properties:
- compatible : should be "samsung,s3c2410-wdt"
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