]> git.openfabrics.org - ~shefty/rdma-dev.git/commitdiff
isci: Implement SCU AFE recipe 10.
authorMaciej Patelczyk <maciej.patelczyk@intel.com>
Wed, 27 Apr 2011 17:50:50 +0000 (17:50 +0000)
committerDan Williams <dan.j.williams@intel.com>
Sun, 3 Jul 2011 11:00:38 +0000 (04:00 -0700)
Updated SCU AFE initialization values accordingly to the recipe 10.

Signed-off-by: Maciej Patelczyk <maciej.patelczyk@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/scsi/isci/core/scic_sds_controller.c

index c684d9ec8c97d4883b9734e8bb148f57e49460c3..5e8dea57b5ef1ba74825bd5f2348dfd50730d68d 100644 (file)
@@ -442,11 +442,20 @@ static void scic_sds_controller_afe_initialization(struct scic_sds_controller *s
        writel(0x0081000f, &scic->scu_registers->afe.afe_dfx_master_control0);
        udelay(AFE_REGISTER_WRITE_DELAY);
 
+       if (is_b0()) {
+               /* PM Rx Equalization Save, PM SPhy Rx Acknowledgement
+                * Timer, PM Stagger Timer */
+               writel(0x0007BFFF, &scic->scu_registers->afe.afe_pmsn_master_control2);
+               udelay(AFE_REGISTER_WRITE_DELAY);
+       }
+
        /* Configure bias currents to normal */
        if (is_a0())
                writel(0x00005500, &scic->scu_registers->afe.afe_bias_control);
-       else
+       else if (is_a2())
                writel(0x00005A00, &scic->scu_registers->afe.afe_bias_control);
+       else if (is_b0())
+               writel(0x00005F00, &scic->scu_registers->afe.afe_bias_control);
 
        udelay(AFE_REGISTER_WRITE_DELAY);
 
@@ -464,7 +473,7 @@ static void scic_sds_controller_afe_initialization(struct scic_sds_controller *s
                udelay(AFE_REGISTER_WRITE_DELAY);
        } while ((afe_status & 0x00001000) == 0);
 
-       if (is_b0()) {
+       if (is_a0() || is_a2()) {
                /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
                writel(0x7bcc96ad, &scic->scu_registers->afe.afe_pmsn_master_control0);
                udelay(AFE_REGISTER_WRITE_DELAY);