drm/radeon: use sw CTS/N values for audio on DCE4+

Use the driver calculated CTS and N values rather than
having hardware generate them.  This allows us to use
the modeline pixel clock rather than the actual pll clock
when setting up the dto for audio.  Fixes problems with
audio playback rate on certain asics if the pll clock
does not match the pixel clock exactly.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index fe1de855775ecca1491ced31f797f5cac6d05abc..57fcc4b16a526d166fd6be21955a86d5ee7d87dc 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -291,6 +291,7 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
        /* fglrx clears sth in AFMT_AUDIO_PACKET_CONTROL2 here */
 
        WREG32(HDMI_ACR_PACKET_CONTROL + offset,
+              HDMI_ACR_SOURCE | /* select SW CTS value */
               HDMI_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
 
        evergreen_hdmi_update_ACR(encoder, mode->clock);