(Linux, 13/02/07, Michael S. Tsirkin, commit:
1d1f19cfce7687b557cebdc41bf8a5eeba8a9882)
MTTs are allocated in non-cache-coherent memory, so we must give
reserved MTTs their own cache line, to prevent both device and
CPU from writing into the same cache line at the same time.
git-svn-id: svn://openib.tc.cornell.edu/gen1@1509
ad392aa1-c5ef-ae45-8dd8-
e69d62a5ef86
goto err_unmap_aux;\r
}\r
\r
+ /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */\r
+ mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE,\r
+ dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE;\r
+ \r
mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,\r
MTHCA_MTT_SEG_SIZE,\r
mdev->limits.num_mtt_segs,\r