if (pciSettingsTlv.sriov_valid) {
_sriovEn = pciSettingsTlv.sriov_en;
_numOfVfs = pciSettingsTlv.total_vfs;
- _updated = true;
}
if (pciSettingsTlv.fpp_valid) {
_fppEn = pciSettingsTlv.fpp_en;
- _updated = true;
}
+
+ _updated = true;
+
return MCE_SUCCESS;
}
{
MError mRc;
- if (_fppEn == MLXCFG_UNKNOWN && (_sriovEn == MLXCFG_UNKNOWN || _numOfVfs == MLXCFG_UNKNOWN)) {
+ if ((_fppEn == MLXCFG_UNKNOWN) && (_sriovEn == MLXCFG_UNKNOWN || _numOfVfs == MLXCFG_UNKNOWN)) {
return errmsg("%s please specify all the parameters for SRIOV settings.", err() ? err() : "");
}
if (pciSettingsTlv.sriov_en && !pciSettingsTlv.fpp_en) {
return errmsg("FPP should be enabled while SRIOV is enabled");
}
- /* Turning on FPP where num of PFs < 2 in devices with dual ports (max pfs > 1)
- * should apply numOfPfs to 2 */
- if (pciSettingsTlv.fpp_en && _numPfsSupported && (_maxNumPfs > 1) && (pciSettingsTlv.num_pfs < 2)) {
- pciSettingsTlv.num_pfs = 2;
- }
// pack it
tools_open_pci_configuration_pack(&pciSettingsTlv, tlvBuff);
_sriovSupported = pciCapabilitesTlv.sriov_support;
_maxVfsPerPf = pciCapabilitesTlv.max_vfs_per_pf_valid ? pciCapabilitesTlv.max_vfs_per_pf : 0;
_fppSupported = pciCapabilitesTlv.fpp_support;
- _numPfsSupported = pciCapabilitesTlv.num_pfs_supported;
- _maxNumPfs = pciCapabilitesTlv.max_num_pfs;
return MCE_SUCCESS;
}
{
public:
PciParams5thGen() : CfgParams(Mct_Pci, PCI_SETTINGS_TYPE) , _sriovEn(MLXCFG_UNKNOWN), _numOfVfs(MLXCFG_UNKNOWN),\
- _fppEn(MLXCFG_UNKNOWN), _sriovSupported(false), _maxVfsPerPf(0), _fppSupported(false),\
- _numPfsSupported(false), _maxNumPfs(0){}
+ _fppEn(MLXCFG_UNKNOWN), _sriovSupported(false), _maxVfsPerPf(0), _fppSupported(false){}
~PciParams5thGen() {};
virtual bool cfgSupported(mfile* mf);
bool _sriovSupported;
u_int32_t _maxVfsPerPf;
bool _fppSupported;
- bool _numPfsSupported;
- u_int32_t _maxNumPfs;
};