net: phy: bcm7xxx: enable EEE at the PHY level

The 28nm Gigabit PHY on BCM7xxx chips comes out of reset with absolutely
no EEE capabilities, such that we would actually return that we do not
support EEE when accessing 3.20 (MDIO_PCS_EEE_ABLE) registers.

Poke through the vendor-specific C45 register to enable EEE globally at
the PHY level, and advertise supported EEE modes.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 29e256a4ed57a02e448fd87f066697c743daed51..e98c510b75c523de11cb2f238969d2c4c7581d5d 100644 (file)
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -14,6 +14,7 @@
 #include <linux/delay.h>
 #include <linux/bitops.h>
 #include <linux/brcmphy.h>
+#include <linux/mdio.h>
 
 /* Broadcom BCM7xxx internal PHY registers */
 #define MII_BCM7XXX_CHANNEL_WIDTH      0x2000
@@ -167,6 +168,32 @@ static int bcm7xxx_apd_enable(struct phy_device *phydev)
        return bcm54xx_shadow_write(phydev, BCM54XX_SHD_APD, val);
 }
 
+static int bcm7xxx_eee_enable(struct phy_device *phydev)
+{
+       int val;
+
+       val = phy_read_mmd_indirect(phydev, BRCM_CL45VEN_EEE_CONTROL,
+                                   MDIO_MMD_AN, phydev->addr);
+       if (val < 0)
+               return val;
+
+       /* Enable general EEE feature at the PHY level */
+       val |= LPI_FEATURE_EN | LPI_FEATURE_EN_DIG1000X;
+
+       phy_write_mmd_indirect(phydev, BRCM_CL45VEN_EEE_CONTROL,
+                              MDIO_MMD_AN, phydev->addr, val);
+
+       /* Advertise supported modes */
+       val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
+                                   MDIO_MMD_AN, phydev->addr);
+
+       val |= (MDIO_AN_EEE_ADV_100TX | MDIO_AN_EEE_ADV_1000T);
+       phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
+                              MDIO_MMD_AN, phydev->addr, val);
+
+       return 0;
+}
+
 static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
 {
        int ret;
@@ -179,6 +206,10 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
        if (ret)
                return ret;
 
+       ret = bcm7xxx_eee_enable(phydev);
+       if (ret)
+               return ret;
+
        return bcm7xxx_apd_enable(phydev);
 }
 

diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h
index 722cf26567fa517ebbfa439c7069cf79ae5afd99..ee1431d976fa7e9ba0643a94d268dc3e214faa92 100644 (file)
--- a/include/linux/brcmphy.h
+++ b/include/linux/brcmphy.h
@@ -214,5 +214,8 @@ static inline int bcm54xx_shadow_write(struct phy_device *phydev, u16 shadow,
                         MII_BCM54XX_SHD_DATA(val));
 }
 
+#define BRCM_CL45VEN_EEE_CONTROL       0x803d
+#define LPI_FEATURE_EN                 0x8000
+#define LPI_FEATURE_EN_DIG1000X                0x4000
 
 #endif /* _LINUX_BRCMPHY_H */