]> git.openfabrics.org - ~emulex/infiniband.git/commitdiff
sh: clkfwk: module_clk -> peripheral_clk rename.
authorPaul Mundt <lethal@linux-sh.org>
Wed, 13 May 2009 07:59:40 +0000 (16:59 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Wed, 13 May 2009 07:59:40 +0000 (16:59 +0900)
For consistenct naming, and to allow us to fix up some confusion in the
SH-Mobile clock framework, amongst other places.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
23 files changed:
arch/sh/kernel/cpu/clock.c
arch/sh/kernel/cpu/sh2/setup-sh7619.c
arch/sh/kernel/cpu/sh2a/setup-mxg.c
arch/sh/kernel/cpu/sh2a/setup-sh7201.c
arch/sh/kernel/cpu/sh2a/setup-sh7203.c
arch/sh/kernel/cpu/sh2a/setup-sh7206.c
arch/sh/kernel/cpu/sh3/setup-sh7705.c
arch/sh/kernel/cpu/sh3/setup-sh770x.c
arch/sh/kernel/cpu/sh3/setup-sh7710.c
arch/sh/kernel/cpu/sh3/setup-sh7720.c
arch/sh/kernel/cpu/sh4/setup-sh4-202.c
arch/sh/kernel/cpu/sh4/setup-sh7750.c
arch/sh/kernel/cpu/sh4/setup-sh7760.c
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
arch/sh/kernel/cpu/sh4a/setup-shx3.c
arch/sh/kernel/cpu/sh5/setup-sh5.c
drivers/i2c/busses/i2c-sh7760.c
drivers/serial/sh-sci.c
sound/oss/sh_dac_audio.c

index 61ff227561dce6432c6a1191f4d609ae7a0494a6..0eedf93926471a8a180b70d485ed9c3ffb2f7854 100644 (file)
@@ -50,8 +50,8 @@ static struct clk master_clk = {
        .rate           = CONFIG_SH_PCLK_FREQ,
 };
 
-static struct clk module_clk = {
-       .name           = "module_clk",
+static struct clk peripheral_clk = {
+       .name           = "peripheral_clk",
        .parent         = &master_clk,
        .flags          = CLK_ENABLE_ON_INIT,
 };
@@ -73,7 +73,7 @@ static struct clk cpu_clk = {
  */
 static struct clk *onchip_clocks[] = {
        &master_clk,
-       &module_clk,
+       &peripheral_clk,
        &bus_clk,
        &cpu_clk,
 };
index 94ac27fc2237d37246bfbe083c58ebce33a383c1..13798733f2db93f6db46bf40d4347a3162fcde75 100644 (file)
@@ -115,7 +115,7 @@ static struct sh_timer_config cmt0_platform_data = {
        .name = "CMT0",
        .channel_offset = 0x02,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 125,
        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
@@ -147,7 +147,7 @@ static struct sh_timer_config cmt1_platform_data = {
        .name = "CMT1",
        .channel_offset = 0x08,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 125,
        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
index a452d9649069e8dc4a9fd425aa180aa96ab51c5d..869c2da4820b3b763142146ab1b16deb288dcc06 100644 (file)
@@ -118,7 +118,7 @@ static struct sh_timer_config mtu2_0_platform_data = {
        .name = "MTU2_0",
        .channel_offset = -0x80,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -149,7 +149,7 @@ static struct sh_timer_config mtu2_1_platform_data = {
        .name = "MTU2_1",
        .channel_offset = -0x100,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -180,7 +180,7 @@ static struct sh_timer_config mtu2_2_platform_data = {
        .name = "MTU2_2",
        .channel_offset = 0x80,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
index 772358b7685ed86db69e416fa25f510d9dba5331..d8febe12806620cee8058b874a454039bc029f89 100644 (file)
@@ -255,7 +255,7 @@ static struct sh_timer_config mtu2_0_platform_data = {
        .name = "MTU2_0",
        .channel_offset = -0x80,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -286,7 +286,7 @@ static struct sh_timer_config mtu2_1_platform_data = {
        .name = "MTU2_1",
        .channel_offset = -0x100,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -317,7 +317,7 @@ static struct sh_timer_config mtu2_2_platform_data = {
        .name = "MTU2_2",
        .channel_offset = 0x80,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
index d7493418ba60b81023bc5e033451a688c24c89c3..62e3039d2398ad0071044b0d1f4a7423d08e9d4d 100644 (file)
@@ -211,7 +211,7 @@ static struct sh_timer_config cmt0_platform_data = {
        .name = "CMT0",
        .channel_offset = 0x02,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 125,
        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
@@ -243,7 +243,7 @@ static struct sh_timer_config cmt1_platform_data = {
        .name = "CMT1",
        .channel_offset = 0x08,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 125,
        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
@@ -275,7 +275,7 @@ static struct sh_timer_config mtu2_0_platform_data = {
        .name = "MTU2_0",
        .channel_offset = -0x80,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -306,7 +306,7 @@ static struct sh_timer_config mtu2_1_platform_data = {
        .name = "MTU2_1",
        .channel_offset = -0x100,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
index 2fc6bff5c5fb1fa75d519b3242a65b78f3939ebd..3e6f3d7a58be990cbaa06b5022ab1624be92b8fb 100644 (file)
@@ -171,7 +171,7 @@ static struct sh_timer_config cmt0_platform_data = {
        .name = "CMT0",
        .channel_offset = 0x02,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 125,
        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
@@ -203,7 +203,7 @@ static struct sh_timer_config cmt1_platform_data = {
        .name = "CMT1",
        .channel_offset = 0x08,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 125,
        .clocksource_rating = 0, /* disabled due to code generation issues */
 };
@@ -235,7 +235,7 @@ static struct sh_timer_config mtu2_0_platform_data = {
        .name = "MTU2_0",
        .channel_offset = -0x80,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -266,7 +266,7 @@ static struct sh_timer_config mtu2_1_platform_data = {
        .name = "MTU2_1",
        .channel_offset = -0x100,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -297,7 +297,7 @@ static struct sh_timer_config mtu2_2_platform_data = {
        .name = "MTU2_2",
        .channel_offset = 0x80,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
index 39513664d5d732108c2dd3d7277828576538388b..88f742fed9edf445269743a6f5198c656ebc9117 100644 (file)
@@ -121,7 +121,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x02,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -152,7 +152,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0xe,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -183,7 +183,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1a,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
index 9412d915b84ed870cc770726ab95d5010fd827c8..c56306798584f68989ab9d5c82c89071141122e1 100644 (file)
@@ -149,7 +149,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x02,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -180,7 +180,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0xe,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -211,7 +211,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1a,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
index 07ff38d055a76e5f7c90b4af46e96552e28433fe..efa76c8148f4e4d2ab7807852d07c3aa5e3cc918 100644 (file)
@@ -125,7 +125,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x02,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -156,7 +156,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0xe,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -187,7 +187,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1a,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
index d8b46f5dff607b0949e1055b9f22a67c7ae13048..5b2107798edbe3fc804a19940c63def3e0dc850b 100644 (file)
@@ -128,7 +128,7 @@ static struct sh_timer_config cmt0_platform_data = {
        .name = "CMT0",
        .channel_offset = 0x10,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 125,
        .clocksource_rating = 125,
 };
@@ -160,7 +160,7 @@ static struct sh_timer_config cmt1_platform_data = {
        .name = "CMT1",
        .channel_offset = 0x20,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource cmt1_resources[] = {
@@ -190,7 +190,7 @@ static struct sh_timer_config cmt2_platform_data = {
        .name = "CMT2",
        .channel_offset = 0x30,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource cmt2_resources[] = {
@@ -220,7 +220,7 @@ static struct sh_timer_config cmt3_platform_data = {
        .name = "CMT3",
        .channel_offset = 0x40,
        .timer_bit = 3,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource cmt3_resources[] = {
@@ -250,7 +250,7 @@ static struct sh_timer_config cmt4_platform_data = {
        .name = "CMT4",
        .channel_offset = 0x50,
        .timer_bit = 4,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource cmt4_resources[] = {
@@ -280,7 +280,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x02,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -311,7 +311,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0xe,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -342,7 +342,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1a,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
index be79fa136255fe845d9641cdca1ed0b836e94285..6d088d12359172f8b8b9d9e99ee3162ad46f06a5 100644 (file)
@@ -38,7 +38,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -69,7 +69,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -100,7 +100,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
index 09da0c187d4cd0ae467bf30eb1ecaa80727d330d..851672d15cf4a15e5f3b2208681417a269d1ba99 100644 (file)
@@ -65,7 +65,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -96,7 +96,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -127,7 +127,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
@@ -162,7 +162,7 @@ static struct sh_timer_config tmu3_platform_data = {
        .name = "TMU3",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu3_resources[] = {
@@ -192,7 +192,7 @@ static struct sh_timer_config tmu4_platform_data = {
        .name = "TMU4",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu4_resources[] = {
index cd097335758f135cabe2d22f160cdb20d3bb24d1..5b822519bd90cb7593b74338b9442adc734caab9 100644 (file)
@@ -164,7 +164,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -195,7 +195,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -226,7 +226,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
index c91f34c9aa83a1d0b1620daa7774fd7130494765..f1e0c0d36da74121e6a3d40933da1813c7bbe6e2 100644 (file)
@@ -118,7 +118,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -149,7 +149,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -180,7 +180,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
@@ -210,7 +210,7 @@ static struct sh_timer_config tmu3_platform_data = {
        .name = "TMU3",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu3_resources[] = {
@@ -240,7 +240,7 @@ static struct sh_timer_config tmu4_platform_data = {
        .name = "TMU4",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu4_resources[] = {
@@ -270,7 +270,7 @@ static struct sh_timer_config tmu5_platform_data = {
        .name = "TMU5",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu5_resources[] = {
index b61d6143aaaa9d8f417160e59ca5c97f06fbf6e5..12fb8752d4ff74681934c83f7ca90ac5d00298dd 100644 (file)
@@ -81,7 +81,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -112,7 +112,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -143,7 +143,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
@@ -173,7 +173,7 @@ static struct sh_timer_config tmu3_platform_data = {
        .name = "TMU3",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu3_resources[] = {
@@ -203,7 +203,7 @@ static struct sh_timer_config tmu4_platform_data = {
        .name = "TMU4",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu4_resources[] = {
@@ -233,7 +233,7 @@ static struct sh_timer_config tmu5_platform_data = {
        .name = "TMU5",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu5_resources[] = {
@@ -263,7 +263,7 @@ static struct sh_timer_config tmu6_platform_data = {
        .name = "TMU6",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu6_resources[] = {
@@ -293,7 +293,7 @@ static struct sh_timer_config tmu7_platform_data = {
        .name = "TMU7",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu7_resources[] = {
@@ -323,7 +323,7 @@ static struct sh_timer_config tmu8_platform_data = {
        .name = "TMU8",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu8_resources[] = {
index f1df0209506294de0e4847fb1410df6d8ff5dc09..715e05b431e5e7f4b8c027f608803fab0d8edaba 100644 (file)
@@ -18,7 +18,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -49,7 +49,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -80,7 +80,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
@@ -110,7 +110,7 @@ static struct sh_timer_config tmu3_platform_data = {
        .name = "TMU3",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu3_resources[] = {
@@ -140,7 +140,7 @@ static struct sh_timer_config tmu4_platform_data = {
        .name = "TMU4",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu4_resources[] = {
@@ -170,7 +170,7 @@ static struct sh_timer_config tmu5_platform_data = {
        .name = "TMU5",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu5_resources[] = {
index dc5d3e507a219fc913d1ffa55e5f206b1d679102..d7e77bc77e288aa7ed5385c5df3ae824c706ea28 100644 (file)
@@ -20,7 +20,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -51,7 +51,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -82,7 +82,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
@@ -112,7 +112,7 @@ static struct sh_timer_config tmu3_platform_data = {
        .name = "TMU3",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu3_resources[] = {
@@ -142,7 +142,7 @@ static struct sh_timer_config tmu4_platform_data = {
        .name = "TMU4",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu4_resources[] = {
@@ -172,7 +172,7 @@ static struct sh_timer_config tmu5_platform_data = {
        .name = "TMU5",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu5_resources[] = {
index 2c464bf5a89900deed9ae942a0272660325fd308..93e0d2c017e8235cbc7267244eb688e82a8b251c 100644 (file)
@@ -75,7 +75,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -106,7 +106,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -137,7 +137,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
@@ -167,7 +167,7 @@ static struct sh_timer_config tmu3_platform_data = {
        .name = "TMU3",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu3_resources[] = {
@@ -197,7 +197,7 @@ static struct sh_timer_config tmu4_platform_data = {
        .name = "TMU4",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu4_resources[] = {
@@ -227,7 +227,7 @@ static struct sh_timer_config tmu5_platform_data = {
        .name = "TMU5",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu5_resources[] = {
@@ -257,7 +257,7 @@ static struct sh_timer_config tmu6_platform_data = {
        .name = "TMU6",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu6_resources[] = {
@@ -287,7 +287,7 @@ static struct sh_timer_config tmu7_platform_data = {
        .name = "TMU7",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu7_resources[] = {
@@ -317,7 +317,7 @@ static struct sh_timer_config tmu8_platform_data = {
        .name = "TMU8",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu8_resources[] = {
@@ -347,7 +347,7 @@ static struct sh_timer_config tmu9_platform_data = {
        .name = "TMU9",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu9_resources[] = {
@@ -377,7 +377,7 @@ static struct sh_timer_config tmu10_platform_data = {
        .name = "TMU10",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu10_resources[] = {
@@ -407,7 +407,7 @@ static struct sh_timer_config tmu11_platform_data = {
        .name = "TMU11",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu11_resources[] = {
index 9d5185b42f13dc3436a58af7f39bb427b1332b83..53c65fd9ccef726d015cd71b664a151842e4731d 100644 (file)
@@ -53,7 +53,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -84,7 +84,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -115,7 +115,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
@@ -145,7 +145,7 @@ static struct sh_timer_config tmu3_platform_data = {
        .name = "TMU3",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu3_resources[] = {
@@ -175,7 +175,7 @@ static struct sh_timer_config tmu4_platform_data = {
        .name = "TMU4",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu4_resources[] = {
@@ -205,7 +205,7 @@ static struct sh_timer_config tmu5_platform_data = {
        .name = "TMU5",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu5_resources[] = {
index 678d69bdebbae823d2e05de3ef62db44339e0bbd..f5ff1ac57fc2879a9cd39978fe77038e2c8981a6 100644 (file)
@@ -75,7 +75,7 @@ static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
        .timer_bit = 0,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clockevent_rating = 200,
 };
 
@@ -106,7 +106,7 @@ static struct sh_timer_config tmu1_platform_data = {
        .name = "TMU1",
        .channel_offset = 0x10,
        .timer_bit = 1,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
        .clocksource_rating = 200,
 };
 
@@ -137,7 +137,7 @@ static struct sh_timer_config tmu2_platform_data = {
        .name = "TMU2",
        .channel_offset = 0x1c,
        .timer_bit = 2,
-       .clk = "module_clk",
+       .clk = "peripheral_clk",
 };
 
 static struct resource tmu2_resources[] = {
index baa28b73ae423492412192bdf7b1b203bdf89905..b9680f50f541b76824bbe2881c60b2d4e6486f03 100644 (file)
@@ -396,7 +396,7 @@ static int __devinit calc_CCR(unsigned long scl_hz)
        signed char cdf, cdfm;
        int scgd, scgdm, scgds;
 
-       mclk = clk_get(NULL, "module_clk");
+       mclk = clk_get(NULL, "peripheral_clk");
        if (IS_ERR(mclk)) {
                return PTR_ERR(mclk);
        } else {
index 4e3248d586020f78dba3fd0abade33a6cae9c5b2..fa4d52a6c032aade904b030f753a84b752fb1e87 100644 (file)
@@ -1084,7 +1084,7 @@ static void __devinit sci_init_single(struct platform_device *dev,
        sci_port->port.uartclk  = CONFIG_CPU_CLOCK;
 #elif defined(CONFIG_HAVE_CLK)
        sci_port->iclk          = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
-       sci_port->dclk          = clk_get(&dev->dev, "module_clk");
+       sci_port->dclk          = clk_get(&dev->dev, "peripheral_clk");
        sci_port->enable        = sci_clk_enable;
        sci_port->disable       = sci_clk_disable;
 #else
index 78cfb66e4c59cecf83c51d55b8b7f7baf9bf683b..6fa3140720bcf97c12c7a37cb638eaf8338a5720 100644 (file)
@@ -95,18 +95,18 @@ static void dac_audio_stop(void)
                outw(v, HD64461_GPADR);
        }
 
-       sh_dac_output(0, CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
+       sh_dac_output(0, CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
        sh_dac_disable(CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
 }
 
 static void dac_audio_set_rate(void)
 {
        unsigned long interval;
-       struct clk *clk;
+       struct clk *clk;
 
-       clk = clk_get(NULL, "module_clk");
-       interval = (clk_get_rate(clk) / 4) / rate;
-       clk_put(clk);
+       clk = clk_get(NULL, "peripheral_clk");
+       interval = (clk_get_rate(clk) / 4) / rate;
+       clk_put(clk);
        ctrl_outl(interval, TMU1_TCOR);
        ctrl_outl(interval, TMU1_TCNT);
 }