]> git.openfabrics.org - ~shefty/rdma-dev.git/commitdiff
iwlwifi: don't disable interrupt while starting tx
authorEmmanuel Grumbach <emmanuel.grumbach@intel.com>
Thu, 14 Jun 2012 09:27:56 +0000 (12:27 +0300)
committerJohannes Berg <johannes.berg@intel.com>
Mon, 18 Jun 2012 08:46:45 +0000 (10:46 +0200)
This is really not needed, we already have a lock inside
the accesses to the prph.

Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
drivers/net/wireless/iwlwifi/pcie/trans.c

index e20880acdd34dbe2cbb62e5201616bccf5e82a15..42f369d15f48146ed543d6430394d6281d742542 100644 (file)
@@ -1046,15 +1046,12 @@ static int iwl_trans_pcie_start_fw(struct iwl_trans *trans,
 
 /*
  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
- * must be called under the irq lock and with MAC access
  */
 static void iwl_trans_txq_set_sched(struct iwl_trans *trans, u32 mask)
 {
        struct iwl_trans_pcie __maybe_unused *trans_pcie =
                IWL_TRANS_GET_PCIE_TRANS(trans);
 
-       lockdep_assert_held(&trans_pcie->irq_lock);
-
        iwl_write_prph(trans, SCD_TXFACT, mask);
 }
 
@@ -1062,12 +1059,9 @@ static void iwl_tx_start(struct iwl_trans *trans)
 {
        struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
        u32 a;
-       unsigned long flags;
        int i, chan;
        u32 reg_val;
 
-       spin_lock_irqsave(&trans_pcie->irq_lock, flags);
-
        /* make sure all queue are not stopped/used */
        memset(trans_pcie->queue_stopped, 0, sizeof(trans_pcie->queue_stopped));
        memset(trans_pcie->queue_used, 0, sizeof(trans_pcie->queue_used));
@@ -1118,8 +1112,6 @@ static void iwl_tx_start(struct iwl_trans *trans)
        iwl_write_direct32(trans, FH_TX_CHICKEN_BITS_REG,
                           reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 
-       spin_unlock_irqrestore(&trans_pcie->irq_lock, flags);
-
        /* Enable L1-Active */
        iwl_clear_bits_prph(trans, APMG_PCIDEV_STT_REG,
                            APMG_PCIDEV_STT_VAL_L1_ACT_DIS);