net/phy: extra delay only for RGMII interfaces for IC+ IP 1001

The extra delay of 2ns to adjust RX clock phase is actually needed
in RGMII mode. Tested on the HDK7108 (STx7108c2).

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index d66bd8d125991e7c389dd6c0bdbfbdc5190d374f..c81f136ae670f1c616ac0fee867b9c2ed08351e0 100644 (file)
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -128,12 +128,15 @@ static int ip1001_config_init(struct phy_device *phydev)
        if (c < 0)
                return c;
 
-       /* Additional delay (2ns) used to adjust RX clock phase
-        * at GMII/ RGMII interface */
-       c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
-       c |= IP1001_PHASE_SEL_MASK;
+       if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
+               /* Additional delay (2ns) used to adjust RX clock phase
+                * at RGMII interface */
+               c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
+               c |= IP1001_PHASE_SEL_MASK;
+               c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
+       }
 
-       return phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
+       return c;
 }
 
 static int ip101a_config_init(struct phy_device *phydev)