KVM: PPC: BOOKE: allow debug interrupt at "debug level"

Debug interrupt can be either "critical level" or "debug level".
There are separate set of save/restore registers used for different level.
Example: DSRR0/DSRR1 are used for "debug level" and CSRR0/CSRR1
are used for critical level debug interrupt.

Using CPU_FTR_DEBUG_LVL_EXC to decide which interrupt level to be used.

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>

diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index b4c89fa6f109ec0502380ce2f1e749aa21fb8049..322da7d2334ad2a246e7ed3017e24c2cc3c0c622 100644 (file)
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -377,7 +377,11 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
                allowed = vcpu->arch.shared->msr & MSR_DE;
                allowed = allowed && !crit;
                msr_mask = MSR_ME;
-               int_class = INT_CLASS_CRIT;
+               if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
+                       int_class = INT_CLASS_DBG;
+               else
+                       int_class = INT_CLASS_CRIT;
+
                break;
        }