refresh (create temporary patch)

diff --git a/meta b/meta
index 76f0ff32ac8360cfae6c130cce0af263cbea6960..b352921ef1992e767893de309c21648258def28b 100644 (file)
--- a/meta
+++ b/meta
@@ -1,11 +1,12 @@
 Version: 1
-Previous: e1cb96fdbd7f56882baa468013492d6768ebd96e
-Head: 30ba552a9c381eea00d4554341d06dd5a1f6b922
+Previous: 5e9f7a2545430a69aef284eed79910dc60ea404f
+Head: 654201386fc48c0db04bed7cb9fff9f26e245db7
 Applied:
   verbs-ext: 6fbf2b29ca68fc10b7ee47dc0c09f54db0b32320
   compat-ex: fb8aa3e0b8ed628564d7d774907fd17a72a23522
   xrcd: 71fa003681345f671bdef05c9548263252e949de
   srq_ex: f22b88dd94854fd3b42fb6a48e7a6962620ddc81
   xrc_qp: 30ba552a9c381eea00d4554341d06dd5a1f6b922
+  refresh-temp: 654201386fc48c0db04bed7cb9fff9f26e245db7
 Unapplied:
 Hidden:

diff --git a/patches/refresh-temp b/patches/refresh-temp
new file mode 100644 (file)
index 0000000..d22537f
--- /dev/null
+++ b/patches/refresh-temp
@@ -0,0 +1,30 @@
+Bottom: f3713fe115d4b1490474c9615155de2ee6fe77e1
+Top:    b5d95a562af900586b7868d77890e4a91a9c8461
+Author: Sean Hefty <sean.hefty@intel.com>
+Date:   2012-09-17 21:23:27 -0700
+
+Refresh of xrc_qp
+
+---
+
+diff --git a/src/cmd.c b/src/cmd.c
+index d9f0b7a..b957fed 100644
+--- a/src/cmd.c
++++ b/src/cmd.c
+@@ -673,11 +673,11 @@ int ibv_cmd_create_qp_ex(struct ibv_pd *pd,
+       qp->context               = context;
+ 
+       if (abi_ver > 3) {
+-              attr->cap.max_recv_sge    = resp->max_recv_sge;
+-              attr->cap.max_send_sge    = resp->max_send_sge;
+-              attr->cap.max_recv_wr     = resp->max_recv_wr;
+-              attr->cap.max_send_wr     = resp->max_send_wr;
+-              attr->cap.max_inline_data = resp->max_inline_data;
++              attr_ex->cap.max_recv_sge    = resp->max_recv_sge;
++              attr_ex->cap.max_send_sge    = resp->max_send_sge;
++              attr_ex->cap.max_recv_wr     = resp->max_recv_wr;
++              attr_ex->cap.max_send_wr     = resp->max_send_wr;
++              attr_ex->cap.max_inline_data = resp->max_inline_data;
+       }
+ 
+       if (abi_ver == 4) {