mcm: HST->MXS mode, using RDMA_WRITE_WITH_IMM, fails with dtest -w

Host side incorrectly sets opcode to IBV_WR_RDMA_WRITE_WITH_IMM on every segment
instead of just the last segment.

Signed-off-by: Arlin Davis <arlin.r.davis@intel.com>

diff --git a/dapl/openib_mcm/proxy.c b/dapl/openib_mcm/proxy.c
index f4ec1f21344324ae7481873decf24946ac929092..5163bca8d4896bc21088a6b46beae82ee6d5e11b 100644 (file)
--- a/dapl/openib_mcm/proxy.c
+++ b/dapl/openib_mcm/proxy.c
@@ -111,6 +111,12 @@ int mcm_send_pi(struct dcm_ib_qp *m_qp,
                        m_wr_rx.w_idx = htonl(m_qp->wc_tl); /* snd back wc tail */
                        m_wr_rx.wr.num_sge = htonl(wr->num_sge);
                        m_wr_rx.wr.opcode = htonl(wr->opcode);
+
+                       /* RW_IMM: reset opcode on all segments except last */
+                       if (!(wr_flags & M_SEND_LS) &&
+                            (wr->opcode == IBV_WR_RDMA_WRITE_WITH_IMM))
+                               m_wr_rx.wr.opcode = htonl(IBV_WR_RDMA_WRITE);
+
                        m_wr_rx.wr.send_flags = htonl(wr->send_flags);
                        m_wr_rx.wr.imm_data = htonl(wr->imm_data);
                        m_wr_rx.sg[0].addr = htonll(l_addr + l_off);