]> git.openfabrics.org - ~shefty/rdma-win.git/commitdiff
[MTHCA] Adding checksum support to mthca driver. (mlnx: 3106)
authortzachid <tzachid@ad392aa1-c5ef-ae45-8dd8-e69d62a5ef86>
Mon, 8 Sep 2008 07:33:26 +0000 (07:33 +0000)
committertzachid <tzachid@ad392aa1-c5ef-ae45-8dd8-e69d62a5ef86>
Mon, 8 Sep 2008 07:33:26 +0000 (07:33 +0000)
signed off by: xalex@mellanox.co.il

git-svn-id: svn://openib.tc.cornell.edu/gen1@1565 ad392aa1-c5ef-ae45-8dd8-e69d62a5ef86

trunk/hw/mthca/kernel/hca_data.c
trunk/hw/mthca/kernel/ib_verbs.h
trunk/hw/mthca/kernel/mthca_cmd.c
trunk/hw/mthca/kernel/mthca_cmd.h
trunk/hw/mthca/kernel/mthca_cq.c
trunk/hw/mthca/kernel/mthca_main.c
trunk/hw/mthca/kernel/mthca_qp.c
trunk/hw/mthca/mthca_wqe.h

index 99b1c65cf1340d807561690fc19a9261e451c37d..0809c21fb08992166c2350728382ba163cbf4552 100644 (file)
@@ -292,7 +292,8 @@ mlnx_conv_hca_cap(
        ca_attr_p->modify_srq_depth      = hca_info_p->device_cap_flags & IB_DEVICE_SRQ_RESIZE;\r
        ca_attr_p->system_image_guid_support = hca_info_p->device_cap_flags & IB_DEVICE_SYS_IMAGE_GUID;\r
        ca_attr_p->hw_agents            = FALSE; // in the context of IBAL then agent is implemented on the host\r
-\r
+       ca_attr_p->ipoib_csum           = hca_info_p->device_cap_flags & IB_DEVICE_IPOIB_CSUM;\r
+       \r
        ca_attr_p->num_page_sizes = 1;\r
        ca_attr_p->p_page_size[0] = PAGE_SIZE; // TBD: extract an array of page sizes from HCA cap\r
 \r
index 8e8df5741b8d3d83b4a44514e62f18418ab5cd32..625ede8427586d9595c800b113795d0402e63632 100644 (file)
@@ -73,6 +73,7 @@ enum ib_device_cap_flags {
        IB_DEVICE_RC_RNR_NAK_GEN        = (1<<12),\r
        IB_DEVICE_SRQ_RESIZE            = (1<<13),\r
        IB_DEVICE_N_NOTIFY_CQ           = (1<<14),\r
+       IB_DEVICE_IPOIB_CSUM            = (1<<18)\r
 };\r
 \r
 struct ib_device_attr {\r
index b1d592d580e42e5414435dc70e384674b1b6785d..0c2ba3c1ad470440abaca03f353159a8eb9b5fc5 100644 (file)
@@ -1277,6 +1277,10 @@ int mthca_INIT_HCA(struct mthca_dev *dev,
        /* Check port for UD address vector: */
        *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cl_hton32(1);
 
+       /* Enable IPoIB checksumming if we can: */
+       if (dev->device_cap_flags & IB_DEVICE_IPOIB_CSUM)
+               *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cl_hton32(7 << 3);
+
        /* We leave wqe_quota, responder_exu, etc as 0 (default) */
 
        /* QPC/EEC/CQC/EQC/RDB attributes */
index 00aedd6b3959cdf52228d86232e6002c30d406e3..f5bda231a026fa09f00e947e57b4e41621f80e89 100644 (file)
@@ -102,6 +102,7 @@ enum {
        DEV_LIM_FLAG_RAW_IPV6           = 1 << 4,
        DEV_LIM_FLAG_RAW_ETHER          = 1 << 5,
        DEV_LIM_FLAG_SRQ                = 1 << 6,
+       DEV_LIM_FLAG_IPOIB_CSUM         = 1 << 7,
        DEV_LIM_FLAG_BAD_PKEY_CNTR      = 1 << 8,
        DEV_LIM_FLAG_BAD_QKEY_CNTR      = 1 << 9,
        DEV_LIM_FLAG_MW                 = 1 << 16,
index d937695ce1a378283802dcf438d6e55f56d2a7d6..84557858cb0f7a57ae8fc98420d8798e12780c28 100644 (file)
@@ -117,11 +117,21 @@ enum {
        SYNDROME_INVAL_EEC_STATE_ERR     = 0x24\r
 };\r
 \r
+enum { \r
+       MTHCA_NdisPacketTcpChecksumFailed               = 1 << 1,\r
+       MTHCA_NdisPacketUdpChecksumFailed               = 1 << 2,\r
+       MTHCA_NdisPacketIpChecksumFailed                = 1 << 3,\r
+       MTHCA_NdisPacketTcpChecksumSucceeded    = 1 << 4,\r
+       MTHCA_NdisPacketUdpChecksumSucceeded    = 1 << 5,\r
+       MTHCA_NdisPacketIpChecksumSucceeded     = 1 << 6\r
+};\r
+\r
 struct mthca_cqe {\r
        __be32 my_qpn;\r
        __be32 my_ee;\r
        __be32 rqpn;\r
-       __be16 sl_g_mlpath;\r
+       u8              sl_ipok;\r
+       u8              g_mlpath;\r
        __be16 rlid;\r
        __be32 imm_etype_pkey_eec;\r
        __be32 byte_cnt;\r
@@ -435,6 +445,25 @@ static void handle_error_cqe(struct mthca_dev *dev, struct mthca_cq *cq,
        *free_cqe = 0;\r
 }\r
 \r
+static inline uint8_t mthca_ib_ipoib_csum_ok(u16 checksum, u8 ip_ok) {\r
+       \r
+       #define CSUM_VALID_NUM 0xffff\r
+       uint8_t res = 0;\r
+       \r
+       // Verify that IP_OK bit is set and the packet is pure IPv4 packet\r
+       if (ip_ok)\r
+       {\r
+               // IP checksum calculated by MLX4 matched the checksum in the receive packet's \r
+               res |= MTHCA_NdisPacketIpChecksumSucceeded;\r
+               if (checksum == CSUM_VALID_NUM) {\r
+                               // TCP or UDP checksum calculated by MTHCA matched the checksum in the receive packet's \r
+                               res |= (MTHCA_NdisPacketUdpChecksumSucceeded |\r
+                                               MTHCA_NdisPacketTcpChecksumSucceeded );\r
+               }\r
+       }\r
+       return res;\r
+}\r
+\r
 static inline int mthca_poll_one(struct mthca_dev *dev,\r
                                 struct mthca_cq *cq,\r
                                 struct mthca_qp **cur_qp,\r
@@ -448,6 +477,7 @@ static inline int mthca_poll_one(struct mthca_dev *dev,
        int is_send;\r
        int free_cqe = 1;\r
        int err = 0;\r
+       u16 checksum;\r
 \r
        HCA_ENTER(HCA_DBG_CQ);\r
        cqe = next_cqe_sw(cq);\r
@@ -575,10 +605,12 @@ static inline int mthca_poll_one(struct mthca_dev *dev,
                entry->recv.ud.remote_lid          = cqe->rlid;\r
                entry->recv.ud.remote_qp           = cqe->rqpn & 0xffffff00;\r
                entry->recv.ud.pkey_index  = (u16)(cl_ntoh32(cqe->imm_etype_pkey_eec) >> 16);\r
-               entry->recv.ud.remote_sl           = (uint8_t)(cl_ntoh16(cqe->sl_g_mlpath) >> 12);\r
-               entry->recv.ud.path_bits = (uint8_t)(cl_ntoh16(cqe->sl_g_mlpath) & 0x7f);\r
-               entry->recv.ud.recv_opt   |= cl_ntoh16(cqe->sl_g_mlpath) & 0x80 ?\r
-                                       IB_RECV_OPT_GRH_VALID : 0;\r
+               entry->recv.ud.remote_sl        = cqe->sl_ipok >> 4;\r
+               entry->recv.ud.path_bits = (uint8_t)(cqe->g_mlpath & 0x7f);\r
+               entry->recv.ud.recv_opt   |= cqe->g_mlpath & 0x80 ? IB_RECV_OPT_GRH_VALID : 0;\r
+               checksum = (u16)(cl_ntoh32(cqe->rqpn) >> 24) |\r
+                               ((cl_ntoh32(cqe->my_ee) >> 16) & 0xff00);\r
+               entry->recv.ud.csum_ok = mthca_ib_ipoib_csum_ok(checksum, cqe->sl_ipok & 1);\r
        }\r
        if (!is_send && cqe->rlid == 0){\r
                HCA_PRINT(TRACE_LEVEL_INFORMATION,HCA_DBG_CQ,("found rlid == 0 \n "));\r
index 16a0641f7db7ff9a27757199cb0fc6f57cd4151f..70a72e16075e6d8d33dd00cca484b3e56c6787ac 100644 (file)
@@ -256,6 +256,11 @@ static int  mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
 \r
        if (dev_lim->flags & DEV_LIM_FLAG_SRQ)\r
                mdev->mthca_flags |= MTHCA_FLAG_SRQ;\r
+       \r
+       if (mthca_is_memfree(mdev)) {\r
+               if (dev_lim->flags & DEV_LIM_FLAG_IPOIB_CSUM)\r
+                       mdev->device_cap_flags |= IB_DEVICE_IPOIB_CSUM; //IB_DEVICE_UD_IP_CSUM;\r
+       }\r
 \r
        return 0;\r
 }\r
index 9062f277a5c4f32c7b366d90975f398034c22e6c..62224d742c64496e233bada158e9b884b7e4dd86 100644 (file)
@@ -1975,7 +1975,11 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct _ib_send_wr *wr,
                         cl_hton32(MTHCA_NEXT_CQ_UPDATE) : 0) |\r
                        ((wr->send_opt & IB_SEND_OPT_SOLICITED) ?\r
                         cl_hton32(MTHCA_NEXT_SOLICIT) : 0)   |\r
-                       cl_hton32(1);\r
+                       ((wr->send_opt & IB_SEND_OPT_TX_IP_CSUM) ?\r
+                        cl_hton32(MTHCA_NEXT_IP_CSUM) : 0) |\r
+                       ((wr->send_opt & IB_SEND_OPT_TX_TCP_UDP_CSUM) ?\r
+                        cl_hton32(MTHCA_NEXT_TCP_UDP_CSUM) : 0) |\r
+                        cl_hton32(1);\r
                if (opcode == MTHCA_OPCODE_SEND_IMM||\r
                        opcode == MTHCA_OPCODE_RDMA_WRITE_IMM)\r
                        ((struct mthca_next_seg *) wqe)->imm = wr->immediate_data;\r
index ff3aab48a78c74764a7221202d0c59180484ee26..f2ed3309aa236c15cb2025b824f05dc7095eaf99 100644 (file)
@@ -44,14 +44,16 @@ enum {
 };\r
 \r
 enum {\r
-       MTHCA_NEXT_DBD       = 1 << 7,\r
-       MTHCA_NEXT_FENCE     = 1 << 6,\r
-       MTHCA_NEXT_CQ_UPDATE = 1 << 3,\r
-       MTHCA_NEXT_EVENT_GEN = 1 << 2,\r
-       MTHCA_NEXT_SOLICIT   = 1 << 1,\r
-\r
-       MTHCA_MLX_VL15       = 1 << 17,\r
-       MTHCA_MLX_SLR        = 1 << 16\r
+       MTHCA_NEXT_DBD                  = 1 << 7,\r
+       MTHCA_NEXT_FENCE                = 1 << 6,\r
+       MTHCA_NEXT_CQ_UPDATE    = 1 << 3,\r
+       MTHCA_NEXT_EVENT_GEN    = 1 << 2,\r
+       MTHCA_NEXT_SOLICIT              = 1 << 1,\r
+       MTHCA_NEXT_IP_CSUM              = 1 << 4,\r
+       MTHCA_NEXT_TCP_UDP_CSUM = 1 << 5,\r
+\r
+       MTHCA_MLX_VL15                  = 1 << 17,\r
+       MTHCA_MLX_SLR                   = 1 << 16\r
 };\r
 \r
 enum {\r