]> git.openfabrics.org - ~emulex/infiniband.git/commitdiff
mtd: gpmi: add gpmi support for mx6q
authorHuang Shijie <b32955@freescale.com>
Sat, 5 May 2012 01:42:06 +0000 (21:42 -0400)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Mon, 14 May 2012 04:22:29 +0000 (23:22 -0500)
add gpmi support for mx6q.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/nand/Kconfig
drivers/mtd/nand/gpmi-nand/bch-regs.h
drivers/mtd/nand/gpmi-nand/gpmi-lib.c
drivers/mtd/nand/gpmi-nand/gpmi-nand.c
drivers/mtd/nand/gpmi-nand/gpmi-nand.h

index 7d17cecad69d8fccc1467eaa210c6fe2915197dd..bf0a28d513d400ecf587c16ddc934ed2815586f7 100644 (file)
@@ -440,7 +440,7 @@ config MTD_NAND_NANDSIM
 
 config MTD_NAND_GPMI_NAND
         bool "GPMI NAND Flash Controller driver"
-        depends on MTD_NAND && (SOC_IMX23 || SOC_IMX28)
+        depends on MTD_NAND && (SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q)
         help
         Enables NAND Flash support for IMX23 or IMX28.
         The GPMI controller is very powerful, with the help of BCH
index 4effb8c579db0d5b3e9127dc3cedbe7630a532c3..a0924515c39644fcc9430938ded2795a2f356a4c 100644 (file)
 
 #define BP_BCH_FLASH0LAYOUT0_ECC0              12
 #define BM_BCH_FLASH0LAYOUT0_ECC0      (0xf << BP_BCH_FLASH0LAYOUT0_ECC0)
-#define BF_BCH_FLASH0LAYOUT0_ECC0(v)           \
-       (((v) << BP_BCH_FLASH0LAYOUT0_ECC0) & BM_BCH_FLASH0LAYOUT0_ECC0)
+#define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0         11
+#define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0 (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)
+#define BF_BCH_FLASH0LAYOUT0_ECC0(v, x)                                \
+       (GPMI_IS_MX6Q(x)                                        \
+               ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)      \
+                       & MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0)       \
+               : (((v) << BP_BCH_FLASH0LAYOUT0_ECC0)           \
+                       & BM_BCH_FLASH0LAYOUT0_ECC0)            \
+       )
 
 #define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE                0
 #define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE                \
                        (0xfff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
-#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v)     \
-       (((v) << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)\
-                                        & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)
+#define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE   \
+                       (0x3ff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
+#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x)                          \
+       (GPMI_IS_MX6Q(x)                                                \
+               ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)   \
+               : ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)               \
+       )
 
 #define HW_BCH_FLASH0LAYOUT1                   0x00000090
 
 
 #define BP_BCH_FLASH0LAYOUT1_ECCN              12
 #define BM_BCH_FLASH0LAYOUT1_ECCN      (0xf << BP_BCH_FLASH0LAYOUT1_ECCN)
-#define BF_BCH_FLASH0LAYOUT1_ECCN(v)           \
-       (((v) << BP_BCH_FLASH0LAYOUT1_ECCN) & BM_BCH_FLASH0LAYOUT1_ECCN)
+#define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN         11
+#define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)
+#define BF_BCH_FLASH0LAYOUT1_ECCN(v, x)                                \
+       (GPMI_IS_MX6Q(x)                                        \
+               ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)      \
+                       & MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN)       \
+               : (((v) << BP_BCH_FLASH0LAYOUT1_ECCN)           \
+                       & BM_BCH_FLASH0LAYOUT1_ECCN)            \
+       )
 
 #define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE                0
 #define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE                \
                        (0xfff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
-#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v)     \
-       (((v) << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE) \
-                                        & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)
+#define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE   \
+                       (0x3ff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
+#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x)                          \
+       (GPMI_IS_MX6Q(x)                                                \
+               ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)   \
+               : ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)               \
+       )
 #endif
index 5c55c717fe14cab04f79a136af9ad193710ba04c..a1f43329ad43d2c7898f7c978cb3f9f15721fe5e 100644 (file)
@@ -224,13 +224,13 @@ int bch_set_geometry(struct gpmi_nand_data *this)
        /* Configure layout 0. */
        writel(BF_BCH_FLASH0LAYOUT0_NBLOCKS(block_count)
                        | BF_BCH_FLASH0LAYOUT0_META_SIZE(metadata_size)
-                       | BF_BCH_FLASH0LAYOUT0_ECC0(ecc_strength)
-                       | BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block_size),
+                       | BF_BCH_FLASH0LAYOUT0_ECC0(ecc_strength, this)
+                       | BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block_size, this),
                        r->bch_regs + HW_BCH_FLASH0LAYOUT0);
 
        writel(BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size)
-                       | BF_BCH_FLASH0LAYOUT1_ECCN(ecc_strength)
-                       | BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(block_size),
+                       | BF_BCH_FLASH0LAYOUT1_ECCN(ecc_strength, this)
+                       | BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(block_size, this),
                        r->bch_regs + HW_BCH_FLASH0LAYOUT1);
 
        /* Set *all* chip selects to use layout 0. */
@@ -805,7 +805,8 @@ int gpmi_is_ready(struct gpmi_nand_data *this, unsigned chip)
        if (GPMI_IS_MX23(this)) {
                mask = MX23_BM_GPMI_DEBUG_READY0 << chip;
                reg = readl(r->gpmi_regs + HW_GPMI_DEBUG);
-       } else if (GPMI_IS_MX28(this)) {
+       } else if (GPMI_IS_MX28(this) || GPMI_IS_MX6Q(this)) {
+               /* MX28 shares the same R/B register as MX6Q. */
                mask = MX28_BF_GPMI_STAT_READY_BUSY(1 << chip);
                reg = readl(r->gpmi_regs + HW_GPMI_STAT);
        } else
index d9dc4c874ffa6ff500545bf079e426f406f33fc9..519e4306e352f3b5f24871ba7c8c59b775efd9cb 100644 (file)
@@ -1515,6 +1515,7 @@ err_out:
 static const struct platform_device_id gpmi_ids[] = {
        { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, },
        { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, },
+       { .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, },
        {},
 };
 
@@ -1525,6 +1526,9 @@ static const struct of_device_id gpmi_nand_id_table[] = {
        }, {
                .compatible = "fsl,imx28-gpmi-nand",
                .data = (void *)&gpmi_ids[IS_MX28]
+       }, {
+               .compatible = "fsl,imx6q-gpmi-nand",
+               .data = (void *)&gpmi_ids[IS_MX6Q]
        }, {}
 };
 MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
index 12fdd7767c1c85c92b23dcbeba94084a3affa921..ce5daa1609203923caee19f576be884c27919a97 100644 (file)
@@ -268,6 +268,8 @@ extern int gpmi_read_page(struct gpmi_nand_data *,
 /* Use the platform_id to distinguish different Archs. */
 #define IS_MX23                        0x0
 #define IS_MX28                        0x1
+#define IS_MX6Q                        0x2
 #define GPMI_IS_MX23(x)                ((x)->pdev->id_entry->driver_data == IS_MX23)
 #define GPMI_IS_MX28(x)                ((x)->pdev->id_entry->driver_data == IS_MX28)
+#define GPMI_IS_MX6Q(x)                ((x)->pdev->id_entry->driver_data == IS_MX6Q)
 #endif