#include <common/compatibility.h>
#include <common/bit_slice.h>
-#ifndef __FreeBSD__
+#if !defined (__FreeBSD__) && !defined(UEFI_BUILD)
#include <mtcr_tools_cif.h>
#endif
MError tcif_cr_mbox_supported(mfile* dev)
{
-#ifdef __FreeBSD__
+#if defined(__FreeBSD__) || defined(UEFI_BUILD)
(void)dev;
return ME_NOT_IMPLEMENTED;
#else
dnl Process this file with autoconf to produce a configure script.
-AC_INIT(mstflint, 4.0.1, adrianc@mellanox.co.il)
+AC_INIT(mstflint, 4.1.0, adrianc@mellanox.co.il)
AC_DEFINE_UNQUOTED([PROJECT], ["mstflint"], [Define the project name.])
AC_SUBST([PROJECT])
-AC_DEFINE_UNQUOTED([VERSION], ["4.0.1"], [Define the project version.])
+AC_DEFINE_UNQUOTED([VERSION], ["4.1.0"], [Define the project version.])
AC_SUBST([VERSION])
AC_CONFIG_AUX_DIR(config)
AC_CONFIG_SRCDIR([README])
-AM_INIT_AUTOMAKE(mstflint, 4.0.1)
+AM_INIT_AUTOMAKE(mstflint, 4.1.0)
dnl Checks for programs
AC_PROG_CC
+mstflint (4.1.0-1) unstable; urgency=low
+
+ * Updated from MFT-4.1.0
+
+ -- Adrian Chiris <adrianc@unknown> Wed, 26 Aug 2015 15:31:33 +0200
+
mstflint (4.0.1-1) unstable; urgency=low
* Updated from MFT-4.0.1
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#include <stdio.h>
.dev_type = DM_SWITCH
},
{
- .dm_id = DeviceSwitchEN,
+ .dm_id = DeviceSpectrum,
.hw_dev_id = 0x249,
.hw_rev_id = -1,
.sw_dev_id = -1,
- .name = "SwitchEN",
+ .name = "Spectrum",
.port_num = 64,
.dev_type = DM_SWITCH
},
int rc;
u_int32_t dev_flags;
+ //Special case: FPGA device:
+#ifndef MST_UL
+ if (mf->tp == MST_FPGA) {
+ *ptr_dm_dev_id = DeviceFPGA;
+ *ptr_hw_dev_id = 0x600;
+ return 0;
+ }
+#endif
+
#if 1
for (i = 0; i < DeviceEndMarker; i++) {
if (g_devs_info[i].dm_id != i) {
int dm_is_fpp_supported(dm_dev_id_t type)
{
- if (g_devs_info[type].dm_id == DeviceConnectX4 || g_devs_info[type].dm_id == DeviceConnectX4LX) {
+ if (g_devs_info[type].dm_id == DeviceConnectIB ||
+ g_devs_info[type].dm_id == DeviceConnectX4 ||
+ g_devs_info[type].dm_id == DeviceConnectX4LX) {
return 1;
} else {
return 0;
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#ifndef TOOLS_DEV_TYPE_H
DeviceConnectIB,
DeviceConnectX3Pro,
DeviceSwitchIB,
- DeviceSwitchEN,
+ DeviceSpectrum,
DeviceConnectX4,
DeviceConnectX4LX,
DeviceFPGA,
_flags.push_back(new Flag("", "mac", 1));
_flags.push_back(new Flag("", "macs", MACS));
_flags.push_back(new Flag("", "uid", 1));
- _flags.push_back(new Flag("", "uids", 29)); //TODO: update this with the correct constatnt from mlxfwops
_flags.push_back(new Flag("", "blank_guids", 0));
_flags.push_back(new Flag("", "clear_semaphore", 0));
_flags.push_back(new Flag("h", "help", 0));
AddOptions("uid",
' ',
"<UID>",
- "BridgeX/ConnectIB only. Derive and set the device UIDs (GUIDs, MACs, WWNs).\n"
+ "ConnectIB/SwitchIB only. Derive and set the device UIDs (GUIDs, MACs, WWNs).\n"
"UIDs are derived from the given base UID according to Mellanox Methodology\n"
"Commands affected: burn, sg");
- AddOptions("uids",
- ' ',
- "<UIDs...>",
- "BridgeX only. 29 space separated UIDs must be specified here.\n"
- "The specified UIDs are assigned to the following fields, repectively:\n"
- "G0-MAC-PI0 G0-MAC-PI1 G0-MAC-PI2\n"
- "G0-MAC-PE0 G0-MAC-PE1 G0-MAC-PE2 G0-MAC-PE3\n"
- "G0-FC-WWPN-P0 G0-FC-WWPN-P1 G0-FC-WWPN-P2 G0-FC-WWPN-P3\n"
- "G0-IB-NODE-GUID G0-IB-PORT-GUID G0-FC-WWNN\n"
- "G1-MAC-PI0 G1-MAC-PI1 G1-MAC-PI2\n"
- "G1-MAC-PE0 G1-MAC-PE1 G1-MAC-PE2 G1-MAC-PE3\n"
- "G1-FC-WWPN-P0 G1-FC-WWPN-P1 G1-FC-WWPN-P2 G1-FC-WWPN-P3\n"
- "G1-IB-NODE-GUID G1-IB-PORT-GUID G1-FC-WWNN\n"
- "IB-SYSTEM-GUID\n"
- "Commands affected: burn, sg");
-
AddOptions("blank_guids",
' ',
"",
AddOptions("use_image_guids",
' ',
"",
- "Burn (guids/uids/macs) as appears in the given image.\n"
+ "Burn (guids/macs) as appears in the given image.\n"
"Commands affected: burn");
AddOptions("use_image_rom",
printf("-E- failed to extract UIDs from UID.");
return PARSE_ERROR;
}
- } else if (name == "uids") {
- _flintParams.uids_specified = true;
- std::vector<std::string> strs;
- splitByDelimiters(strs, value,",");
- if (strs.size() < BX_ALL_GUIDS) {
- return PARSE_ERROR;
- }
- for (int i = 0; i < BX_ALL_GUIDS; i++) {
- guid_t u;
- if (!getGUIDFromStr(strs[i], u)){
- return PARSE_ERROR;
- }else{
- _flintParams.user_uids.push_back(u);
- }
- }
} else if (name == "blank_guids") {
_flintParams.blank_guids = true;
} else if (name == "clear_semaphore") {
#define FLINT_NO_ZLIB_ERROR "Executable was compiled with \"dump files\" option disabled.\n"
#define FLINT_FLAG_WITH_FLAG_ERROR "\"%s\" flag must be specified with \"%s\" flag.\n"
#define FLINT_INVALID_PASSWORD "Invalid Password.\n"
+#define FLINT_NO_GUID_MAC_FLAGS_ERROR "Can not set GUIDs/MACs: please run with -uid/-guid/-mac flag.\n"
+#define FLINT_NO_UID_FLAG_ERROR "Can not set GUIDs/MACs: uid is not specified, please run with -uid flag.\n"
/**************************
* Flint Warning Messages
return 0;
}
+
int SubCommand::CbCommon(int completion, char*preStr, char* endStr)
{
if (completion < 100) {
- printf("\r%s%%%03d", preStr, completion);
+ printf("\r%s%03d%%", preStr, completion);
}else if (completion == 100) {
printf("\r%sOK \n", preStr);
} else {// printing endStr
if (endStr){
printf("\r%s\n", endStr);
}
- }
- fflush(stdout);
- return 0;
+ }
+ fflush(stdout);
+ return 0;
}
// HACK: the endStr is printed when we reach 101% this is for backward compat with the original flint
if (_flintParams.device_specified) {
_io = new Flash;
if (!((Flash*)_io)->open(_flintParams.device.c_str(), _flintParams.clear_semaphore, false, _flintParams.banks, \
- _flintParams.flash_params_specified ? &_flintParams.flash_params : NULL, _flintParams.override_cache_replacement, _flintParams.use_fw)) {
+ _flintParams.flash_params_specified ? &_flintParams.flash_params : NULL, _flintParams.override_cache_replacement, true, _flintParams.use_fw)) {
// if we have Hw_Access command we dont fail straght away
if (_flintParams.cmd == SC_Hw_Access && ((Flash*)_io)->get_cr_space_locked()) {
return FLINT_SUCCESS;
return;
}
-bool SubCommand::extractUIDArgs(std::vector<string>& cmdArgs, u_int8_t& numOfGuids, u_int8_t& stepSize){
+bool SubCommand::extractValuesFromString(string valStr, u_int8_t values[2], string origArg) {
+ // check if we need to extract 2 values or 1
+ u_int32_t tempNum0 = 0, tempNum1 = 0;
+ string tempNumStr;
+ if (valStr.find(',') != string::npos) {
+ std::stringstream ss((valStr.c_str()));
+ // get first value
+ if (!std::getline(ss, tempNumStr, ',')) {
+ reportErr(true, FLINT_INVALID_ARG_ERROR,origArg.c_str());
+ return false;
+ }
+ if (!str2Num(tempNumStr.c_str(), tempNum0)) {
+ reportErr(true, FLINT_INVALID_ARG_ERROR, origArg.c_str());
+ return false;
+ }
+ // get second value
+ if (!std::getline(ss, tempNumStr, ',')) {
+ reportErr(true, FLINT_INVALID_ARG_ERROR, origArg.c_str());
+ return false;
+ }
+ if (!str2Num(tempNumStr.c_str(), tempNum1)) {
+ reportErr(true, FLINT_INVALID_ARG_ERROR, origArg.c_str());
+ return false;
+ }
+ // make sure no other tokens are present
+ if (!(!std::getline(ss, tempNumStr, ','))) {
+ reportErr(true, FLINT_INVALID_ARG_ERROR, origArg.c_str());
+ return false;
+ }
+ } else {
+ if (!str2Num(valStr.c_str(), tempNum0)) {
+ reportErr(true, FLINT_INVALID_ARG_ERROR, origArg.c_str());
+ return false;
+ }
+ tempNum1 = tempNum0;
+ }
+ // perform checks
+ if (tempNum0 >= 255 || tempNum1 >= 255) {
+ reportErr(true, "Invalid argument values, values should be taken from the range [0..254]\n");
+ return false;
+ }
+ values[0] = tempNum0;
+ values[1] = tempNum1;
+ return true;
+}
+
+bool SubCommand::extractUIDArgs(std::vector<string>& cmdArgs, u_int8_t numOfGuids[2], u_int8_t stepSize[2]){
//extract num_of_guids and step_size from numGuidsStr, stepStr
- u_int32_t tempNumOfGuids = 0;
- u_int32_t tempStepSize = 0;
string tag, valStr;
for (std::vector<string>::iterator it = cmdArgs.begin(); it != cmdArgs.end(); it++) {
std::stringstream ss((it->c_str()));
return false;
}
if (tag == "guids_num") {
- if (!str2Num(valStr.c_str(), tempNumOfGuids)) {
- reportErr(true, FLINT_INVALID_ARG_ERROR, it->c_str());
+ if (!extractValuesFromString(valStr, numOfGuids, *it)) {
return false;
}
} else if (tag == "step_size") {
- if (!str2Num(valStr.c_str(), tempStepSize)) {
- reportErr(true, FLINT_INVALID_ARG_ERROR, it->c_str());
+ if (!extractValuesFromString(valStr, stepSize, *it)) {
return false;
}
} else {
return false;
}
}
- // perform checks
- if (tempNumOfGuids <= 0 || tempNumOfGuids >= 256 || tempStepSize<=0 || tempStepSize>=256) {
- reportErr(true, "Invalid argument values, values should be taken from the range [1..255]\n");
- return false;
- }
- numOfGuids = tempNumOfGuids;
- stepSize = tempStepSize;
return true;
}
_burnParams.userUids.resize(MAX_GUIDS, (guid_t){0xffffffff,0xffffffff});
}
-#define VERSION_FORMAT(isFs2) isFs2 ? "%d.%d.%d" : "%d.%04d.%04d"
+#define VERSION_FORMAT(minor) minor < 100 ? "%d.%d.%04d" : "%d.%04d.%04d"
bool BurnSubCommand::checkFwVersion()
{
char curr_ver[124], new_ver[124];
printf("\n");
printf(" Current FW version on flash: ");
if (_devInfo.fw_info.fw_ver[0] != 0) { // i.e if we have a fw_version we assume this is != 0
- snprintf(curr_ver, 124, VERSION_FORMAT(_devInfo.fw_type == FIT_FS2), _devInfo.fw_info.fw_ver[0], _devInfo.fw_info.fw_ver[1], _devInfo.fw_info.fw_ver[2]);
+ snprintf(curr_ver, 124, VERSION_FORMAT(_devInfo.fw_info.fw_ver[1]), _devInfo.fw_info.fw_ver[0], _devInfo.fw_info.fw_ver[1], _devInfo.fw_info.fw_ver[2]);
} else {
snprintf(curr_ver, 124, "N/A");
}
printf(" New FW version: ");
if (_imgInfo.fw_info.fw_ver[0] != 0) {
- snprintf(new_ver, 124, VERSION_FORMAT(_imgInfo.fw_type == FIT_FS2), _imgInfo.fw_info.fw_ver[0], _imgInfo.fw_info.fw_ver[1], _imgInfo.fw_info.fw_ver[2]);
+ snprintf(new_ver, 124, VERSION_FORMAT(_imgInfo.fw_info.fw_ver[1]), _imgInfo.fw_info.fw_ver[0], _imgInfo.fw_info.fw_ver[1], _imgInfo.fw_info.fw_ver[2]);
} else {
snprintf(new_ver, 124, "N/A");
}
if (_flintParams.log_specified) {
print_line_to_log("Current FW version on flash: %s, New FW version: %s\n", curr_ver, new_ver);
}
- int verStatus = FVI_UNKNOWN;
+ int verStatus;
if (_devInfo.fw_info.fw_ver[0] != 0 &&
- _imgInfo.fw_info.fw_ver[0] != 0) {
- verStatus = FwOperations::FwVerLessThan(_devInfo.fw_info.fw_ver,_imgInfo.fw_info.fw_ver, _devInfo.fw_type);
- }
-
- if (verStatus == FVI_UNKNOWN) {
- printf("\n Warning: Cannot compare between FW versions(different branches).\n");
- if (!askUser()) {
- return false;
- }
- } else if (verStatus == FVI_EQUAL || verStatus == FVI_GREATER) {
- printf("\n Note: The new FW version is not newer than the current FW version on flash.\n");
- if (!askUser()) {
- return false;
+ _imgInfo.fw_info.fw_ver[0] != 0) { // nofs pitfall here - on nofs burn no fwver of device
+ verStatus = FwOperations::FwVerLessThan(_devInfo.fw_info.fw_ver, _imgInfo.fw_info.fw_ver);
+ if (verStatus == FVI_EQUAL || verStatus == FVI_GREATER) {
+ printf("\n Note: The new FW version is %s the current FW version on flash.\n", verStatus == FVI_EQUAL ? "the same as" : "older than");
+ if (!askUser()) {
+ return false;
+ }
}
}
+
printf("\n");
_burnParams.ignoreVersionCheck = true;
return true;
reportErr(true, FLINT_IMG_DEV_COMPAT_ERROR, "FS3", "FS3");
return FLINT_FAILED;
}
- // If we are burning nofs then -ocr flag needs to be specified
- if (!_burnParams.burnFailsafe && !_flintParams.override_cache_replacement) {
- reportErr(true, FLINT_FLAG_WITH_FLAG_ERROR, "override_cache_replacement", "nofs");
- return FLINT_FAILED;
- }
+
// on FS3 burn we require query to pass
if (!_devQueryRes && _burnParams.burnFailsafe) {
reportErr(true, FLINT_FS3_BURN_ERROR, _fwOps->err());
return true;
}
+#define IS_HCA(chipType) \
+ (((chipType) == CT_CONNECTX) || ((chipType) == CT_CONNECT_IB) || ((chipType) == CT_CONNECTX4) || ((chipType) == CT_CONNECTX4_LX))
+
void BurnSubCommand::dealWithExpRom()
{
bool getRomFromDev = false;
// Check exp rom:
- bool fs2Cond = _fwType == FIT_FS2? (_devQueryRes && _devInfo.fw_info.chip_type == CT_CONNECTX && \
+ bool fs2Cond = _fwType == FIT_FS2? (_devQueryRes && IS_HCA(_devInfo.fw_info.chip_type) && \
(FwOperations::IsFwSupportingRomModify(_devInfo.fw_info.fw_ver) || (_imgInfo.fw_info.roms_info.num_of_exp_rom > 0))\
&& !_flintParams.use_image_rom && !strcmp(_devInfo.fw_info.product_ver,"") && !strcmp(_imgInfo.fw_info.product_ver, "")) : false;
- bool fs3Cond = _fwType == FIT_FS3 ? (_devQueryRes && (_devInfo.fw_info.chip_type == CT_CONNECT_IB || _devInfo.fw_info.chip_type == CT_CONNECTX) && \
+ bool fs3Cond = _fwType == FIT_FS3 ? (_devQueryRes && IS_HCA(_devInfo.fw_info.chip_type) && \
(FwOperations::IsFwSupportingRomModify(_devInfo.fw_info.fw_ver) || (_imgInfo.fw_info.roms_info.num_of_exp_rom > 0))\
&& !_flintParams.use_image_rom) && !strcmp(_devInfo.fw_info.product_ver,"") && !strcmp(_imgInfo.fw_info.product_ver, "") : false;
printf("\n");
#define PRINT_FS3_UIDS(uid1, uid2, str, printStep) {\
PRINT_FS3_UID(uid1, BASE_STR" "str":", printStep);\
- if (uid1.uid != uid2.uid || uid1.num_allocated != uid2.num_allocated || uid1.step != uid2.step) {\
+ if (uid1.uid != uid2.uid || uid1.num_allocated != uid2.num_allocated || ( printStep && uid1.step != uid2.step)) {\
PRINT_FS3_UID(uid2, "Orig " BASE_STR " "str":", printStep);\
} \
}
if (fwInfo.fs3_info.fs3_uids_info.valid_field) {
// new GUIDs format
printf("Description: UID GuidsNumber\n");
- PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cx4_uids.base_guid, fwInfo.fs3_info.orig_fs3_uids_info.cx4_uids.base_guid, "GUID", 0);
- PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cx4_uids.base_mac, fwInfo.fs3_info.orig_fs3_uids_info.cx4_uids.base_mac, "MAC", 0);
+ PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cx4_uids.base_guid, fwInfo.fs3_info.orig_fs3_uids_info.cx4_uids.base_guid, "GUID", false);
+ PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cx4_uids.base_mac, fwInfo.fs3_info.orig_fs3_uids_info.cx4_uids.base_mac, "MAC", false);
} else {
printf("Description: UID GuidsNumber Step\n");
- PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cib_uids.guids[0], fwInfo.fs3_info.orig_fs3_uids_info.cib_uids.guids[0], "GUID1", 1);
- PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cib_uids.guids[1], fwInfo.fs3_info.orig_fs3_uids_info.cib_uids.guids[1], "GUID2", 1);
- PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cib_uids.macs[0], fwInfo.fs3_info.orig_fs3_uids_info.cib_uids.macs[0], "MAC1", 1);
- PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cib_uids.macs[1], fwInfo.fs3_info.orig_fs3_uids_info.cib_uids.macs[1], "MAC2", 1);
+ PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cib_uids.guids[0], fwInfo.fs3_info.orig_fs3_uids_info.cib_uids.guids[0], "GUID1", true);
+ PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cib_uids.guids[1], fwInfo.fs3_info.orig_fs3_uids_info.cib_uids.guids[1], "GUID2", true);
+ PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cib_uids.macs[0], fwInfo.fs3_info.orig_fs3_uids_info.cib_uids.macs[0], "MAC1", true);
+ PRINT_FS3_UIDS(fwInfo.fs3_info.fs3_uids_info.cib_uids.macs[1], fwInfo.fs3_info.orig_fs3_uids_info.cib_uids.macs[1], "MAC2", true);
}
return true;
}
printf("Image type: %s\n",(isFs2)? "FS2" : "FS3");
if (fwInfo.fw_info.fw_ver[0] || fwInfo.fw_info.fw_ver[1] || fwInfo.fw_info.fw_ver[2]) {
- if (isFs2) {
- printf("FW Version: %d.%d.%d\n", fwInfo.fw_info.fw_ver[0], fwInfo.fw_info.fw_ver[1],\
+ char versionStr[64] = {0};
+ snprintf(versionStr, 64, VERSION_FORMAT(fwInfo.fw_info.fw_ver[1]), fwInfo.fw_info.fw_ver[0], fwInfo.fw_info.fw_ver[1],
fwInfo.fw_info.fw_ver[2]);
- } else {
- printf("FW Version: %d.%04d.%04d\n", fwInfo.fw_info.fw_ver[0], fwInfo.fw_info.fw_ver[1],\
- fwInfo.fw_info.fw_ver[2]);
- }
+ printf("FW Version: %s\n", versionStr);
}
if (fwInfo.fw_info.fw_rel_date[0] || fwInfo.fw_info.fw_rel_date[1] || fwInfo.fw_info.fw_rel_date[2]) {
printf("MIC Version: %d.%d.%d\n", fwInfo.fw_info.mic_ver[0],\
fwInfo.fw_info.mic_ver[1], fwInfo.fw_info.mic_ver[2]);
}
- if (isFs2)
- { if (fwInfo.fs2_info.config_sectors)
+ if (isFs2) {
+ if (fwInfo.fs2_info.config_sectors) {
printf("Config Sectors: %d\n", fwInfo.fs2_info.config_sectors);
+ }
if (fwInfo.fs2_info.config_pad) {
printf("Config Pad: %d\n", fwInfo.fs2_info.config_pad);
- }
-
+ }
+ if (strlen(fwInfo.fs2_info.prs_name)) {
+ printf("PRS Name: %s\n", fwInfo.fs2_info.prs_name);
+ }
}
}
INDENTEX"flint will re-burn the current image using the given GUIDs/MACs/UIDs.";
_flagLong = "sg";
_flagShort = "";
- _param = "[guids_num=<num> step_size=<size>] | [nocrc]";
+ _param = "[guids_num=<num|num_port1,num_port2> step_size=<size|size_port1,size_port2>] | [nocrc]";
_paramExp = "nocrc: (optional) When specified the flint would not update\n"
INDENTEX"the full image crc after changing the guids\n"
- INDENTEX"num_of_guids: number of GUIDs to be allocated per physical port (FS3 Only)\n"
- INDENTEX"step_size: step size between GUIDs (FS3 Only)";
+ INDENTEX"guids_num: (optional) number of GUIDs to be allocated per physical port (FS3 Only)\n"
+ INDENTEX"step_size: (optional) step size between GUIDs (FS3 Only)\n"
+ INDENTEX"Note: guids_num/step_size values can be specified per port or for both ports";
_example = FLINT_NAME" -d "MST_DEV_EXAMPLE1" -guid 0x0002c9000100d050 sg"
"\n"INDENTEX FLINT_NAME" -d "MST_DEV_EXAMPLE4" -guid 0x0002c9000100d050 -mac 0x0002c900d050 sg";
_v = Wtv_Dev_Or_Img;
_ops = NULL;
memset(&_info, 0, sizeof(_info));
memset(&_sgParams, 0, sizeof(_sgParams));
+ memset(&(_sgParams.numOfGUIDsPP), 0xff, sizeof(_sgParams.numOfGUIDsPP));
+ memset(&(_sgParams.stepSizePP), 0xff, sizeof(_sgParams.stepSizePP));
+ _sgParams.usePPAttr = true;
}
SgSubCommand:: ~SgSubCommand()
{
if ((_flintParams.cmd_params.size() == 1 && _flintParams.cmd_params[0] != "nocrc")||\
(_flintParams.cmd_params.size() == 2 && \
- !extractUIDArgs(_flintParams.cmd_params, _sgParams.numOfGUIDs, _sgParams.stepSize))) {
+ !extractUIDArgs(_flintParams.cmd_params, _sgParams.numOfGUIDsPP, _sgParams.stepSizePP))) {
reportErr(true, "The sg parameter should be \"nocrc\", \"guids_num=<num> step_size=<size>\" or nothing\n");
return false;
}
_sgParams.uidsSpecified = _flintParams.uid_specified || _flintParams.uids_specified;
_sgParams.updateCrc = !(_flintParams.cmd_params.size() == 1);
_sgParams.stripedImage = _flintParams.striped_image;
-
return true;
}
if (!CheckSetGuidsFlags()){
return FLINT_FAILED;
}
+ if (_flintParams.guids_specified || _flintParams.macs_specified) {
+ reportErr(true, FLINT_NO_GUID_MAC_FLAGS_ERROR);
+ return FLINT_FAILED;
+ }
+
// TODO: create method that checks the flags for FS3/FS2
- if (_info.fw_info.chip_type == CT_CONNECTX) {
+ if (_info.fw_info.chip_type == CT_CONNECT_IB || _info.fw_info.chip_type == CT_SWITCH_IB) {
+ if (!_flintParams.uid_specified) {
+ reportErr(true, FLINT_NO_UID_FLAG_ERROR);
+ return FLINT_FAILED;
+ }
+ // for connectib we just need the base guid so we put it in the first location.
+ _sgParams.userGuids.resize(1);
+ _sgParams.userGuids[0]= _flintParams.baseUid;
+ } else {
if (!_flintParams.uid_specified && !_flintParams.guid_specified && !_flintParams.mac_specified) {
- reportErr(true, "Can not set GUIDs/MACs: please run with -uid/-guid/-mac flag.\n");
+ reportErr(true, FLINT_NO_GUID_MAC_FLAGS_ERROR);
return FLINT_FAILED;
}
if (_flintParams.uid_specified) {
_sgParams.userGuids[0]= _sgParams.guidsSpecified ? _flintParams.user_guids[0] : (guid_t){0, 0};
_sgParams.userGuids[1]= _sgParams.macsSpecified ? _flintParams.user_macs[0] : (guid_t){0, 0};
}
- } else {
- if (!_flintParams.uid_specified) {
- reportErr(true, "Can not set GUIDs/MACs: uid is not specified, please run with -uid flag.\n");
- return FLINT_FAILED;
- }
- // for connectib we just need the base guid so we put it in the first location.
- _sgParams.userGuids.resize(1);
- _sgParams.userGuids[0]= _flintParams.baseUid;
}
if (!_ops->FwSetGuids(_sgParams, &verifyCbFunc)) {
INDENTEX"Use -uid flag to set the desired GUIDs, intended for production use only.";
_flagLong = "smg";
_flagShort = "";
- _param = "[guids_num=<num> step_size=<size>]";
- _paramExp = "guids_num: number of GUIDs to be allocated per physical port\n"
- INDENTEX"step_size: step size between GUIDs";
+ _param = "[guids_num=<num|num_port1,num_port2> step_size=<size|size_port1,size_port2>]";
+ _paramExp = "guids_num: (optional) number of GUIDs to be allocated per physical port\n"
+ INDENTEX"step_size: (optional) step size between GUIDs\n"
+ INDENTEX"Note: guids_num/step_size values can be specified per port or for both ports";
_example = FLINT_NAME" -i fw_image.bin -uid 0x0002c9000100d050 smg"
#ifndef __WIN__
"\n"INDENTEX FLINT_NAME" -d "MST_DEV_EXAMPLE3" -uid 0x0002c9000100d050 smg (should be used when device is idle)"
_ops = NULL;
memset(&_baseGuid, 0, sizeof(_baseGuid));
memset(&_info, 0, sizeof(_info));
+ memset(&(_baseGuid.num_of_guids_pp), 0xff, sizeof(_baseGuid.num_of_guids_pp));
+ memset(&(_baseGuid.step_size_pp), 0xff, sizeof(_baseGuid.step_size_pp));
+ _baseGuid.use_pp_attr = 1;
}
SmgSubCommand:: ~SmgSubCommand()
}
if (_flintParams.cmd_params.size() == 2 &&\
- !extractUIDArgs(_flintParams.cmd_params, _baseGuid.num_of_guids, _baseGuid.step_size)) {
+ !extractUIDArgs(_flintParams.cmd_params, _baseGuid.num_of_guids_pp, _baseGuid.step_size_pp)) {
return false;
}
reportErr(true, FLINT_MFG_ERROR, _ops->err());
return FLINT_FAILED;
}
- if (_info.fw_info.chip_type == CT_CONNECTX) {
+
+ if (_info.fw_info.chip_type == CT_CONNECT_IB || _info.fw_info.chip_type == CT_SWITCH_IB) {
+ if (!_flintParams.uid_specified) {
+ reportErr(true, "Can not set GUIDs/MACs: uid is not specified, please run with -uid flag.\n");
+ return FLINT_FAILED;
+ }
+ } else {
if (!_flintParams.uid_specified && !_flintParams.guid_specified && !_flintParams.mac_specified ) {
reportErr(true, "Can not set GUIDs/MACs: GUIDs/MACs are not specified, please run with -uid/-guid/-mac flags.\n");
return FLINT_FAILED;
}
- } else {
- if (!_flintParams.uid_specified) {
- reportErr(true, "Can not set GUIDs/MACs: uid is not specified, please run with -uid flag.\n");
- return FLINT_FAILED;
- }
}
+
bool ret;
ret = _ops->FwSetMFG(_baseGuid, &verifyCbFunc);
if (!ret) {
bool guidsSpecified, bool macsSpecified, bool uidsSpecified, bool ibDev, bool ethDev);
void printMissingGuidErr(bool ibDev, bool ethDev, bool bxDev);
- bool extractUIDArgs(std::vector<string>& cmdArgs, u_int8_t& numOfGuids, u_int8_t& stepSize);
+ bool extractUIDArgs(std::vector<string>& cmdArgs, u_int8_t numOfGuids[2], u_int8_t stepSize[2]);
+ bool extractValuesFromString(string valStr, u_int8_t values[2], string origArg);
bool getGUIDFromStr(string str, guid_t& guid, string prefixErr="");
bool getPasswordFromUser(const char *preStr, char buffer[MAX_PASSWORD_LEN+1]);
bool askUser(const char* question=NULL, bool printAbrtMsg=true);
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#ifndef MTCR_H
MTCR_ACCESS_ERROR = 0x0,
MTCR_ACCESS_MEMORY = 0x1,
MTCR_ACCESS_CONFIG = 0x2,
- MTCR_ACCESS_INBAND = 0x3,
+ MTCR_ACCESS_INBAND = 0x3
} mtcr_access_method_t;
/*
* Read 4 bytes, return number of succ. read bytes or -1 on failure
int mwrite4_block (mfile *mf, unsigned int offset, u_int32_t* data, int byte_len);
int msw_reset(mfile *mf);
+int mhca_reset(mfile *mf);
/*
* Get list of MST (Mellanox Software Tools) devices.
mfile *mopend(const char *name, int type);
-mfile *mopen_fw_ctx(void* fw_cmd_context, void* fw_cmd_func);
+mfile *mopen_fw_ctx(void* fw_cmd_context, void* fw_cmd_func, void* extra_data);
/*
* Close Mellanox driver
[\fB-d\fP|\fB--device\fP <device>] [\fB--guid\fP <GUID>]
[\fB--guids\fP <GUIDS\.\.\.>] [\fB--mac\fP <MAC>]
[\fB--macs\fP <MACs\.\.\.>] [\fB--uid\fP <UID>]
- [\fB--uids\fP <UIDs\.\.\.>] [\fB--blank_guids\fP]
- [\fB--clear_semaphore\fP] [\fB-h\fP|\fB--help\fP] [\fB--hh\fP]
- [\fB-i\fP|\fB--image\fP <image>] [\fB--qq\fP] [\fB--nofs\fP]
- [\fB--allow_psid_change\fP] [\fB--allow_rom_change\fP]
+ [\fB--blank_guids\fP] [\fB--clear_semaphore\fP]
+ [\fB-h\fP|\fB--help\fP] [\fB--hh\fP] [\fB-i\fP|\fB--image\fP <image>]
+ [\fB--qq\fP] [\fB--nofs\fP] [\fB--allow_psid_change\fP] [\fB--allow_rom_change\fP]
[\fB--override_cache_replacement\fP] [\fB--no_flash_verify\fP]
[\fB-s\fP|\fB--silent\fP] [\fB-y\fP|\fB--yes\fP] [\fB--no\fP] [\fB--vsd\fP <string>]
[\fB--use_image_ps\fP] [\fB--use_image_guids\fP]
[\fB--use_image_rom\fP] [\fB--dual_image\fP] [\fB--ignore_dev_data\fP]
- [\fB--use_fw\fP]
- [\fB--striped_image\fP] [\fB--banks\fP <bank>]
+ [\fB--use_fw\fP] [\fB--striped_image\fP] [\fB--banks\fP <bank>]
[\fB--log\fP <log_file>] [\fB--flash_params\fP <type, log2size, num_of_flashes>]
[\fB-v\fP|\fB--version\fP]
.fam T
.TP
.B
\fB--uid\fP <UID>
-: BridgeX only. Derive and set the device UIDs
-(GUIDs, MACs, WWNs).
+: ConnectIB/SwitchIB only. Derive and set the device UIDs
+(GUIDs, MACs).
UIDs are derived from the given base UID
according to Mellanox Methodology
Commands affected: burn, sg
.TP
.B
-\fB--uids\fP <UIDs\.\.\.>
-: BridgeX only. 29 space separated UIDs must
-be specified here.
-The specified UIDs are assigned to the following
-fields, repectively:
-.RS
-G0-MAC-PI0 G0-MAC-PI1 G0-MAC-PI2 G0-MAC-PE0
-G0-MAC-PE1 G0-MAC-PE2 G0-MAC-PE3 G0-FC-WWPN-P0
-G0-FC-WWPN-P1 G0-FC-WWPN-P2 G0-FC-WWPN-P3 G0-IB-NODE-GUID
-G0-IB-PORT-GUID G0-FC-WWNN G1-MAC-PI0 G1-MAC-PI1
-G1-MAC-PI2 G1-MAC-PE0 G1-MAC-PE1 G1-MAC-PE2
-G1-MAC-PE3 G1-FC-WWPN-P0 G1-FC-WWPN-P1 G1-FC-WWPN-P2
-G1-FC-WWPN-P3 G1-IB-NODE-GUID G1-IB-PORT-GUID G1-FC-WWNN
-IB-SYSTEM-GUID
-
-Commands affected:
-burn, sg
-.RE
-.TP
-.B
\fB--blank_guids\fP
: Burn the image with blank GUIDs and MACs
(where
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
+ * Version: $Id$
+ *
*/
-
-// TODO: remove all commented defines and ifdefs of __be32.... or __cpu_to_be32... etc (they are taken from compatibility.h now)
#ifdef IRISC
-//#define __cpu_to_be32(val) (val)
+
#define NULL 0
#else
//
// DJGPP - GCC PORT TO MS DOS
//
-
#include <netinet/in.h>
#include <unistd.h>
#define bswap_32(x) ntohl(x)
-
-#else
-#ifdef __FreeBSD__
-#include <netinet/in.h>
-#define SWAPL(l) ntohl(l)
-#include <sys/endian.h>
-#else // Linux
-#include <byteswap.h>
-#include <endian.h>
-#endif
-
#endif // __DJGPP__
-#ifndef __FreeBSD__
-#define SWAPL(l) bswap_32(l)
-#endif
-
#define OP_NOT_SUPPORTED EOPNOTSUPP
#else // __WIN__
//
// Windows (Under DDK)
//
-
-#include <io.h>
-#include <Winsock2.h>
-#include <windows.h>
-#define SWAPL(l) ntohl(l)
-#define inline __inline
-
#define OP_NOT_SUPPORTED EINVAL
#define usleep(x) Sleep(((x + 999)/1000))
#define CONNECT_IB_HW_ID 0x1FF
#define SWITCH_IB_HW_ID 0x247
-#define SWITCH_EN_HW_ID 0x249
+#define SPECTRUM_HW_ID 0x249
/*
* Device IDs Macros:
#define IS_SIB(dev_id) \
((dev_id) == SWITCH_IB_HW_ID)
#define IS_SEN(dev_id) \
- ((dev_id) == SWITCH_EN_HW_ID)
+ ((dev_id) == SPECTRUM_HW_ID)
#define IS_IS4_FAMILY(dev_id) \
(((dev_id) == 435) || ((dev_id) == 6100)) // 435 == InfiniScaleIV, 6100 == BridgeX
#define IS_CONNECT_IB(dev_id) \
if (bytes_num == 2) {
gw_cmd = MERGE(gw_cmd, 1, HBO_MSIZE, 1);
}
-
- return cntx_exec_cmd_set(mfl, gw_cmd, &status_reg, 1, NULL, "Write-Status-Register");
+ rc = cntx_exec_cmd_set(mfl, gw_cmd, &status_reg, 1, NULL, "Write-Status-Register");
+ // wait for flash to write the register
+ msleep(30);
+ return rc;
}
mflash_env = getenv(MFLASH_ENV);
if (mflash_env) {
- num = atoi(mflash_env);
+ num = atol(mflash_env);
// make sure the value makes sense
num = (num > 16 || num <= 0) ? -1 : num;
return num;
return MFE_NOT_SUPPORTED_OPERATION;
}
+#define MAX_BLOCK_SIZE(hw_dev_id)\
+ (((hw_dev_id) == CX3_HW_ID || hw_dev_id == CX3_PRO_HW_ID) ? MAX_WRITE_BUFFER_SIZE : 128)
+
static int update_max_write_size(mflash* mfl)
{
u_int32_t max_reg_size = mget_max_reg_size(mfl->mf);
+ u_int32_t max_block_size = MAX_BLOCK_SIZE(mfl->attr.hw_dev_id);
if (!max_reg_size) {
return MFE_BAD_PARAMS;
}
max_reg_size = NEAREST_POW2(max_reg_size);
- // limit maximal write to MAX_WRITE_BUFFER_SIZE
- max_reg_size = max_reg_size > MAX_WRITE_BUFFER_SIZE ? MAX_WRITE_BUFFER_SIZE : max_reg_size;
- mfl->attr.block_write = max_reg_size;
- mfl->attr.page_write = max_reg_size;
+ // limit maximal write to max_block_size
+ max_block_size = max_reg_size < max_block_size ? max_reg_size : max_block_size;
+ mfl->attr.block_write = max_block_size;
+ mfl->attr.page_write = max_block_size;
return ME_OK;
}
if (mfl->opts[MFO_IGNORE_SEM_LOCK]) {
rc = mfl->f_lock(mfl, 0); CHECK_RC(rc);
}
-
return MFE_OK;
}
}
int mf_opend_int (mflash** pmfl, void* access_dev, int num_of_banks, flash_params_t* flash_params, int ignore_cache_rep_guard, u_int8_t access_type,
- void* access_func, int cx3_fw_access) {
+ void* dev_extra, int cx3_fw_access) {
int rc;
*pmfl = (mflash*)malloc(sizeof(mflash));
if (!*pmfl) {
(*pmfl)->mf = (mfile*)access_dev;
} else if (access_type == MFAT_UEFI) {
// open mfile as uefi
- if (!((*pmfl)->mf = mopen_fw_ctx(access_dev, access_func))){
+ if (!((*pmfl)->mf = mopen_fw_ctx(access_dev, ((uefi_dev_extra_t*)dev_extra)->fw_cmd_func,\
+ ((uefi_dev_extra_t*)dev_extra)->dev_info)) ){
free((*pmfl));
return MFE_NOMEM;
}
+ // fill some device information
+ if (((uefi_dev_extra_t*)dev_extra)->dev_info) {
+ (*pmfl)->attr.hw_dev_id = ((uefi_dev_extra_t*)dev_extra)->dev_info->hw_dev_id;
+ (*pmfl)->attr.rev_id = ((uefi_dev_extra_t*)dev_extra)->dev_info->rev_id;
+ }
}
rc = mf_open_fw(*pmfl, flash_params, num_of_banks);
}
-int mf_open_uefi(mflash** pmfl, uefi_Dev_t *uefi_dev, f_fw_cmd fw_cmd_func)
+int mf_open_uefi(mflash** pmfl, uefi_Dev_t *uefi_dev, uefi_dev_extra_t* uefi_dev_extra)
{
- return mf_opend_int(pmfl, (void*)uefi_dev, 4, NULL, 0, MFAT_UEFI, (void*)fw_cmd_func, 0);
+ return mf_opend_int(pmfl, (void*)uefi_dev, 4, NULL, 0, MFAT_UEFI, (void*)uefi_dev_extra, 0);
}
int mf_open_int (mflash** pmfl, const char* dev, int num_of_banks, flash_params_t* flash_params,
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
+ * Version: $Id$
+ *
*/
-
#ifndef MFLASH_H
#define MFLASH_H
#include "mflash_types.h"
#include "mflash_common_structs.h"
+#include <mlxfwops/uefi_c/mft_uefi_common.h>
+
#ifdef __cplusplus
#define EXTERN_C_START extern "C" {
#define EXTERN_C_END }
u_int8_t sectors_num;
} write_protect_info_t;
-// TODO: remove UEFI REMNANTS
-typedef struct _MLX4_DEV uefi_Dev_t;
-typedef int (*f_fw_cmd) (uefi_Dev_t* dev, void* buffer, int* size);
-
/////////////////////////////////////////////
//
// MFLASH INTERFACE FUNCTIONS
int mf_open_adv (mflash** pmfl, const char* dev, int num_of_banks, flash_params_t* flash_params,
int ignore_cache_rep_guard, int cx3_fw_access);
-int mf_open_uefi(mflash** pmfl, uefi_Dev_t *uefi_dev, f_fw_cmd fw_cmd_func);
+int mf_open_uefi(mflash** pmfl, uefi_Dev_t *uefi_dev, uefi_dev_extra_t* dev_extra);
int mf_open_ignore_lock(mflash* mfl);
void mf_close (mflash* mfl);
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
-
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <mtcr.h>
#include <reg_access.h>
+
+#ifndef UEFI_BUILD
#include <tools_res_mgmt.h>
+#endif
#include "mflash_types.h"
#include "mflash_pack_layer.h"
#define MAX_FLASH_PROG_SEM_RETRY_CNT 2048
static int lock_flash_programing_sem(mflash* mfl)
{
+#ifndef UEFI_BUILD
int rc;
if (mfl->opts[MFO_FW_ACCESS_TYPE_BY_MFILE] == ATBM_ICMD) {
rc = trm_lock(mfl->mf, TRM_RES_FLASH_PROGRAMING, MAX_FLASH_PROG_SEM_RETRY_CNT);
return MFE_SEM_LOCKED;
}
}
+#endif
return MFE_OK;
}
static int unlock_flash_programing_sem(mflash* mfl)
{
+#ifndef UEFI_BUILD
int rc;
if (mfl->opts[MFO_FW_ACCESS_TYPE_BY_MFILE] == ATBM_ICMD) {
rc = trm_unlock(mfl->mf, TRM_RES_FLASH_PROGRAMING);
return MFE_SEM_LOCKED;
}
}
+#endif
return MFE_OK;
}
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
- */
-
-/*
- * mflash_inband.h
*
- * Created on: Jul 6, 2011
- * Author: mohammad
+ * Version: $Id$
+ *
*/
#ifndef MFLASH_ACCESS_LAYER_H_
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
- *
+ *
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#ifndef MFLASH_COMMON_STRUCTS_H
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#include <stdio.h>
mflash_env = getenv(MFLASH_BANK_DEBUG);
if (mflash_env) {
- max_bank = atoi(mflash_env);
+ max_bank = atol(mflash_env);
if (bank_num > max_bank) {
printf("-E- there was an attempt to set the flash bank to: %d. max allowed value: %d\n", bank_num, max_bank);
return MFE_ILLEGAL_BANK_NUM;
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
- */
-
-/*
- * mflash_inband.h
*
- * Created on: Jul 6, 2011
- * Author: mohammad
+ * Version: $Id$
+ *
*/
#ifndef MFLASH_COMMON_H_
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
- *
+ *
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
-
#ifndef MFLASH_TYPES_H
#define MFLASH_TYPES_H
#get mst device examples and tool name from makefile
AM_CXXFLAGS += -DMLXCFG_NAME=\"mstconfig\"
-AM_CXXFLAGS += -DMST_DEV_EXAMPLE=\"/sys/bus/pci/devices/0000:04:00.0/config\"
+AM_CXXFLAGS += -DMST_DEV_EXAMPLE=\"04:00.0\" -DMST_DEV_EXAMPLE2=\"05:00.0\"
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
- */
-/*
- * mlxcfg_lib.cpp
*
- * Created on: Feb 17, 2014
- * Author: adrianc
+ * Version: $Id$
+ *
*/
#include <set>
}
// update cfg specific info.
+ // TODO: adrianc: when getting defaults for 4th gen , perform queryDefParams only once and pass struct to classes to avoid calling multiple times
for (std::map<mlxCfgType, CfgParams*>::iterator paramIt = _cfgList.begin(); paramIt != _cfgList.end(); paramIt++) {
paramIt->second->setDevCapVec(_suppVec);
if (paramIt->second->cfgSupported(_mf)) {
break;
case DeviceConnectIB:
case DeviceConnectX4:
+ case DeviceConnectX4LX:
_isFifthGen = true;
break;
default:
return errmsg(MCE_UNSUPPORTED_DEVICE);
}
- // init _cfgList
+ // init _cfgList, _param2TypeMap
if (_isFifthGen) {
- _cfgList[Mct_Sriov] = new SriovParams5thGen();
- _cfgList[Mct_Wol_P1] = new WolParams5thGen(1);
- _cfgList[Mct_Wol_P2] = new WolParams5thGen(2);
- _cfgList[Mct_Vpi_P1] = new VpiParams5thGen(1);
- _cfgList[Mct_Vpi_P2] = new VpiParams5thGen(2);
- _cfgList[Mct_Bar_Size] = new BarSzParams5thGen();
- _cfgList[Mct_Pci] = new PciParams5thGen();
- _cfgList[Mct_Tpt] = new TptParams5thGen();
+ // Wake On LAN
+ _cfgList[Mct_Wol] = new WolParams5thGen();
+ _param2TypeMap[Mcp_Wol_Magic_En] = Mct_Wol;
+ // Vpi Settings
+ _cfgList[Mct_Vpi_P1] = new VpiParams5thGen(1);
+ _cfgList[Mct_Vpi_P2] = new VpiParams5thGen(2);
+ _param2TypeMap[Mcp_Link_Type_P1] = Mct_Vpi_P1;
+ _param2TypeMap[Mcp_Link_Type_P2] = Mct_Vpi_P2;
+ // PCI settings
+ _cfgList[Mct_Pci] = new PciParams5thGen();
+ _param2TypeMap[Mcp_Sriov_En] = Mct_Pci;
+ _param2TypeMap[Mcp_Num_Of_Vfs] = Mct_Pci;
+ _param2TypeMap[Mcp_Fpp_En] = Mct_Pci;
+ // TPT settings
+ _cfgList[Mct_Tpt] = new TptParams5thGen();
+ _param2TypeMap[Mcp_Log_Tpt_Size] = Mct_Tpt;
+ // Infiniband DC settings
+ _cfgList[Mct_Dc] = new IBDCParams5thGen();
+ _param2TypeMap[Mcp_Log_Dcr_Hash_Table_Size] = Mct_Dc;
+ _param2TypeMap[Mcp_Dcr_Lifo_Size] = Mct_Dc;
+ // Port Boot State
+ /*_cfgList[Mct_Boot_State_P1] = new PortBootStateParams5thGen(1);
+ _cfgList[Mct_Boot_State_P2] = new PortBootStateParams5thGen(2);
+ _param2TypeMap[Mcp_Boot_State_P1] = Mct_Boot_State_P1;
+ _param2TypeMap[Mcp_Boot_State_P2] = Mct_Boot_State_P2;
+ */
+ // RoCE v1.5 next protocol
+ _cfgList[Mct_RoCE_Next_Protocol] = new RoCENextProtocolParams5thGen();
+ _param2TypeMap[Mcp_RoCE_Next_Protocol] = Mct_RoCE_Next_Protocol;
+ // RoCE CC parameters
+ _cfgList[Mct_RoCE_CC_P1] = new RoCECCParams5thGen(1);
+ _cfgList[Mct_RoCE_CC_P2] = new RoCECCParams5thGen(2);
+ _param2TypeMap[Mcp_RoCE_CC_Algorithm_P1] = Mct_RoCE_CC_P1;
+ _param2TypeMap[Mcp_RoCE_CC_Prio_Mask_P1] = Mct_RoCE_CC_P1;
+ _param2TypeMap[Mcp_RoCE_CC_Algorithm_P2] = Mct_RoCE_CC_P2;
+ _param2TypeMap[Mcp_RoCE_CC_Prio_Mask_P2] = Mct_RoCE_CC_P2;
+ // RoCE CC ECN parameters
+ _cfgList[Mct_RoCE_CC_Ecn_P1] = new RoCECCEcnParams5thGen(1);
+ _cfgList[Mct_RoCE_CC_Ecn_P2] = new RoCECCEcnParams5thGen(2);
+ _param2TypeMap[Mcp_Clamp_Tgt_Rate_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Time_Reset_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Byte_Reset_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Threshold_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Max_Rate_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Ai_Rate_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Hai_Rate_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Gd_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Min_Dec_Fac_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rpg_Min_Rate_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rate_To_Set_On_First_Cnp_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Dce_Tcp_G_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Dce_Tcp_Rtt_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Rate_Reduce_Monitor_Period_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Initial_Alpha_Value_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Min_Time_Between_Cnps_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Cnp_Dscp_P1] = Mct_RoCE_CC_Ecn_P1;
+ _param2TypeMap[Mcp_Cnp_802p_Prio_P1] = Mct_RoCE_CC_Ecn_P1;
+
+ _param2TypeMap[Mcp_Clamp_Tgt_Rate_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Time_Reset_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Byte_Reset_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Threshold_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Max_Rate_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Ai_Rate_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Hai_Rate_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Gd_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Min_Dec_Fac_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rpg_Min_Rate_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rate_To_Set_On_First_Cnp_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Dce_Tcp_G_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Dce_Tcp_Rtt_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Rate_Reduce_Monitor_Period_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Initial_Alpha_Value_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Min_Time_Between_Cnps_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Cnp_Dscp_P2] = Mct_RoCE_CC_Ecn_P2;
+ _param2TypeMap[Mcp_Cnp_802p_Prio_P2] = Mct_RoCE_CC_Ecn_P2;
+
} else {
- _cfgList[Mct_Sriov] = new SriovParams4thGen();
- _cfgList[Mct_Wol_P1] = new WolParams4thGen(1);
- _cfgList[Mct_Wol_P2] = new WolParams4thGen(2);
- _cfgList[Mct_Vpi_P1] = new VpiParams4thGen(1);
- _cfgList[Mct_Vpi_P2] = new VpiParams4thGen(2);
+ // SR-IOV
+ _cfgList[Mct_Sriov] = new SriovParams4thGen();
+ _param2TypeMap[Mcp_Sriov_En] = Mct_Sriov;
+ _param2TypeMap[Mcp_Num_Of_Vfs] = Mct_Sriov;
+ // Wake on LAN
+ _cfgList[Mct_Wol_P1] = new WolParams4thGen(1);
+ _cfgList[Mct_Wol_P2] = new WolParams4thGen(2);
+ _param2TypeMap[Mcp_Wol_Magic_En_P1] = Mct_Wol_P1;
+ _param2TypeMap[Mcp_Wol_Magic_En_P2] = Mct_Wol_P2;
+ // Vpi Settings
+ _cfgList[Mct_Vpi_P1] = new VpiParams4thGen(1);
+ _cfgList[Mct_Vpi_P2] = new VpiParams4thGen(2);
+ _param2TypeMap[Mcp_Link_Type_P1] = Mct_Vpi_P1;
+ _param2TypeMap[Mcp_Link_Type_P2] = Mct_Vpi_P2;
+ // BAR size
_cfgList[Mct_Bar_Size] = new BarSzParams4thGen();
+ _param2TypeMap[Mcp_Log_Bar_Size] = Mct_Bar_Size;
+ // Infiniband Boot Settings
+ _cfgList[Mct_Boot_Settings_P1] = new InfinibandBootSettingsParams4thGen(1);
+ _cfgList[Mct_Boot_Settings_P2] = new InfinibandBootSettingsParams4thGen(2);
+ _param2TypeMap[Mcp_Boot_Pkey_P1] = Mct_Boot_Settings_P1;
+ _param2TypeMap[Mcp_Boot_Pkey_P2] = Mct_Boot_Settings_P2;
+ // Preboot Boot Settings
+ _cfgList[Mct_Preboot_Boot_Settings_P1] = new PrebootBootSettingsParams4thGen(1);
+ _cfgList[Mct_Preboot_Boot_Settings_P2] = new PrebootBootSettingsParams4thGen(2);
+ _param2TypeMap[Mcp_Boot_Option_Rom_En_P1] = Mct_Preboot_Boot_Settings_P1;
+ _param2TypeMap[Mcp_Boot_Vlan_En_P1] = Mct_Preboot_Boot_Settings_P1;
+ _param2TypeMap[Mcp_Boot_Retry_Cnt_P1] = Mct_Preboot_Boot_Settings_P1;
+ _param2TypeMap[Mcp_Legacy_Boot_Protocol_P1] = Mct_Preboot_Boot_Settings_P1;
+ _param2TypeMap[Mcp_Boot_Vlan_P1] = Mct_Preboot_Boot_Settings_P1;
+
+ _param2TypeMap[Mcp_Boot_Option_Rom_En_P2] = Mct_Preboot_Boot_Settings_P2;
+ _param2TypeMap[Mcp_Boot_Vlan_En_P2] = Mct_Preboot_Boot_Settings_P2;
+ _param2TypeMap[Mcp_Boot_Retry_Cnt_P2] = Mct_Preboot_Boot_Settings_P2;
+ _param2TypeMap[Mcp_Legacy_Boot_Protocol_P2] = Mct_Preboot_Boot_Settings_P2;
+ _param2TypeMap[Mcp_Boot_Vlan_P2] = Mct_Preboot_Boot_Settings_P2;
}
int MlxCfgOps::invalidateCfgs4thGen()
{
struct tools_open_mnvia mnviaTlv;
- u_int8_t buffer[tools_open_mnvia_size()];
+ u_int8_t buffer[TOOLS_OPEN_MNVIA_SIZE] = {0};
memset(&mnviaTlv, 0, sizeof(struct tools_open_mnvia));
- memset(buffer, 0, tools_open_mnvia_size());
tools_open_mnvia_pack(&mnviaTlv, buffer);
return reg_access_mnvia(_mf, REG_ACCESS_METHOD_SET, &mnviaTlv);
}
int MlxCfgOps::invalidateCfgs5thGen()
{
- struct tools_open_nvdia nvdiaTlv;
- u_int8_t buffer[tools_open_nvdia_size()];
- memset(&nvdiaTlv, 0, sizeof(struct tools_open_nvdia));
- memset(buffer, 0, tools_open_nvdia_size());
- tools_open_nvdia_pack(&nvdiaTlv, buffer);
- return reg_access_nvdia(_mf, REG_ACCESS_METHOD_SET, &nvdiaTlv);
+ struct tools_open_nvia nviaTlv;
+ u_int8_t buffer[TOOLS_OPEN_NVIA_SIZE] = {0};
+ memset(&nviaTlv, 0, sizeof(struct tools_open_nvia));
+ tools_open_nvia_pack(&nviaTlv, buffer);
+ return reg_access_nvia(_mf, REG_ACCESS_METHOD_SET, &nviaTlv);
}
int MlxCfgOps::invalidateCfgs()
{
int rc;
if (_isFifthGen) {
- return errmsg(MCE_REG_NOT_SUPP, "Reset configuration not supported.");
- //rc = invalidateCfgs5thGen();
+ rc = invalidateCfgs5thGen();
} else {
rc = invalidateCfgs4thGen();
}
int rc;
struct cibfw_register_mfrl mfrl;
memset(&mfrl, 0, sizeof(mfrl));
- if (_isFifthGen && _deviceId == DeviceConnectX4) {
+ if (_isFifthGen && (_deviceId == DeviceConnectX4 || _deviceId == DeviceConnectX4LX)) {
// send warm boot (bit 6)
mfrl.reset_level = 1 << 6;
rc = reg_access_mfrl(_mf,REG_ACCESS_METHOD_SET, &mfrl);
mlxCfgType MlxCfgOps::cfgParam2Type(mlxCfgParam param)
{
- switch (param) {
- case Mcp_Sriov_En :
- return _isFifthGen ? Mct_Pci :Mct_Sriov;
- case Mcp_Num_Of_Vfs :
- return _isFifthGen ? Mct_Pci : Mct_Sriov;
- case Mcp_Fpp_En:
- return _isFifthGen ? Mct_Pci : Mct_Last;
- case Mcp_Log_Tpt_Size :
- return _isFifthGen ? Mct_Tpt : Mct_Last;
- case Mcp_Wol_Magic_En_P1 :
- return Mct_Wol_P1;
- case Mcp_Wol_Magic_En_P2 :
- return Mct_Wol_P2;
- case Mcp_Link_Type_P1 :
- return Mct_Vpi_P1;
- case Mcp_Link_Type_P2 :
- return Mct_Vpi_P2;
- case Mcp_Log_Bar_Size :
- return Mct_Bar_Size;
- default :
- return Mct_Last;
+ if (_param2TypeMap.find(param) == _param2TypeMap.end()) {
+ return Mct_Last;
}
+ return _param2TypeMap[param];
}
+int MlxCfgOps::setRawCfg(std::vector<u_int32_t> rawTlvVec)
+{
+ if (!_isFifthGen) {
+ return errmsg("Setting Raw Configuration is supported for 5th Generation devices only.");
+ }
+ RawCfgParams5thGen rawTlv;
+ if (rawTlv.setRawData(rawTlvVec)) {
+ return errmsg("%s", rawTlv.err());
+ }
+
+ if (rawTlv.setOnDev(_mf)) {
+ return errmsg("%s", rawTlv.err());
+ }
+ return MCE_SUCCESS;
+}
+
+int MlxCfgOps::dumpRawCfg(std::vector<u_int32_t> rawTlvVec, std::string& tlvDump)
+{
+ RawCfgParams5thGen rawTlv;
+ if (rawTlv.setRawData(rawTlvVec)) {
+ return errmsg("%s", rawTlv.err());
+ }
+ tlvDump = rawTlv.dumpTlv();
+ return MCE_SUCCESS;
+}
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
- */
-/*
- * mlxcfg_lib.h
*
- * Created on: Feb 17, 2014
- * Author: adrianc
+ * Version: $Id$
+ *
*/
#ifndef MLXCFG_LIB_H_
int setCfg(mlxCfgParam cfgParam, u_int32_t val);
int setCfg(const std::vector<cfgInfo>& infoVec);
+ int setRawCfg(std::vector<u_int32_t> rawTlvVec);
+
+ int dumpRawCfg(std::vector<u_int32_t> rawTlvVec, std::string& tlvDump);
+
int invalidateCfgs();
// Set/Un-Set ignore limits for all configurations
mlxCfgType cfgParam2Type(mlxCfgParam param);
std::map<mlxCfgType, CfgParams*> _cfgList; // needs to be initialized in constructor and freed in destructor, will contain all the tools supported cfgs
+ std::map<mlxCfgParam, mlxCfgType> _param2TypeMap;
dm_dev_id_t _deviceId;
mfile* _mf;
u_int64_t _suppVec;
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
- */
-/*
- * mlxcfg_param_lib.cpp
*
- * Created on: Mar 22, 2015
- * Author: adrianc
+ * Version: $Id$
+ *
*/
#include <signal.h>
#include <math.h>
+#include <sstream>
+#include <string>
#include <mft_sig_handler.h>
#include <reg_access/reg_access.h>
#define CHECK_RC(rc)\
if (rc) return rc;
+/*
+ * Macros for getting and settings a TLV
+ */
+// TODO: adrianc: add macro for nvqc tlv and use it in cfgSupported for 5th gen Tlvs
+
+/*
+ * Macros Below rely on the fact that the user has implemented within the parameter class:
+ * void updateClassAttrFromTlv(void*);
+ * void updateTLVFromClassAttr(void*);
+ *
+ * those method do what they imply: update the class internal memeber from TLV and via versa.
+ */
+
+#define SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tlvStructName, tlvNameStr) \
+ MError __mRc;\
+ if (!(ignoreCheck) && !checkCfg()) {\
+ return MCE_BAD_PARAMS;\
+ }\
+ int __tlvBuffSize = tlvStructName##_size();\
+ u_int8_t __tlvBuff[__tlvBuffSize];\
+ memset(__tlvBuff, 0, __tlvBuffSize);\
+ struct tlvStructName __tlvStruct;\
+ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\
+ __mRc = mnvaCom5thGen(mf, __tlvBuff, __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_GET);\
+ if (__mRc && __mRc != ME_REG_ACCESS_RES_NOT_AVLBL) {\
+ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\
+ }\
+ tlvStructName##_unpack(&__tlvStruct, __tlvBuff);\
+ updateTlvFromClassAttr((void*)&__tlvStruct);\
+ tlvStructName##_pack(&__tlvStruct, __tlvBuff);\
+ __mRc = mnvaCom5thGen(mf, __tlvBuff, __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_SET);\
+ if (__mRc) {\
+ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\
+ }\
+ _updated = false;\
+ return MCE_SUCCESS
+
+#define GET_FROM_DEV_5TH_GEN(mf, tlvStructName, tlvNameStr) \
+ MError __mRc;\
+ int __tlvBuffSize = tlvStructName##_size();\
+ u_int8_t __tlvBuff[__tlvBuffSize];\
+ memset(__tlvBuff, 0, __tlvBuffSize);\
+ struct tlvStructName __tlvStruct;\
+ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\
+ if (_updated) {\
+ return MCE_SUCCESS;\
+ }\
+ __mRc = mnvaCom5thGen(mf, &__tlvBuff[0], __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_GET);\
+ if (__mRc) {\
+ if (__mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {\
+ return MCE_SUCCESS;\
+ }\
+ return errmsg("Failed to get %s settings: %s", tlvNameStr, m_err2str(__mRc));\
+ }\
+ tlvStructName##_unpack(&__tlvStruct, &__tlvBuff[0]);\
+ updateClassAttrFromTlv((void*)&__tlvStruct);\
+ _updated = true;\
+ return MCE_SUCCESS
+
+#define SET_ON_DEV_4TH_GEN(mf, ignoreCheck, tlvStructName, tlvNameStr, typeMod) \
+ MError __mRc;\
+ if (!(ignoreCheck) && !checkCfg()) {\
+ return MCE_BAD_PARAMS;\
+ }\
+ int __tlvBuffSize = tlvStructName##_size();\
+ u_int8_t __tlvBuff[__tlvBuffSize];\
+ memset(__tlvBuff, 0, __tlvBuffSize);\
+ struct tlvStructName __tlvStruct;\
+ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\
+ __mRc = mnvaCom4thGen(mf, __tlvBuff, __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_GET, typeMod);\
+ if (__mRc && __mRc != ME_REG_ACCESS_RES_NOT_AVLBL) {\
+ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\
+ }\
+ tlvStructName##_unpack(&__tlvStruct, __tlvBuff);\
+ updateTlvFromClassAttr((void*)&__tlvStruct);\
+ tlvStructName##_pack(&__tlvStruct, __tlvBuff);\
+ __mRc = mnvaCom4thGen(mf, __tlvBuff, __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_SET, typeMod);\
+ if (__mRc) {\
+ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\
+ }\
+ _updated = false;\
+ return MCE_SUCCESS
+
+#define GET_FROM_DEV_4TH_GEN(mf, tlvStructName, tlvNameStr, typeMod) \
+ MError __mRc;\
+ int __tlvBuffSize = tlvStructName##_size();\
+ u_int8_t __tlvBuff[__tlvBuffSize];\
+ memset(__tlvBuff, 0, __tlvBuffSize);\
+ struct tlvStructName __tlvStruct;\
+ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\
+ if (_updated) {\
+ return MCE_SUCCESS;\
+ }\
+ __mRc = mnvaCom4thGen(mf, &__tlvBuff[0], __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_GET, typeMod);\
+ if (__mRc) {\
+ if (__mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {\
+ return MCE_SUCCESS;\
+ }\
+ return errmsg("Failed to get %s settings: %s", tlvNameStr, m_err2str(__mRc));\
+ }\
+ tlvStructName##_unpack(&__tlvStruct, &__tlvBuff[0]);\
+ updateClassAttrFromTlv((void*)&__tlvStruct);\
+ _updated = true;\
+ return MCE_SUCCESS
+
+
static void dealWithSignal()
{
int sig;
* Class implementations :
***************************/
+/*
+ * RawCfgParams5thGen Class implementation
+ */
+
+int RawCfgParams5thGen::setRawData(const std::vector<u_int32_t>& tlvBuff) {
+ _tlvBuff = tlvBuff;
+ memset(&_nvdaTlv, 0, sizeof(struct tools_open_nvda));
+ std::vector<u_int32_t> tlvBuffBe = _tlvBuff;
+ for (std::vector<u_int32_t>::iterator it = tlvBuffBe.begin(); it != tlvBuffBe.end(); it++ ) {
+ *it = __cpu_to_be32(*it);
+ }
+ tools_open_nvda_unpack(&_nvdaTlv, ((u_int8_t*)(&tlvBuffBe[0])));
+ return verifyTlv();
+}
+
+int RawCfgParams5thGen::setOnDev(mfile* mf) {
+ int rc;
+ mft_signal_set_handling(1);
+ DEBUG_PRINT_SEND(&_nvdaTlv, nvda);
+ rc = reg_access_nvda(mf, REG_ACCESS_METHOD_SET, &_nvdaTlv);
+ DEBUG_PRINT_RECIEVE(&_nvdaTlv, nvda);
+ dealWithSignal();
+ if (rc) {
+ return errmsg("Failed to set raw TLV: %s", m_err2str((MError)rc));
+ }
+ return MCE_SUCCESS;
+}
+
+std::string RawCfgParams5thGen::dumpTlv() {
+ char str[1024] = {0};
+ snprintf(str, 1024, "Length: 0x%x\nVersion: %d\nOverrideEn: %d\nType: 0x%08x\nData: ", _nvdaTlv.nv_hdr.length,\
+ _nvdaTlv.nv_hdr.version, _nvdaTlv.nv_hdr.over_en, _nvdaTlv.nv_hdr.type.tlv_type_dw.tlv_type_dw);
+ for (size_t i=3; i < _tlvBuff.size(); i++) {
+ char numStr[64] = {0};
+ snprintf(numStr, 64, "0x%08x ", _tlvBuff[i]);
+ strcat(str, numStr);
+ }
+ strcat(str, "\n");
+ return str;
+}
+
+int RawCfgParams5thGen::verifyTlv() {
+ // check TLV length
+ int tlvLength = (_tlvBuff.size() - 3) << 2;
+ if (tlvLength != _nvdaTlv.nv_hdr.length) {
+ return errmsg(MCE_BAD_PARAM_VAL, "TLV size mismatch. reported length in TLV header: 0x%x. actual length: 0x%x", _nvdaTlv.nv_hdr.length, tlvLength);
+ }
+ return MCE_SUCCESS;
+}
+
/*
* CfgParams Class implementation :
*/
}
if (_sriovEn != 0 && _sriovEn != 1) {
- errmsg("illegal SRIOV_EN parameters value. (should be 0 or 1)");
+ errmsg("illegal SRIOV_EN parameter value. (should be 0 or 1)");
return false;
}
return true;
return true;
}
+
/*
- * SriovParams5thGen Class implementation
+ * WolParams Class implementation :
*/
-bool SriovParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param)
+bool WolParams::hardLimitCheck()
{
- (void)mf;
- (void)param;
+ if (_wolMagicEn == 0 || _wolMagicEn == 1 ) {
+ return true;
+ }
+ errmsg("illegal WOL parameter value. can be either 0 or 1.");
return false;
}
-int SriovParams5thGen::getDefaultParams(mfile* mf)
-{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
-}
-
-int SriovParams5thGen::getFromDev(mfile* mf)
-{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
-}
-
-int SriovParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
-{
- (void)mf;
- (void)ignoreCheck;
- return MCE_NOT_IMPLEMENTED;
-}
-
-int SriovParams5thGen::updateMaxVfs(mfile* mf)
-{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
-}
-
-bool SriovParams5thGen::softLimitCheck(mfile* mf)
-{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
-}
-
/*
- * WolParams Class implementation :
+ * WolParams4thGen Class implementation :
*/
-void WolParams::setParam(mlxCfgParam paramType, u_int32_t val)
+void WolParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val)
{
- if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1 ) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2) ) {
+ if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2) ) {
_wolMagicEn = val;
}
}
-u_int32_t WolParams::getParam(mlxCfgParam paramType)
+u_int32_t WolParams4thGen::getParam(mlxCfgParam paramType)
{
- if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1 ) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2) ) {
+ if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2)) {
return _wolMagicEn;
}
return MLXCFG_UNKNOWN;
}
-
-
-bool WolParams::hardLimitCheck()
-{
- if (_wolMagicEn == 0 || _wolMagicEn == 1 ) {
- return true;
- }
- errmsg("illegal WOL parameter value. can be either 0 or 1.");
- return false;
-}
-
-/*
- * WolParams4thGen Class implementation :
- */
-
bool WolParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param)
{
(void)mf;
struct tools_open_query_def_params_per_port port_params;
int rc = getDefaultParams4thGen(mf, _port , &port_params);
if (rc == MCE_SUCCESS) {
- _wolMagicEn = port_params.en_wol_magic;
+ _wolMagicEn = port_params.default_en_wol_magic;
} else {
rc = MCE_GET_DEFAULT_PARAMS;
}
* WolParams5thGen Class implementation :
*/
+void WolParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ if (paramType == Mcp_Wol_Magic_En ) {
+ _wolMagicEn = val;
+ }
+}
+
+u_int32_t WolParams5thGen::getParam(mlxCfgParam paramType)
+{
+ if (paramType == Mcp_Wol_Magic_En) {
+ return _wolMagicEn;
+ }
+ return MLXCFG_UNKNOWN;
+}
+
bool WolParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param)
{
- (void)mf;
+ MError rc;
(void)param;
- return false;
+ bool suppRead, suppWrite;
+ rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get Wake On LAN parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ return (suppRead && suppWrite);
}
int WolParams5thGen::getDefaultParams(mfile* mf)
{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
+ return getFromDev(mf);
}
int WolParams5thGen::getFromDev(mfile* mf)
{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
+ GET_FROM_DEV_5TH_GEN(mf, tools_open_wol, "Wake On LAN");
}
int WolParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
{
- (void)mf;
- (void)ignoreCheck;
- return MCE_NOT_IMPLEMENTED;
+ SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_wol, "Wake On LAN");
+}
+
+u_int32_t WolParams5thGen::getTlvTypeBe()
+{
+ struct tools_open_per_host_type type;
+ u_int32_t tlvType = 0;
+
+ type.param_class = CLASS_PER_HOST;
+ type.param_idx = tlvTypeIdx;
+ type.function = 0; // currently support only host 0 (FW should fill this field with correct func)
+ type.host = 0; // currently support only host 0 (FW should fill this field with correct host)
+ tools_open_per_host_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+void WolParams5thGen::updateTlvFromClassAttr(void* tlv)
+{
+ struct tools_open_wol* wolTlv = (struct tools_open_wol*)tlv;
+ wolTlv->en_wol_magic = _wolMagicEn;
+ return;
+}
+void WolParams5thGen::updateClassAttrFromTlv(void* tlv)
+{
+ struct tools_open_wol* wolTlv = (struct tools_open_wol*)tlv;
+ _wolMagicEn = wolTlv->en_wol_magic;
+ return;
}
+
/*
* BarSzParams Class implementation :
*/
void BarSzParams::setParam(mlxCfgParam paramType, u_int32_t val)
{
- if ((paramType == Mcp_Log_Bar_Size) ) {
+ if (paramType == Mcp_Log_Bar_Size) {
_logBarSz = val;
}
}
return true;
}
-/*
- * BarSzParams5thGen Class implementation :
- */
-bool BarSzParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param)
-{
- (void)mf;
- (void)param;
- return false;
-}
-
-int BarSzParams5thGen::getDefaultParams(mfile* mf)
-{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
-}
-
-int BarSzParams5thGen::getDefaultBarSz(mfile* mf)
-{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
-}
-
-int BarSzParams5thGen::getFromDev(mfile* mf)
-{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
-}
-
-int BarSzParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
-{
- (void)mf;
- (void)ignoreCheck;
- return MCE_NOT_IMPLEMENTED;
-}
-
-bool BarSzParams5thGen::softLimitCheck(mfile* mf)
-{
- (void)mf;
- return MCE_NOT_IMPLEMENTED;
-}
/*
* VpiParams Class implementation :
if (rc) {
return MCE_GET_DEFAULT_PARAMS;
}
- if (port_params.network_link_type) {
- _linkType = port_params.network_link_type;
+ if (port_params.default_network_link_type) {
+ _linkType = port_params.default_network_link_type;
}
return MCE_SUCCESS;
}
}
if (_sriovEn != 0 && _sriovEn != 1) {
- errmsg("Illegal SRIOV_EN parameters value. (should be 0 or 1)");
+ errmsg("Illegal SRIOV_EN parameter value. (should be 0 or 1)");
return false;
}
}
if (_fppSupported && _userSpecifiedFPP) {
if (_fppEn != 0 && _fppEn != 1) {
- errmsg("Illegal FPP_EN parameters value. (should be 0 or 1)");
+ errmsg("Illegal FPP_EN parameter value. (should be 0 or 1)");
return false;
}
}
mRc = mnvaCom5thGen(mf, tlvBuff, TOOLS_OPEN_TPT_CONFIGURATION_SIZE, getTptSettingsTlvTypeBe(), REG_ACCESS_METHOD_SET);
if (mRc) {
- return errmsg("failed to set PCI settings: %s", m_err2str(mRc));
+ return errmsg("failed to set TPT settings: %s", m_err2str(mRc));
}
_updated = false;
bool TptParams5thGen::hardLimitCheck()
{
if (_logMaxPayloadSize != 0 && _logMaxPayloadSize != 12) {
- errmsg("Illegal LOG_MAX_TPT_PAYLOAD_SIZE parameters value. (should be 0(auto) or 12(4KB))");
+ errmsg("Illegal LOG_MAX_TPT_PAYLOAD_SIZE parameter value. (should be 0(auto) or 12(4KB))");
+ return false;
+ }
+ return true;
+}
+
+/*
+ * InfinibandBootSettingsParams4thGen Class implementation:
+ */
+
+bool InfinibandBootSettingsParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param)
+{
+ (void)param;
+ struct tools_open_query_def_params_per_port portParams;
+ int rc;
+ rc = getDefaultParams4thGen(mf, _port, &portParams);
+ if (rc) {
+ return false;
+ }
+ return portParams.nv_config_infiniband_boot_settings;
+}
+
+void InfinibandBootSettingsParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ if ((paramType == Mcp_Boot_Pkey_P1 && _port == 1) || (paramType == Mcp_Boot_Pkey_P2 && _port == 2)) {
+ _bootPkey = val;
+ }
+}
+
+u_int32_t InfinibandBootSettingsParams4thGen::getParam(mlxCfgParam paramType)
+{
+ if ((paramType == Mcp_Boot_Pkey_P1 && _port == 1) || (paramType == Mcp_Boot_Pkey_P2 && _port == 2)) {
+ return _bootPkey;
+ }
+ return MLXCFG_UNKNOWN;
+}
+
+int InfinibandBootSettingsParams4thGen::getFromDev(mfile* mf)
+{
+ MError mRc;
+ u_int8_t tlvBuff[TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE] = {0};
+ struct tools_open_infiniband_boot_settings bootSettingsTlv;
+ memset(&bootSettingsTlv, 0, sizeof(bootSettingsTlv));
+
+ if (_updated) {
+ return MCE_SUCCESS;
+ }
+
+ mRc = mnvaCom4thGen(mf, &tlvBuff[0], TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_GET, _port);
+
+ if (mRc) {
+ if (mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {
+ return MCE_SUCCESS;
+ }
+ return errmsg("Failed to get Infiniband Boot Settings: %s", m_err2str(mRc));
+ }
+ // unpack and update
+ tools_open_infiniband_boot_settings_unpack(&bootSettingsTlv, &tlvBuff[0]);
+ _bootPkey = bootSettingsTlv.boot_pkey;
+ _updated = true;
+
+ return MCE_SUCCESS;
+}
+int InfinibandBootSettingsParams4thGen::setOnDev(mfile* mf, bool ignoreCheck)
+{
+ MError mRc;
+
+ if (!ignoreCheck && !checkCfg()) {
+ return MCE_BAD_PARAMS;
+ }
+ // get Tlv modify it and set it
+ u_int8_t tlvBuff[TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE] = {0};
+ struct tools_open_infiniband_boot_settings bootSettingsTlv;
+ memset(&bootSettingsTlv, 0, sizeof(bootSettingsTlv));
+
+ bootSettingsTlv.boot_pkey = _bootPkey;
+
+ // pack it
+ tools_open_infiniband_boot_settings_pack(&bootSettingsTlv, tlvBuff);
+
+ mRc = mnvaCom4thGen(mf, tlvBuff, TOOLS_OPEN_TPT_CONFIGURATION_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_SET, _port);
+
+ if (mRc) {
+ return errmsg("failed to set Infiniband Boot Settings: %s", m_err2str(mRc));
+ }
+ _updated = false;
+
+ return MCE_SUCCESS;
+}
+
+int InfinibandBootSettingsParams4thGen::getDefaultParams(mfile* mf)
+{
+ struct tools_open_query_def_params_per_port portParams;
+ int rc;
+ rc = getDefaultParams4thGen(mf, _port, &portParams);
+ if (rc == MCE_SUCCESS) {
+ _bootPkey = portParams.default_boot_pkey;
+ } else {
+ rc = MCE_GET_DEFAULT_PARAMS;
+ }
+ return rc;
+}
+
+bool InfinibandBootSettingsParams4thGen::hardLimitCheck()
+{
+ if (_bootPkey >= (1 << 16)) {
+ errmsg("Illegal BOOT_PKEY_P%d parameter value, valid values: [0..65535]", ((_port == 1) ? 1 : 2));
+ return false;
+ }
+ return true;
+}
+
+/*
+ * IBDCParams5thGen Class implementation:
+ */
+
+bool IBDCParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param)
+{
+ MError rc;
+ (void)param;
+ bool suppRead, suppWrite;
+ rc = nvqcCom5thGen(mf, getDcCapabilitiesTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get Infiniband DC capabilities parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ if (!suppRead) {
+ return false;
+ }
+
+ rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get Infiniband DC Settings parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ if (!(suppRead && suppWrite)) {
+ return false;
+ }
+ return true;
+}
+
+void IBDCParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ if (paramType == Mcp_Log_Dcr_Hash_Table_Size) {
+ _logDcrHashTableSize = val;
+ }
+ if (paramType == Mcp_Dcr_Lifo_Size) {
+ _dcrLifoSize = val;
+ }
+}
+
+u_int32_t IBDCParams5thGen::getParam(mlxCfgParam paramType)
+{
+ if (paramType == Mcp_Log_Dcr_Hash_Table_Size) {
+ return _logDcrHashTableSize;
+ }
+ if (paramType == Mcp_Dcr_Lifo_Size) {
+ return _dcrLifoSize;
+ }
+
+ return MLXCFG_UNKNOWN;
+}
+
+int IBDCParams5thGen::getFromDev(mfile* mf)
+{
+ GET_FROM_DEV_5TH_GEN(mf, tools_open_infiniband_dc_settings, "IB Dynamically Connected");
+}
+
+int IBDCParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
+{
+ SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_infiniband_dc_settings, "IB Dynamically Connected");
+}
+
+int IBDCParams5thGen::getDefaultParams(mfile* mf)
+{
+ return getDefaultsAndCapabilities(mf);
+}
+
+int IBDCParams5thGen::getDefaultsAndCapabilities(mfile* mf)
+{
+ MError rc;
+ u_int8_t tlvBuff[TOOLS_OPEN_INFINIBAND_DC_CAPABILITIES_SIZE] = {0};
+ struct tools_open_infiniband_dc_capabilities dcCapabilitesTlv;
+ memset(&dcCapabilitesTlv, 0, sizeof(dcCapabilitesTlv));
+ rc = mnvaCom5thGen(mf, &tlvBuff[0], TOOLS_OPEN_INFINIBAND_DC_CAPABILITIES_SIZE, getDcCapabilitiesTlvTypeBe(), REG_ACCESS_METHOD_GET);
+ if (rc) {
+ return errmsg("Failed to get Infiniband DC capabilities parameter. %s", m_err2str(rc));
+ }
+ tools_open_infiniband_dc_capabilities_unpack(&dcCapabilitesTlv, tlvBuff);
+ _minLogDcrHashTableSize = dcCapabilitesTlv.min_log_dcr_hash_table_size;
+ _maxLogDcrHashTableSize = dcCapabilitesTlv.max_log_dcr_hash_table_size;
+ _minDcrLifoSize = dcCapabilitesTlv.min_dcr_lifo_size;
+ _maxDcrLifoSize = dcCapabilitesTlv.max_dcr_lifo_size;
+ return MCE_SUCCESS;
+}
+
+u_int32_t IBDCParams5thGen::getTlvTypeBe()
+{
+ struct tools_open_global_type type;
+ u_int32_t tlvType = 0;
+
+ type.param_class = CLASS_GLOBAL;
+ type.param_idx = tlvTypeIdx;
+ tools_open_global_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+u_int32_t IBDCParams5thGen::getDcCapabilitiesTlvTypeBe()
+{
+ struct tools_open_global_type type;
+ u_int32_t tlvType = 0;
+
+ type.param_class = CLASS_GLOBAL;
+ type.param_idx = INFINIBAND_DC_CAPABILITIES_TYPE;
+ tools_open_global_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+bool IBDCParams5thGen::hardLimitCheck()
+{
+ if (_logDcrHashTableSize < _minLogDcrHashTableSize || _logDcrHashTableSize > _maxLogDcrHashTableSize) {
+ errmsg("Illegal LOG_DCR_HASH_TABLE_SIZE parameter value. (should be within the range [%d..%d])", _minLogDcrHashTableSize, _maxLogDcrHashTableSize);
+ return false;
+ }
+ if (_dcrLifoSize < _minDcrLifoSize || _dcrLifoSize > _maxDcrLifoSize) {
+ errmsg("Illegal DCR_LIFO_SIZE parameter value. (should be within the range [%d..%d])", _minDcrLifoSize, _maxDcrLifoSize);
+ return false;
+ }
+ return true;
+}
+
+void IBDCParams5thGen::updateTlvFromClassAttr(void* tlv)
+{
+ struct tools_open_infiniband_dc_settings* ibDcTlv = (struct tools_open_infiniband_dc_settings*)tlv;
+ ibDcTlv->dcr_lifo_size = _dcrLifoSize;
+ ibDcTlv->log_dcr_hash_table_size = _logDcrHashTableSize;
+ return;
+}
+
+void IBDCParams5thGen::updateClassAttrFromTlv(void* tlv)
+{
+ struct tools_open_infiniband_dc_settings* ibDcTlv = (struct tools_open_infiniband_dc_settings*)tlv;
+ _dcrLifoSize = ibDcTlv->dcr_lifo_size;
+ _logDcrHashTableSize = ibDcTlv->log_dcr_hash_table_size;
+ return;
+}
+
+/*
+ * PortBootStateParams5thGen Class implementation
+ */
+
+bool PortBootStateParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param)
+{
+ MError rc;
+ (void)param;
+ bool suppRead, suppWrite;
+ rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get port boot state parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ if (!suppRead || !suppWrite) {
+ return false;
+ }
+ return true;
+}
+
+void PortBootStateParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ if ((paramType == Mcp_Boot_State_P1 && _port == 1) || (paramType == Mcp_Boot_State_P2 && _port == 2)) {
+ _portBootState = val;
+ }
+ return;
+}
+
+u_int32_t PortBootStateParams5thGen::getParam(mlxCfgParam paramType)
+{
+ if ((paramType == Mcp_Boot_State_P1 && _port == 1) || (paramType == Mcp_Boot_State_P2 && _port == 2)) {
+ return _portBootState;
+ }
+ return MLXCFG_UNKNOWN;
+}
+
+int PortBootStateParams5thGen::getFromDev(mfile* mf)
+{
+ GET_FROM_DEV_5TH_GEN(mf, tools_open_port_boot_state, "Port Boot State");
+}
+
+int PortBootStateParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
+{
+ SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_port_boot_state, "Port Boot State");
+}
+
+int PortBootStateParams5thGen::getDefaultParams(mfile* mf)
+{
+ return getFromDev(mf);
+}
+
+bool PortBootStateParams5thGen::hardLimitCheck()
+{
+ if (_portBootState > 3) {
+ errmsg("Illegal BOOT_STATE_P%d parameter value (0=Normal Operation, 1=SFP power off, 2=SERDES power off, 3=Admin linkdown)", _port);
+ return false;
+ }
+ return true;
+}
+
+u_int32_t PortBootStateParams5thGen::getTlvTypeBe()
+{
+ struct tools_open_per_port_type type;
+ u_int32_t tlvType = 0;
+
+ type.param_class = CLASS_PHYS_PORT;
+ type.param_idx = tlvTypeIdx;
+ type.port = _port;
+ tools_open_per_port_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+void PortBootStateParams5thGen::updateTlvFromClassAttr(void* tlv)
+{
+ struct tools_open_port_boot_state* portBootStateTlv = (struct tools_open_port_boot_state*)tlv;
+ portBootStateTlv->port_boot_state = _portBootState;
+ return;
+}
+
+void PortBootStateParams5thGen::updateClassAttrFromTlv(void* tlv)
+{
+ struct tools_open_port_boot_state* portBootStateTlv = (struct tools_open_port_boot_state*)tlv;
+ _portBootState = portBootStateTlv->port_boot_state;
+ return;
+}
+
+/*
+ * RoCENextProtocolParams5thGen Class implementation
+ */
+
+
+bool RoCENextProtocolParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param)
+{
+ MError rc;
+ (void)param;
+ bool suppRead, suppWrite;
+ rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get RoCE next protocol parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ if (!suppRead || !suppWrite) {
+ return false;
+ }
+ return true;
+}
+
+void RoCENextProtocolParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ if ( paramType == Mcp_RoCE_Next_Protocol) {
+ _nextProtocol = val;
+ }
+ return;
+}
+
+u_int32_t RoCENextProtocolParams5thGen::getParam(mlxCfgParam paramType)
+{
+ if ( paramType == Mcp_RoCE_Next_Protocol) {
+ return _nextProtocol;
+ }
+ return MLXCFG_UNKNOWN;
+}
+
+int RoCENextProtocolParams5thGen::getFromDev(mfile* mf)
+{
+ GET_FROM_DEV_5TH_GEN(mf, tools_open_roce_v_1_5_next_protocol, "RoCE Next Protocol");
+}
+
+int RoCENextProtocolParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
+{
+ SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_roce_v_1_5_next_protocol, "RoCE Next Protocol");
+}
+
+int RoCENextProtocolParams5thGen::getDefaultParams(mfile* mf)
+{
+ return getFromDev(mf);
+}
+
+bool RoCENextProtocolParams5thGen::hardLimitCheck()
+{
+ if (_nextProtocol > 255) {
+ errmsg("Illegal ROCE_NEXT_PROTOCOL parameter value(0x%x), value should be in range [0..0xff]", _nextProtocol);
+ return false;
+ }
+ return true;
+}
+
+u_int32_t RoCENextProtocolParams5thGen::getTlvTypeBe()
+{
+ struct tools_open_global_type type;
+ u_int32_t tlvType = 0;
+
+ type.param_class = CLASS_GLOBAL;
+ type.param_idx = tlvTypeIdx;
+ tools_open_global_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+void RoCENextProtocolParams5thGen::updateTlvFromClassAttr(void* tlv)
+{
+ struct tools_open_roce_v_1_5_next_protocol* roceNpTlv = (struct tools_open_roce_v_1_5_next_protocol*)tlv;
+ roceNpTlv->roce_over_ip_next_protocol = _nextProtocol;
+ return;
+}
+
+void RoCENextProtocolParams5thGen::updateClassAttrFromTlv(void* tlv)
+{
+ struct tools_open_roce_v_1_5_next_protocol* roceNpTlv = (struct tools_open_roce_v_1_5_next_protocol*)tlv;
+ _nextProtocol = roceNpTlv->roce_over_ip_next_protocol;
+ return;
+}
+
+/*
+ * RoCECCParams5thGen Class implementation
+ */
+
+
+bool RoCECCParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param)
+{
+ MError rc;
+ (void)param;
+ bool suppRead, suppWrite;
+ rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get RoCE CC parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ if (!suppRead || !suppWrite) {
+ return false;
+ }
+ return true;
+}
+
+void RoCECCParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ if ( (paramType == Mcp_RoCE_CC_Algorithm_P1 && _port == 1) || (paramType == Mcp_RoCE_CC_Algorithm_P2 && _port == 2)) {
+ _roceCcAlgorithm = val;
+ }
+ if ( (paramType == Mcp_RoCE_CC_Prio_Mask_P1 && _port == 1) || (paramType == Mcp_RoCE_CC_Prio_Mask_P2 && _port == 2)) {
+ _roceCcPrioMask = val;
+ }
+ return;
+}
+
+u_int32_t RoCECCParams5thGen::getParam(mlxCfgParam paramType)
+{
+ if ( (paramType == Mcp_RoCE_CC_Algorithm_P1 && _port == 1) || (paramType == Mcp_RoCE_CC_Algorithm_P2 && _port == 2)) {
+ return _roceCcAlgorithm;
+ }
+ if ( (paramType == Mcp_RoCE_CC_Prio_Mask_P1 && _port == 1) || (paramType == Mcp_RoCE_CC_Prio_Mask_P2 && _port == 2)) {
+ return _roceCcPrioMask;
+ }
+ return MLXCFG_UNKNOWN;
+}
+
+int RoCECCParams5thGen::getFromDev(mfile* mf)
+{
+ GET_FROM_DEV_5TH_GEN(mf, tools_open_roce_cc, "RoCE CC");
+}
+
+int RoCECCParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
+{
+ SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_roce_cc, "RoCE CC");
+}
+int RoCECCParams5thGen::getDefaultParams(mfile* mf)
+{
+ return getFromDev(mf);
+}
+
+bool RoCECCParams5thGen::hardLimitCheck()
+{
+ if (_roceCcAlgorithm > 1) {
+ errmsg("Illegal ROCE_CC_ALGORITHM_P%d parameter value(%d), value should be 0 for ECN or 1 for QCN", _port, _roceCcAlgorithm);
+ return false;
+ }
+ if (_roceCcPrioMask > 255) {
+ errmsg("Illegal ROCE_CC_PRIO_MASK_P%d parameter value(%#x), value should be within the range [0..0xff]", _port, _roceCcPrioMask);
+ return false;
+ }
+ return true;
+}
+
+u_int32_t RoCECCParams5thGen::getTlvTypeBe()
+{
+ struct tools_open_per_port_type type;
+ u_int32_t tlvType = 0;
+ type.param_class = CLASS_PHYS_PORT;
+ type.param_idx = tlvTypeIdx;
+ type.port = _port;
+ tools_open_per_port_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+void RoCECCParams5thGen::updateTlvFromClassAttr(void* tlv)
+{
+ struct tools_open_roce_cc* roceCcTlv = (struct tools_open_roce_cc*)tlv;
+ roceCcTlv->roce_cc_algorithm = _roceCcAlgorithm;
+ roceCcTlv->roce_cc_enable_priority = _roceCcPrioMask;
+ return;
+}
+
+void RoCECCParams5thGen::updateClassAttrFromTlv(void* tlv)
+{
+ struct tools_open_roce_cc* roceCcTlv = (struct tools_open_roce_cc*)tlv;
+ _roceCcAlgorithm = roceCcTlv->roce_cc_algorithm;
+ _roceCcPrioMask = roceCcTlv->roce_cc_enable_priority;
+ return;
+}
+
+/*
+ * RoCECCEcnParams5thGen Class implementation
+ */
+
+
+bool RoCECCEcnParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param)
+{
+ MError rc;
+ (void)param;
+ bool suppRead, suppWrite;
+ rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite);
+ if (rc) {
+ errmsg("Failed to get RoCE CC ECN parameter capabilities. %s", m_err2str(rc));
+ return false;
+ }
+ if (!suppRead || !suppWrite) {
+ return false;
+ }
+ return true;
+}
+
+void RoCECCEcnParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ // TODO: adrianc move to MAP on large scale TLVs std::map<mlxCfgParam, u_int32_t> for easier access, init in constructor according to port
+ if (_port == 1) {
+ switch (paramType) {
+ case Mcp_Clamp_Tgt_Rate_P1:
+ _clampTgtRate = val;
+ break;
+ case Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1:
+ _clampTgtRateAfterTimeInc = val;
+ break;
+ case Mcp_Rpg_Time_Reset_P1:
+ _rpgTimeReset = val;
+ break;
+ case Mcp_Rpg_Byte_Reset_P1:
+ _rpgByteReset = val;
+ break;
+ case Mcp_Rpg_Threshold_P1:
+ _rpgThreshold = val;
+ break;
+ case Mcp_Rpg_Max_Rate_P1:
+ _rpgMaxRate = val;
+ break;
+ case Mcp_Rpg_Ai_Rate_P1:
+ _rpgAiRate = val;
+ break;
+ case Mcp_Rpg_Hai_Rate_P1:
+ _rpgHaiRate = val;
+ break;
+ case Mcp_Rpg_Gd_P1:
+ _rpgGd = val;
+ break;
+ case Mcp_Rpg_Min_Dec_Fac_P1:
+ _rpgMinDecFac = val;
+ break;
+ case Mcp_Rpg_Min_Rate_P1:
+ _rpgMinRate = val;
+ break;
+ case Mcp_Rate_To_Set_On_First_Cnp_P1:
+ _rateToSetOnFirstCnp = val;
+ break;
+ case Mcp_Dce_Tcp_G_P1:
+ _dceTcpG = val;
+ break;
+ case Mcp_Dce_Tcp_Rtt_P1:
+ _dceTcpRtt = val;
+ break;
+ case Mcp_Rate_Reduce_Monitor_Period_P1:
+ _rateReduceMonitorPeriod = val;
+ break;
+ case Mcp_Initial_Alpha_Value_P1:
+ _initialAlphaValue = val;
+ break;
+ case Mcp_Min_Time_Between_Cnps_P1:
+ _minTimeBetweenCnps = val;
+ break;
+ case Mcp_Cnp_Dscp_P1:
+ _cnpDscp = val;
+ break;
+ case Mcp_Cnp_802p_Prio_P1:
+ _cnp802pPrio = val;
+ break;
+ default:
+ break;
+ }
+ } else if (_port == 2) {
+ switch (paramType) {
+ case Mcp_Clamp_Tgt_Rate_P2:
+ _clampTgtRate = val;
+ break;
+ case Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2:
+ _clampTgtRateAfterTimeInc = val;
+ break;
+ case Mcp_Rpg_Time_Reset_P2:
+ _rpgTimeReset = val;
+ break;
+ case Mcp_Rpg_Byte_Reset_P2:
+ _rpgByteReset = val;
+ break;
+ case Mcp_Rpg_Threshold_P2:
+ _rpgThreshold = val;
+ break;
+ case Mcp_Rpg_Max_Rate_P2:
+ _rpgMaxRate = val;
+ break;
+ case Mcp_Rpg_Ai_Rate_P2:
+ _rpgAiRate = val;
+ break;
+ case Mcp_Rpg_Hai_Rate_P2:
+ _rpgHaiRate = val;
+ break;
+ case Mcp_Rpg_Gd_P2:
+ _rpgGd = val;
+ break;
+ case Mcp_Rpg_Min_Dec_Fac_P2:
+ _rpgMinDecFac = val;
+ break;
+ case Mcp_Rpg_Min_Rate_P2:
+ _rpgMinRate = val;
+ break;
+ case Mcp_Rate_To_Set_On_First_Cnp_P2:
+ _rateToSetOnFirstCnp = val;
+ break;
+ case Mcp_Dce_Tcp_G_P2:
+ _dceTcpG = val;
+ break;
+ case Mcp_Dce_Tcp_Rtt_P2:
+ _dceTcpRtt = val;
+ break;
+ case Mcp_Rate_Reduce_Monitor_Period_P2:
+ _rateReduceMonitorPeriod = val;
+ break;
+ case Mcp_Initial_Alpha_Value_P2:
+ _initialAlphaValue = val;
+ break;
+ case Mcp_Min_Time_Between_Cnps_P2:
+ _minTimeBetweenCnps = val;
+ break;
+ case Mcp_Cnp_Dscp_P2:
+ _cnpDscp = val;
+ break;
+ case Mcp_Cnp_802p_Prio_P2:
+ _cnp802pPrio = val;
+ break;
+ default:
+ break;
+ }
+ }
+ return;
+}
+
+u_int32_t RoCECCEcnParams5thGen::getParam(mlxCfgParam paramType)
+{
+ // adrianc: consider moving to MAP on large scale TLVs
+ if (_port == 1) {
+ switch (paramType) {
+ case Mcp_Clamp_Tgt_Rate_P1:
+ return _clampTgtRate;
+ case Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1:
+ return _clampTgtRateAfterTimeInc;
+ case Mcp_Rpg_Time_Reset_P1:
+ return _rpgTimeReset;
+ case Mcp_Rpg_Byte_Reset_P1:
+ return _rpgByteReset;
+ case Mcp_Rpg_Threshold_P1:
+ return _rpgThreshold;
+ case Mcp_Rpg_Max_Rate_P1:
+ return _rpgMaxRate;
+ case Mcp_Rpg_Ai_Rate_P1:
+ return _rpgAiRate;
+ case Mcp_Rpg_Hai_Rate_P1:
+ return _rpgHaiRate;
+ case Mcp_Rpg_Gd_P1:
+ return _rpgGd;
+ case Mcp_Rpg_Min_Dec_Fac_P1:
+ return _rpgMinDecFac;
+ case Mcp_Rpg_Min_Rate_P1:
+ return _rpgMinRate;
+ case Mcp_Rate_To_Set_On_First_Cnp_P1:
+ return _rateToSetOnFirstCnp;
+ case Mcp_Dce_Tcp_G_P1:
+ return _dceTcpG;
+ case Mcp_Dce_Tcp_Rtt_P1:
+ return _dceTcpRtt;
+ case Mcp_Rate_Reduce_Monitor_Period_P1:
+ return _rateReduceMonitorPeriod;
+ case Mcp_Initial_Alpha_Value_P1:
+ return _initialAlphaValue;
+ case Mcp_Min_Time_Between_Cnps_P1:
+ return _minTimeBetweenCnps;
+ case Mcp_Cnp_Dscp_P1:
+ return _cnpDscp;
+ case Mcp_Cnp_802p_Prio_P1:
+ return _cnp802pPrio;
+ default:
+ break;
+ }
+ } else if (_port == 2) {
+ switch (paramType) {
+ case Mcp_Clamp_Tgt_Rate_P2:
+ return _clampTgtRate;
+ case Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2:
+ return _clampTgtRateAfterTimeInc;
+ case Mcp_Rpg_Time_Reset_P2:
+ return _rpgTimeReset;
+ case Mcp_Rpg_Byte_Reset_P2:
+ return _rpgByteReset;
+ case Mcp_Rpg_Threshold_P2:
+ return _rpgThreshold;
+ case Mcp_Rpg_Max_Rate_P2:
+ return _rpgMaxRate;
+ case Mcp_Rpg_Ai_Rate_P2:
+ return _rpgAiRate;
+ case Mcp_Rpg_Hai_Rate_P2:
+ return _rpgHaiRate;
+ case Mcp_Rpg_Gd_P2:
+ return _rpgGd;
+ case Mcp_Rpg_Min_Dec_Fac_P2:
+ return _rpgMinDecFac;
+ case Mcp_Rpg_Min_Rate_P2:
+ return _rpgMinRate;
+ case Mcp_Rate_To_Set_On_First_Cnp_P2:
+ return _rateToSetOnFirstCnp;
+ case Mcp_Dce_Tcp_G_P2:
+ return _dceTcpG;
+ case Mcp_Dce_Tcp_Rtt_P2:
+ return _dceTcpRtt;
+ case Mcp_Rate_Reduce_Monitor_Period_P2:
+ return _rateReduceMonitorPeriod;
+ case Mcp_Initial_Alpha_Value_P2:
+ return _initialAlphaValue;
+ case Mcp_Min_Time_Between_Cnps_P2:
+ return _minTimeBetweenCnps;
+ case Mcp_Cnp_Dscp_P2:
+ return _cnpDscp;
+ case Mcp_Cnp_802p_Prio_P2:
+ return _cnp802pPrio;
+ default:
+ break;
+ }
+ }
+ return MLXCFG_UNKNOWN;
+}
+
+int RoCECCEcnParams5thGen::getFromDev(mfile* mf)
+{
+ GET_FROM_DEV_5TH_GEN(mf, tools_open_roce_cc_ecn, "RoCE CC ECN");
+}
+
+int RoCECCEcnParams5thGen::setOnDev(mfile* mf, bool ignoreCheck)
+{
+ SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_roce_cc_ecn, "RoCE CC ECN");
+}
+int RoCECCEcnParams5thGen::getDefaultParams(mfile* mf)
+{
+ return getFromDev(mf);
+}
+
+u_int32_t _dceTcpG;
+u_int32_t _dceTcpRtt;
+u_int32_t _rateReduceMonitorPeriod;
+u_int32_t _initialAlphaValue;
+u_int32_t _minTimeBetweenCnps;
+u_int32_t _cnpDscp;
+u_int32_t _cnp802pPrio;
+
+bool RoCECCEcnParams5thGen::hardLimitCheck()
+{
+ if (_clampTgtRate > 1) {
+ errmsg("Illegal CLAMP_TGT_RATE_P%d parameter value(%d), value should be 0 or 1", _port, _clampTgtRate);
+ return false;
+ }
+
+ if (_clampTgtRateAfterTimeInc > 1) {
+ errmsg("Illegal CLAMP_TGT_RATE_AFTER_TIME_INC_P%d parameter value(%d), value should be 0 or 1", _port, _clampTgtRateAfterTimeInc);
+ return false;
+ }
+
+ if ( _rpgTimeReset >= (1 << 16)) {
+ errmsg("Illegal RPG_TIME_RESET_P%d parameter value(%d), value should be [0..%d]", _port, _rpgTimeReset, (1 << 16) - 1);
+ return false;
+ }
+
+ if (_rpgByteReset >= (1 << 14)) {
+ errmsg("Illegal RPG_BYTE_RESET_P%d parameter value(%d), value should be [0..%d]", _port, _rpgByteReset, (1 << 14) - 1);
+ return false;
+ }
+
+ if (_rpgThreshold >= (1 << 4)) {
+ errmsg("Illegal RPG_THRESHOLD_P%d parameter value(%d), value should be [0..%d]", _port, _rpgThreshold, (1 << 4) - 1);
+ return false;
+ }
+
+ if ( _rpgAiRate >= (1 << 16)) {
+ errmsg("Illegal RPG_AI_RATE_P%d parameter value(%d), value should be [0..%d]", _port, _rpgAiRate, (1 << 16) - 1);
+ return false;
+ }
+
+ if ( _rpgHaiRate >= (1 << 16)) {
+ errmsg("Illegal RPG_HAI_RATE_P%d parameter value(%d), value should be [0..%d]", _port, _rpgHaiRate, (1 << 16) - 1);
+ return false;
+ }
+
+ if (_rpgGd > 15) {
+ errmsg("Illegal RPG_GD_P%d parameters value(%d), value should be [0..%d]", _port, _rpgGd, 15);
+ return false;
+ }
+
+ if (_rpgMinDecFac == 0 || _rpgMinDecFac > 100) {
+ errmsg("Illegal RPG_MIN_DEC_FAC_P%d parameters value(%d), value should be [1..100]", _port, _rpgMinDecFac);
+ return false;
+ }
+
+ if (_rpgMinRate >= (1 << 16)) {
+ errmsg("Illegal RPG_MIN_RATE_P%d parameters value(%d), value should be [1..%d]", _port, _rpgMinRate, (1 << 16) - 1);
+ return false;
+ }
+
+ if (_rateToSetOnFirstCnp >= (1 << 16)) {
+ errmsg("Illegal RATE_TO_SET_ON_FIRST_CNP_P%d parameters value(%d), value should be [1..%d]", _port, _rateToSetOnFirstCnp, (1 << 16) - 1);
+ return false;
+ }
+
+ if (_dceTcpG >= (1 << 9)) {
+ errmsg("Illegal DCE_TCP_G_P%d parameters value(%d), value should be [1..%d]", _port, _dceTcpG, (1 << 9) - 1);
+ return false;
+ }
+
+ if (_dceTcpRtt >= (1 << 16)) {
+ errmsg("Illegal DCE_TCP_RTT_P%d parameters value(%d), value should be [1..%d]", _port, _dceTcpRtt, (1 << 16) - 1);
+ return false;
+ }
+
+ if (_rateReduceMonitorPeriod >= (1 << 16)) {
+ errmsg("Illegal RATE_REDUCE_MONITOR_PERIOD_P%d parameters value(%d), value should be [1..%d]", _port, _rateReduceMonitorPeriod, (1 << 16) - 1);
+ return false;
+ }
+
+ if (_initialAlphaValue >= (1 << 9)) {
+ errmsg("Illegal INITIAL_ALPHA_VALUE_P%d parameters value(%d), value should be [1..%d]", _port, _initialAlphaValue, (1 << 9) - 1);
+ return false;
+ }
+
+ if (_minTimeBetweenCnps >= (1 << 16)) {
+ errmsg("Illegal MIN_TIME_BETWEEN_CNPS_P%d parameters value(%d), value should be [1..%d]", _port, _minTimeBetweenCnps, (1 << 16) - 1);
+ return false;
+ }
+
+ if (_cnpDscp > 7) {
+ errmsg("Illegal CNP_DSCP_P%d parameters value(%d), value should be [0..7]", _port, _cnpDscp);
+ return false;
+ }
+
+ if (_cnp802pPrio >= (1 << 6)) {
+ errmsg("Illegal CNP_802P_PRIO_P%d parameters value(%d), value should be [1..%d]", _port, _cnp802pPrio, (1 << 6) - 1);
+ return false;
+ }
+ return true;
+}
+
+u_int32_t RoCECCEcnParams5thGen::getTlvTypeBe()
+{
+ struct tools_open_per_port_type type;
+ u_int32_t tlvType = 0;
+ type.param_class = CLASS_PHYS_PORT;
+ type.param_idx = tlvTypeIdx;
+ type.port = _port;
+ tools_open_per_port_type_pack(&type, (u_int8_t*)&tlvType);
+ return tlvType;
+}
+
+
+void RoCECCEcnParams5thGen::updateTlvFromClassAttr(void* tlv)
+{
+ struct tools_open_roce_cc_ecn* roceCcEcnTlv = (struct tools_open_roce_cc_ecn*)tlv;
+ roceCcEcnTlv->clamp_tgt_rate = _clampTgtRate;
+ roceCcEcnTlv->clamp_tgt_rate_after_time_inc = _clampTgtRateAfterTimeInc;
+ roceCcEcnTlv->cnp_802p_prio = _cnp802pPrio;
+ roceCcEcnTlv->cnp_dscp = _cnpDscp;
+ roceCcEcnTlv->dce_tcp_g = _dceTcpG;
+ roceCcEcnTlv->dce_tcp_rtt = _dceTcpRtt;
+ roceCcEcnTlv->initial_alpha_value = _initialAlphaValue;
+ roceCcEcnTlv->min_time_between_cnps = _minTimeBetweenCnps;
+ roceCcEcnTlv->rate_reduce_monitor_period = _rateReduceMonitorPeriod;
+ roceCcEcnTlv->rate_to_set_on_first_cnp = _rateToSetOnFirstCnp;
+ roceCcEcnTlv->rpg_ai_rate = _rpgAiRate;
+ roceCcEcnTlv->rpg_byte_reset = _rpgByteReset;
+ roceCcEcnTlv->rpg_gd = _rpgGd;
+ roceCcEcnTlv->rpg_hai_rate = _rpgHaiRate;
+ roceCcEcnTlv->rpg_max_rate = _rpgMaxRate;
+ roceCcEcnTlv->rpg_min_dec_fac = _rpgMinDecFac;
+ roceCcEcnTlv->rpg_min_rate = _rpgMinRate;
+ roceCcEcnTlv->rpg_threshold = _rpgThreshold;
+ roceCcEcnTlv->rpg_time_reset = _rpgTimeReset;
+ return;
+}
+
+void RoCECCEcnParams5thGen::updateClassAttrFromTlv(void* tlv)
+{
+ struct tools_open_roce_cc_ecn* roceCcEcnTlv = (struct tools_open_roce_cc_ecn*)tlv;
+ _clampTgtRate = roceCcEcnTlv->clamp_tgt_rate;
+ _clampTgtRateAfterTimeInc = roceCcEcnTlv->clamp_tgt_rate_after_time_inc;
+ _cnp802pPrio = roceCcEcnTlv->cnp_802p_prio;
+ _cnpDscp = roceCcEcnTlv->cnp_dscp;
+ _dceTcpG = roceCcEcnTlv->dce_tcp_g;
+ _dceTcpRtt = roceCcEcnTlv->dce_tcp_rtt;
+ _initialAlphaValue = roceCcEcnTlv->initial_alpha_value;
+ _minTimeBetweenCnps = roceCcEcnTlv->min_time_between_cnps;
+ _rateReduceMonitorPeriod = roceCcEcnTlv->rate_reduce_monitor_period;
+ _rateToSetOnFirstCnp = roceCcEcnTlv->rate_to_set_on_first_cnp;
+ _rpgAiRate = roceCcEcnTlv->rpg_ai_rate;
+ _rpgByteReset = roceCcEcnTlv->rpg_byte_reset;
+ _rpgGd = roceCcEcnTlv->rpg_gd;
+ _rpgHaiRate = roceCcEcnTlv->rpg_hai_rate;
+ _rpgMaxRate = roceCcEcnTlv->rpg_max_rate;
+ _rpgMinDecFac = roceCcEcnTlv->rpg_min_dec_fac;
+ _rpgMinRate = roceCcEcnTlv->rpg_min_rate;
+ _rpgThreshold = roceCcEcnTlv->rpg_threshold;
+ _rpgTimeReset = roceCcEcnTlv->rpg_time_reset;
+ return;
+}
+
+
+/*
+ * PrebootBootSettingsParams4thGen Class implementation:
+ */
+
+bool PrebootBootSettingsParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param)
+{
+ (void)param;
+ struct tools_open_query_def_params_per_port portParams;
+ int rc;
+ rc = getDefaultParams4thGen(mf, _port, &portParams);
+ if (rc) {
+ return false;
+ }
+ return portParams.nv_config_boot_parameters;
+}
+
+void PrebootBootSettingsParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val)
+{
+ if ((paramType == Mcp_Boot_Option_Rom_En_P1 && _port == 1) || (paramType == Mcp_Boot_Option_Rom_En_P2 && _port == 2)) {
+ _bootOptionRomEn = val;
+ }
+
+ if ((paramType == Mcp_Boot_Vlan_En_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_En_P2 && _port == 2)) {
+ _bootVlanEn = val;
+ }
+
+ if ((paramType == Mcp_Boot_Retry_Cnt_P1 && _port == 1) || (paramType == Mcp_Boot_Retry_Cnt_P2 && _port == 2)) {
+ _bootRetryCnt = val;
+ }
+
+ if ((paramType == Mcp_Legacy_Boot_Protocol_P1 && _port == 1) || (paramType == Mcp_Legacy_Boot_Protocol_P2 && _port == 2)) {
+ _legacyBootProtocol = val;
+ }
+
+ if ((paramType == Mcp_Boot_Vlan_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_P2 && _port == 2)) {
+ _bootVlan = val;
+ }
+}
+
+u_int32_t PrebootBootSettingsParams4thGen::getParam(mlxCfgParam paramType)
+{
+ if ((paramType == Mcp_Boot_Option_Rom_En_P1 && _port == 1) || (paramType == Mcp_Boot_Option_Rom_En_P2 && _port == 2)) {
+ return _bootOptionRomEn;
+ }
+
+ if ((paramType == Mcp_Boot_Vlan_En_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_En_P2 && _port == 2)) {
+ return _bootVlanEn;
+ }
+
+ if ((paramType == Mcp_Boot_Retry_Cnt_P1 && _port == 1) || (paramType == Mcp_Boot_Retry_Cnt_P2 && _port == 2)) {
+ return _bootRetryCnt;
+ }
+
+ if ((paramType == Mcp_Legacy_Boot_Protocol_P1 && _port == 1) || (paramType == Mcp_Legacy_Boot_Protocol_P2 && _port == 2)) {
+ return _legacyBootProtocol;
+ }
+
+ if ((paramType == Mcp_Boot_Vlan_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_P2 && _port == 2)) {
+ return _bootVlan;
+ }
+
+ return MLXCFG_UNKNOWN;
+}
+
+int PrebootBootSettingsParams4thGen::getFromDev(mfile* mf)
+{
+ GET_FROM_DEV_4TH_GEN(mf, tools_open_preboot_boot_settings, "Preboot Boot Settings", _port);
+}
+
+int PrebootBootSettingsParams4thGen::setOnDev(mfile* mf, bool ignoreCheck)
+{
+ SET_ON_DEV_4TH_GEN(mf, ignoreCheck, tools_open_preboot_boot_settings, "Preboot Boot Settings", _port);
+}
+
+void PrebootBootSettingsParams4thGen::updateTlvFromClassAttr(void* tlv)
+{
+
+ struct tools_open_preboot_boot_settings* prebootTlv = (struct tools_open_preboot_boot_settings*)tlv;
+ prebootTlv->boot_option_rom_en = _bootOptionRomEn;
+ prebootTlv->boot_vlan_en = _bootVlanEn;
+ prebootTlv->boot_retry_count = _bootRetryCnt;
+ prebootTlv->legacy_boot_protocol = _legacyBootProtocol;
+ prebootTlv->boot_vlan = _bootVlan;
+
+}
+
+void PrebootBootSettingsParams4thGen::updateClassAttrFromTlv(void* tlv)
+{
+ struct tools_open_preboot_boot_settings* prebootTlv = (struct tools_open_preboot_boot_settings*)tlv;
+ _bootOptionRomEn = prebootTlv->boot_option_rom_en;
+ _bootVlanEn = prebootTlv->boot_vlan_en;
+ _bootRetryCnt = prebootTlv->boot_retry_count;
+ _legacyBootProtocol = prebootTlv->legacy_boot_protocol;
+ _bootVlan = prebootTlv->boot_vlan;
+}
+
+int PrebootBootSettingsParams4thGen::getDefaultParams(mfile* mf)
+{
+ struct tools_open_query_def_params_per_port portParams;
+ int rc;
+ rc = getDefaultParams4thGen(mf, _port, &portParams);
+ if (rc == MCE_SUCCESS) {
+ _bootOptionRomEn = portParams.default_boot_option_rom_en;
+ _bootVlanEn = portParams.default_boot_vlan_en;
+ _bootRetryCnt = portParams.default_boot_retry_cnt;
+ _legacyBootProtocol = portParams.default_boot_protocol;
+ _bootVlan = portParams.default_boot_vlan;
+ } else {
+ rc = MCE_GET_DEFAULT_PARAMS;
+ }
+ return rc;
+}
+
+bool PrebootBootSettingsParams4thGen::hardLimitCheck()
+{
+ if (_bootOptionRomEn > 1) {
+ errmsg("Illegal BOOT_OPTION_ROM_EN_P%d parameter value, valid values: 0 or 1", ((_port == 1) ? 1 : 2));
+ return false;
+ }
+ if (_bootVlanEn > 1) {
+ errmsg("Illegal BOOT_VLAN_EN_P%d parameter value, valid values: 0 or 1", ((_port == 1) ? 1 : 2));
+ return false;
+ }
+ if (_bootRetryCnt > 7) {
+ errmsg("Illegal BOOT_RETRY_CNT_P%d parameter value, valid values: [0..7]", ((_port == 1) ? 1 : 2));
+ return false;
+ }
+ if (_legacyBootProtocol > 3) {
+ errmsg("Illegal LEGACY_BOOT_PROTOCOL_P%d parameter value, valid values: [0..3]", ((_port == 1) ? 1 : 2));
+ return false;
+ }
+ if (_bootVlan >= (1 << 12)) {
+ errmsg("Illegal BOOT_VLAN_P%d parameter value, valid values: [0..4095]", ((_port == 1) ? 1 : 2));
return false;
}
return true;
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
- */
-/*
- * mlxcfg_param_lib.h
*
- * Created on: Mar 22, 2015
- * Author: adrianc
+ * Version: $Id$
+ *
*/
#ifndef MLXCFG_PARAM_LIB_H_
#include <vector>
#include <utility>
+#include <stdexcept>
#include <errmsg.h>
#include <tools_layouts/tools_open_layouts.h>
#define PCI_CAPABILITES_TYPE 0x81
#define TPT_SETTINGS_TYPE 0x82
#define TPT_CAPABILITES_TYPE 0x83
-
+#define PREBOOT_BOOT_SETTINGS_TYPE 0x2021
+#define INFINIBAND_BOOT_SETTINGS_TYPE 0x2022
+#define INFINIBAND_DC_SETTINGS_TYPE 0x190
+#define INFINIBAND_DC_CAPABILITIES_TYPE 0x191
+#define PORT_BOOT_STATE_TYPE 0x84
+#define ROCE_NEXT_PROTOCOL_TYPE 0x10
+#define ROCE_CC_TYPE 0x107
+#define ROCE_CC_ECN_TYPE 0x108
+#define LLDP_NB_SETTINGS_TYPE 0x10a
+#define LLDP_NB_CAPABILITIES_TYPE 0x10b
typedef enum {
+ // SRIOV
Mct_Sriov = 0,
+ // Wake on LAN (4th gen)
Mct_Wol_P1,
Mct_Wol_P2,
+ // Wake on LAN (5th gen)
+ Mct_Wol,
+ // VPI settings
Mct_Vpi_P1,
Mct_Vpi_P2,
+ // BAR size (4th gen)
Mct_Bar_Size,
+ // PCI settings (5th gen)
Mct_Pci,
+ // TPT settings (5th gen)
Mct_Tpt,
+ // IB boot settings (4th gen)
+ Mct_Boot_Settings_P1,
+ Mct_Boot_Settings_P2,
+ // IB dynamically connected (5th gen)
+ Mct_Dc,
+ // Port Boot State (5th gen)
+ Mct_Boot_State_P1,
+ Mct_Boot_State_P2,
+ // RoCE v1.5 next protocol (5th gen)
+ Mct_RoCE_Next_Protocol,
+ // RoCE congestion control (5th gen)
+ Mct_RoCE_CC_P1,
+ Mct_RoCE_CC_P2,
+ // RoCE congestion control ECN (5th gen)
+ Mct_RoCE_CC_Ecn_P1,
+ Mct_RoCE_CC_Ecn_P2,
+ // Preboot Boot Settings (4th Gen)
+ Mct_Preboot_Boot_Settings_P1,
+ Mct_Preboot_Boot_Settings_P2,
Mct_Last
} mlxCfgType;
typedef enum {
+ // PCI settings
Mcp_Sriov_En = 0,
Mcp_Num_Of_Vfs,
Mcp_Fpp_En,
+ // Wake On LAN 4th Gen Port 1
Mcp_Wol_Magic_En_P1,
+ // Wake On LAN 4th Gen Port 2
Mcp_Wol_Magic_En_P2,
+ // Wake On LAN 5th Gen
+ Mcp_Wol_Magic_En,
+ // VPI settings Port 1
Mcp_Link_Type_P1,
+ // VPI settings Port 2
Mcp_Link_Type_P2,
+ // BAR size
Mcp_Log_Bar_Size,
+ // TPT settings
Mcp_Log_Tpt_Size,
+ // Boot Pkey Port 1
+ Mcp_Boot_Pkey_P1,
+ // Boot Pkey Port 2
+ Mcp_Boot_Pkey_P2,
+ // IB Dynamically connected
+ Mcp_Log_Dcr_Hash_Table_Size,
+ Mcp_Dcr_Lifo_Size,
+ // Port Boot state Port 1
+ Mcp_Boot_State_P1,
+ // Port Boot state Port 2
+ Mcp_Boot_State_P2,
+ // RoCE v1.5 Next protocol
+ Mcp_RoCE_Next_Protocol,
+ // RoCE Congestion Control Parameters Port 1
+ Mcp_RoCE_CC_Algorithm_P1,
+ Mcp_RoCE_CC_Prio_Mask_P1,
+ // RoCE Congestion Control Parameters Port 2
+ Mcp_RoCE_CC_Algorithm_P2,
+ Mcp_RoCE_CC_Prio_Mask_P2,
+ // RoCE Congestion Control ECN Port 1
+ Mcp_Clamp_Tgt_Rate_P1,
+ Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1,
+ Mcp_Rpg_Time_Reset_P1,
+ Mcp_Rpg_Byte_Reset_P1,
+ Mcp_Rpg_Threshold_P1,
+ Mcp_Rpg_Max_Rate_P1,
+ Mcp_Rpg_Ai_Rate_P1,
+ Mcp_Rpg_Hai_Rate_P1,
+ Mcp_Rpg_Gd_P1,
+ Mcp_Rpg_Min_Dec_Fac_P1,
+ Mcp_Rpg_Min_Rate_P1,
+ Mcp_Rate_To_Set_On_First_Cnp_P1,
+ Mcp_Dce_Tcp_G_P1,
+ Mcp_Dce_Tcp_Rtt_P1,
+ Mcp_Rate_Reduce_Monitor_Period_P1,
+ Mcp_Initial_Alpha_Value_P1,
+ Mcp_Min_Time_Between_Cnps_P1,
+ Mcp_Cnp_Dscp_P1,
+ Mcp_Cnp_802p_Prio_P1,
+ // RoCE Congestion Control ECN Port 2
+ Mcp_Clamp_Tgt_Rate_P2,
+ Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2,
+ Mcp_Rpg_Time_Reset_P2,
+ Mcp_Rpg_Byte_Reset_P2,
+ Mcp_Rpg_Threshold_P2,
+ Mcp_Rpg_Max_Rate_P2,
+ Mcp_Rpg_Ai_Rate_P2,
+ Mcp_Rpg_Hai_Rate_P2,
+ Mcp_Rpg_Gd_P2,
+ Mcp_Rpg_Min_Dec_Fac_P2,
+ Mcp_Rpg_Min_Rate_P2,
+ Mcp_Rate_To_Set_On_First_Cnp_P2,
+ Mcp_Dce_Tcp_G_P2,
+ Mcp_Dce_Tcp_Rtt_P2,
+ Mcp_Rate_Reduce_Monitor_Period_P2,
+ Mcp_Initial_Alpha_Value_P2,
+ Mcp_Min_Time_Between_Cnps_P2,
+ Mcp_Cnp_Dscp_P2,
+ Mcp_Cnp_802p_Prio_P2,
+ // Preboot Boot Settings Port 1
+ Mcp_Boot_Option_Rom_En_P1,
+ Mcp_Boot_Vlan_En_P1,
+ Mcp_Boot_Retry_Cnt_P1,
+ Mcp_Legacy_Boot_Protocol_P1,
+ Mcp_Boot_Vlan_P1,
+ // Preboot Boot Settings Port 2
+ Mcp_Boot_Option_Rom_En_P2,
+ Mcp_Boot_Vlan_En_P2,
+ Mcp_Boot_Retry_Cnt_P2,
+ Mcp_Legacy_Boot_Protocol_P2,
+ Mcp_Boot_Vlan_P2,
Mcp_Last
} mlxCfgParam;
*/
/* Adrianc: add Initialize/Open pure method that will contain all needed initializations (configuration supported defaults capabilities etc...)
- * add cfgSupported(mfile* mf, mlxCfgParam param) = 0; to suppot "sub-configuraion" of a specific Parameter
*/
+
+class RawCfgParams5thGen : public ErrMsg
+{
+public:
+ RawCfgParams5thGen(){}
+ ~RawCfgParams5thGen() {}
+ int setRawData(const std::vector<u_int32_t>& tlvBuff);
+ int setOnDev(mfile* mf);
+ std::string dumpTlv();
+private:
+ int verifyTlv();
+ std::vector<u_int32_t> _tlvBuff;
+ struct tools_open_nvda _nvdaTlv;
+};
+
+
class CfgParams : public ErrMsg
{
public:
int getDefaultParams4thGen(mfile* mf, struct tools_open_query_def_params_global* global_params);
int getDefaultParams4thGen(mfile* mf, int port, struct tools_open_query_def_params_per_port* port_params);
+ virtual void updateTlvFromClassAttr(void* tlv) {(void)tlv; throw std::logic_error("Function Not Implemented");}
+ virtual void updateClassAttrFromTlv(void* tlv) {(void)tlv; throw std::logic_error("Function Not Implemented");}
+
u_int64_t _devCapVec; // relevant for 4th gen devices
bool _updated; // set true on get and false on set
bool _ignoreSoftLimits; // soft limits checks will not be performed for configuration
};
-class SriovParams5thGen : public SriovParams
-{
-public:
- SriovParams5thGen() : SriovParams() {}
- ~SriovParams5thGen() {};
-
- virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
-
- virtual int getFromDev(mfile* mf);
- virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
- virtual int getDefaultParams(mfile* mf);
-
-protected:
- virtual int updateMaxVfs(mfile* mf);
- virtual bool softLimitCheck(mfile* mf=NULL);
-};
-
/*
* WOL param classes:
*/
class WolParams : public CfgParams
{
public:
- WolParams(int port) : CfgParams(port == 1 ? Mct_Wol_P1 : Mct_Wol_P2, WOL_TYPE), _port(port), _wolMagicEn(MLXCFG_UNKNOWN) {}
- ~WolParams() {}
+ WolParams() : CfgParams(Mct_Last, WOL_TYPE), _wolMagicEn(MLXCFG_UNKNOWN) {}
+ virtual ~WolParams() {}
virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0;
- virtual void setParam(mlxCfgParam paramType, u_int32_t val);
- virtual u_int32_t getParam(mlxCfgParam paramType);
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val) = 0;
+ virtual u_int32_t getParam(mlxCfgParam paramType) = 0;
virtual int getFromDev(mfile* mf) = 0;
virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0;
protected:
virtual bool hardLimitCheck();
// Wake on magic packet (atm this is the only mode which is supported)
- int _port;
+
u_int32_t _wolMagicEn;
};
class WolParams4thGen : public WolParams
{
public:
- WolParams4thGen(int port) : WolParams(port) {}
+ WolParams4thGen(int port) : WolParams(), _port(port) {type = _port == 1 ? Mct_Wol_P1 : Mct_Wol_P2;}
~WolParams4thGen() {}
virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
virtual int getFromDev(mfile* mf);
virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
virtual int getDefaultParams(mfile* mf);
+private:
+ int _port;
};
class WolParams5thGen : public WolParams
{
public:
- WolParams5thGen(int port) : WolParams(port) {}
+ WolParams5thGen() : WolParams() {type = Mct_Wol;}
~WolParams5thGen() {}
virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
virtual int getFromDev(mfile* mf);
virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
virtual int getDefaultParams(mfile* mf);
+protected:
+ u_int32_t getTlvTypeBe();
+
+ virtual void updateTlvFromClassAttr(void* tlv);
+ virtual void updateClassAttrFromTlv(void* tlv);
};
+
/*
* VPI param classes:
*/
virtual int getDefaultBarSz(mfile* mf);
};
-class BarSzParams5thGen : public BarSzParams
-{
-public:
- BarSzParams5thGen() : BarSzParams() {}
- ~BarSzParams5thGen() {}
-
- virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
-
- virtual int getFromDev(mfile* mf);
- virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
- virtual int getDefaultParams(mfile* mf);
-protected:
- virtual bool softLimitCheck(mfile* mf=NULL);
- virtual int getDefaultBarSz(mfile* mf);
-};
/*
* PCI parameters Class (5thGen devices only)
bool _logMaxPayloadSizeSupported;
};
+/*
+ * Infiniband boot settings parameter Class (4thGen devices only)
+ */
+class InfinibandBootSettingsParams4thGen : public CfgParams
+{
+public:
+ InfinibandBootSettingsParams4thGen(int port) : CfgParams((port == 1 ? Mct_Boot_Settings_P1 : Mct_Boot_Settings_P2),
+ INFINIBAND_BOOT_SETTINGS_TYPE) , _port(port), _bootPkey(MLXCFG_UNKNOWN) {}
+ ~InfinibandBootSettingsParams4thGen() {};
+
+ virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
+ virtual int getFromDev(mfile* mf);
+ virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
+ virtual int getDefaultParams(mfile* mf);
+
+protected:
+ virtual bool hardLimitCheck();
+
+ int _port;
+ u_int32_t _bootPkey;
+
+};
+
+/*
+ * Infiniband DC (Dynamically Connected) parameters Class (5thGen devices only)
+ */
+
+class IBDCParams5thGen : public CfgParams
+{
+public:
+ IBDCParams5thGen() : CfgParams(Mct_Dc, INFINIBAND_DC_SETTINGS_TYPE) , _logDcrHashTableSize(MLXCFG_UNKNOWN), _dcrLifoSize(MLXCFG_UNKNOWN),
+ _minLogDcrHashTableSize(0), _maxLogDcrHashTableSize(0), _minDcrLifoSize(0), _maxDcrLifoSize(0){}
+ ~IBDCParams5thGen() {};
+
+ virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
+ virtual int getFromDev(mfile* mf);
+ virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
+ virtual int getDefaultParams(mfile* mf);
+
+protected:
+ virtual bool hardLimitCheck();
+ int getDefaultsAndCapabilities(mfile* mf);
+ u_int32_t getTlvTypeBe();
+ u_int32_t getDcCapabilitiesTlvTypeBe();
+
+ virtual void updateTlvFromClassAttr(void* tlv);
+ virtual void updateClassAttrFromTlv(void* tlv);
+
+ u_int32_t _logDcrHashTableSize;
+ u_int32_t _dcrLifoSize;
+
+ // defaults and capabilities
+ u_int32_t _minLogDcrHashTableSize;
+ u_int32_t _maxLogDcrHashTableSize;
+ u_int32_t _minDcrLifoSize;
+ u_int32_t _maxDcrLifoSize;
+};
+
+/*
+ * Port boot state Class (5thGen devices only)
+ */
+
+class PortBootStateParams5thGen : public CfgParams
+{
+public:
+ PortBootStateParams5thGen(int port) : CfgParams((port == 1 ? Mct_Boot_State_P1 : Mct_Boot_State_P2), PORT_BOOT_STATE_TYPE) , _portBootState(MLXCFG_UNKNOWN), _port(port) {}
+ ~PortBootStateParams5thGen() {};
+
+ virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
+ virtual int getFromDev(mfile* mf);
+ virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
+ virtual int getDefaultParams(mfile* mf);
+
+protected:
+ virtual bool hardLimitCheck();
+ u_int32_t getTlvTypeBe();
+
+ virtual void updateTlvFromClassAttr(void* tlv);
+ virtual void updateClassAttrFromTlv(void* tlv);
+
+ u_int32_t _portBootState;
+ int _port;
+};
+
+/*
+ * RoCE v1.5 next protocol Class (5thGen devices only)
+ */
+
+class RoCENextProtocolParams5thGen : public CfgParams
+{
+public:
+ RoCENextProtocolParams5thGen() : CfgParams(Mct_RoCE_Next_Protocol, ROCE_NEXT_PROTOCOL_TYPE) , _nextProtocol(MLXCFG_UNKNOWN) {}
+ ~RoCENextProtocolParams5thGen() {};
+
+ virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
+ virtual int getFromDev(mfile* mf);
+ virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
+ virtual int getDefaultParams(mfile* mf);
+
+protected:
+ virtual bool hardLimitCheck();
+ u_int32_t getTlvTypeBe();
+
+ virtual void updateTlvFromClassAttr(void* tlv);
+ virtual void updateClassAttrFromTlv(void* tlv);
+
+ u_int32_t _nextProtocol;
+};
+
+/*
+ * RoCE CC parameters Class (5thGen devices only)
+ */
+
+class RoCECCParams5thGen : public CfgParams
+{
+public:
+ RoCECCParams5thGen(int port) : CfgParams((port == 1 ? Mct_RoCE_CC_P1 : Mct_RoCE_CC_P2), ROCE_CC_TYPE),
+ _port(port), _roceCcAlgorithm(MLXCFG_UNKNOWN), _roceCcPrioMask(MLXCFG_UNKNOWN) {}
+ ~RoCECCParams5thGen() {};
+
+ virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
+ virtual int getFromDev(mfile* mf);
+ virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
+ virtual int getDefaultParams(mfile* mf);
+
+protected:
+ virtual bool hardLimitCheck();
+ u_int32_t getTlvTypeBe();
+
+ virtual void updateTlvFromClassAttr(void* tlv);
+ virtual void updateClassAttrFromTlv(void* tlv);
+
+ int _port;
+ u_int32_t _roceCcAlgorithm;
+ u_int32_t _roceCcPrioMask;
+};
+
+/*
+ * RoCE CC ECN parameters Class (5thGen devices only)
+ */
+
+class RoCECCEcnParams5thGen : public CfgParams
+{
+public:
+ RoCECCEcnParams5thGen(int port) : CfgParams((port == 1 ? Mct_RoCE_CC_Ecn_P1 : Mct_RoCE_CC_Ecn_P2), ROCE_CC_ECN_TYPE),
+ _port(port), _clampTgtRate(MLXCFG_UNKNOWN), _clampTgtRateAfterTimeInc(MLXCFG_UNKNOWN),
+ _rpgTimeReset(MLXCFG_UNKNOWN), _rpgByteReset(MLXCFG_UNKNOWN), _rpgThreshold(MLXCFG_UNKNOWN),
+ _rpgMaxRate(MLXCFG_UNKNOWN), _rpgAiRate(MLXCFG_UNKNOWN), _rpgHaiRate(MLXCFG_UNKNOWN),
+ _rpgGd(MLXCFG_UNKNOWN), _rpgMinDecFac(MLXCFG_UNKNOWN), _rpgMinRate(MLXCFG_UNKNOWN),
+ _rateToSetOnFirstCnp(MLXCFG_UNKNOWN), _dceTcpG(MLXCFG_UNKNOWN), _dceTcpRtt(MLXCFG_UNKNOWN),
+ _rateReduceMonitorPeriod(MLXCFG_UNKNOWN), _initialAlphaValue(MLXCFG_UNKNOWN),
+ _minTimeBetweenCnps(MLXCFG_UNKNOWN), _cnpDscp(MLXCFG_UNKNOWN), _cnp802pPrio(MLXCFG_UNKNOWN){};
+ ~RoCECCEcnParams5thGen() {};
+
+ virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
+ virtual int getFromDev(mfile* mf);
+ virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
+ virtual int getDefaultParams(mfile* mf);
+
+protected:
+ virtual bool hardLimitCheck();
+ u_int32_t getTlvTypeBe();
+
+ virtual void updateTlvFromClassAttr(void* tlv);
+ virtual void updateClassAttrFromTlv(void* tlv);
+
+ int _port;
+
+ u_int32_t _clampTgtRate;
+ u_int32_t _clampTgtRateAfterTimeInc;
+ u_int32_t _rpgTimeReset;
+ u_int32_t _rpgByteReset;
+ u_int32_t _rpgThreshold;
+ u_int32_t _rpgMaxRate;
+ u_int32_t _rpgAiRate;
+ u_int32_t _rpgHaiRate;
+ u_int32_t _rpgGd;
+ u_int32_t _rpgMinDecFac;
+ u_int32_t _rpgMinRate;
+ u_int32_t _rateToSetOnFirstCnp;
+ u_int32_t _dceTcpG;
+ u_int32_t _dceTcpRtt;
+ u_int32_t _rateReduceMonitorPeriod;
+ u_int32_t _initialAlphaValue;
+ u_int32_t _minTimeBetweenCnps;
+ u_int32_t _cnpDscp;
+ u_int32_t _cnp802pPrio;
+};
+
+
+/*
+ * Preboot Boot Settings Class (4thGen devices only)
+ */
+
+class PrebootBootSettingsParams4thGen : public CfgParams
+{
+public:
+ PrebootBootSettingsParams4thGen(int port) : CfgParams((port == 1 ? Mct_Preboot_Boot_Settings_P1 : Mct_Preboot_Boot_Settings_P2), PREBOOT_BOOT_SETTINGS_TYPE),
+ _bootOptionRomEn(MLXCFG_UNKNOWN), _bootVlanEn(MLXCFG_UNKNOWN), _bootRetryCnt(MLXCFG_UNKNOWN),
+ _legacyBootProtocol(MLXCFG_UNKNOWN), _bootVlan(MLXCFG_UNKNOWN), _port(port) {}
+ ~PrebootBootSettingsParams4thGen() {};
+
+ virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last);
+
+ virtual void setParam(mlxCfgParam paramType, u_int32_t val);
+ virtual u_int32_t getParam(mlxCfgParam paramType);
+
+ virtual int getFromDev(mfile* mf);
+ virtual int setOnDev(mfile* mf, bool ignoreCheck=false);
+ virtual int getDefaultParams(mfile* mf);
+
+protected:
+ virtual bool hardLimitCheck();
+
+ virtual void updateTlvFromClassAttr(void* tlv);
+ virtual void updateClassAttrFromTlv(void* tlv);
+
+ u_int32_t _bootOptionRomEn;
+ u_int32_t _bootVlanEn;
+ u_int32_t _bootRetryCnt;
+ u_int32_t _legacyBootProtocol;
+ u_int32_t _bootVlan;
+ int _port;
+};
+
#endif /* MLXCFG_PARAM_LIB_H_ */
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#include <stdlib.h>
#define IDENT " "
#define IDENT2 IDENT IDENT
#define IDENT3 "\t\t"
+#define IDENT4 IDENT2 IDENT
printf(IDENT3": %s\n", desc.c_str());
}
+static void printConfigurationHeader(string confName, string extraInfo="")
+{
+ printf(IDENT2"%s: %s\n", confName.c_str(), extraInfo.c_str());
+}
+
+static void printConfigurationParameter(string param, string extraInfo)
+{
+ printf(IDENT4"%-36s : %s\n", param.c_str(), extraInfo.c_str());
+}
+
+
+static void printConfigurationParameter(string param)
+{
+ printf(IDENT4"%-36s\n", param.c_str());
+}
+
+#ifdef MTCR_UL
+#define DEVICE_NAME "device"
+#else
+#define DEVICE_NAME "mst device"
+#endif
+
void MlxCfg::printHelp()
{
// print opening
printf(IDENT"NAME:\n"
IDENT2 MLXCFG_NAME"\n"
IDENT"SYNOPSIS:\n"
- IDENT2 MLXCFG_NAME " [-d <device> ] [-y] <s[et] <parameters to set>|q[uery]|r[eset]>\n");
+ IDENT2 MLXCFG_NAME " [-d <%s> ] [-y] <s[et] <parameters to set>|q[uery]|r[eset]>\n", DEVICE_NAME);
// print options
printf("\n");
printf(IDENT"OPTIONS:\n");
printFlagLine("d", "dev", "device", "Perform operation for a specified mst device.");
- printFlagLine("y", "yes", "", "Answer yes in prompt.");
- printFlagLine("v", "version", "", "Display version info.");
+ printFlagLine("f", "file", "conf_file", "raw configuration file.");
printFlagLine("h", "help", "", "Display help message.");
+ printFlagLine("v", "version", "", "Display version info.");
+ printFlagLine("y", "yes", "", "Answer yes in prompt.");
//print commands
printf("\n");
printf(IDENT"COMMANDS:\n");
+ printf(IDENT2"%-24s : %s\n","clear_semaphore", "clear the tool semaphore.");
printf(IDENT2"%-24s : %s\n","q[uery]", "query current supported configurations.");
+ printf(IDENT2"%-24s : %s\n","r[eset]", "reset all configurations to their default value.");
printf(IDENT2"%-24s : %s\n","s[et]", "set configurations to a specific device.");
- printf(IDENT2"%-24s : %s\n","r[eset]", "reset configurations to their default value.");
- printf(IDENT2"%-24s : %s\n","clear_semaphore", "clear the tool semaphore.");
+ printf(IDENT2"%-24s : %s\n","set_raw", "set raw configuration file.(5th generation devices only.)");
// print supported commands
printf("\n");
printf(IDENT"Supported Configurations:\n");
- printf(IDENT2"%-24s : %s\n","SRIOV", "SRIOV_EN=<1|0> NUM_OF_VFS=<NUM>");
- printf(IDENT2"%-24s : %s\n","WOL_PORT1", "WOL_MAGIC_EN_P1");
- printf(IDENT2"%-24s : %s\n","WOL_PORT2", "WOL_MAGIC_EN_P2=<1|0>");
- printf(IDENT2"%-24s : %s\n","VPI_SETTINGS_PORT1", "LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense).");
- printf(IDENT2"%-24s : %s\n","VPI_SETTINGS_PORT2", "LINK_TYPE_P2=<1|2|3>");
- printf(IDENT2"%-24s : %s\n","BAR_SIZE", "LOG_BAR_SIZE=<Base_2_log_in_mb> , example: for 8Mb bar size set LOG_BAR_SIZE=3");
- printf(IDENT2"%-24s : %s\n","FPP", "FPP_EN=<1|0>");
- printf(IDENT2"%-24s : %s\n","INTERNAL_SETTINGS", "INT_LOG_MAX_PAYLOAD_SIZE=<0|12> , 0=Auto 12=4KB Burst length.");
-
+ printf("\n");
+ printConfigurationHeader("PCI Settings");
+ printConfigurationParameter("FPP_EN=<1|0>", "enable function per port.");
+ printConfigurationParameter("LOG_BAR_SIZE=<base_2_log_in_mb>", "example: for 8Mb bar size set LOG_BAR_SIZE=3.");
+ printConfigurationParameter("NUM_OF_VFS=<NUM>", "desired amount of virtual functions.");
+ printConfigurationParameter("SRIOV_EN=<0|1>", "enable SR-IOV.");
+ printf("\n");
+ printConfigurationHeader("IB Dynamically Connect");
+ printConfigurationParameter("DCR_LIFO_SIZE=<SIZE>", "The amount of total DCRs available to join linked-lists after hash DCRs.");
+ printConfigurationParameter("LOG_DCR_HASH_TABLE_SIZE=<SIZE>", "log2 of the hash table size minus 1.");
+ printf("\n");
+ printConfigurationHeader("Infiniband Boot Settings");
+ printConfigurationParameter("BOOT_PKEY_P1=<PKEY>", "partition key to be used by PXE boot (ConnectX3, ConnectX3-Pro Only).");
+ printConfigurationParameter("BOOT_PKEY_P2=<PKEY>", "set 0 for default.");
+ printf("\n");
+ printConfigurationHeader("Internal Settings");
+ printConfigurationParameter("INT_LOG_MAX_PAYLOAD_SIZE=<0|12>", "0=Auto 12=4KB Burst length.");
+ printf("\n");
+ /*
+ printConfigurationHeader("Port Boot State", "Port power settings on boot");
+ printConfigurationParameter("BOOT_STATE_P1=<0..3>", "0=Normal operation, 1=SFP power off, 2=SERDES power off, 3=Admin linkDown");
+ printConfigurationParameter("BOOT_STATE_P2=<0..3>");
+ printf("\n");
+ */
+ printConfigurationHeader("Preboot Boot Settings", "Settings that control the legacy option ROM.");
+ printConfigurationParameter("BOOT_OPTION_ROM_EN_P1=<0|1>", "Disable/Enable boot option ROM.");
+ printConfigurationParameter("BOOT_OPTION_ROM_EN_P2=<0|1>");
+ printConfigurationParameter("BOOT_VLAN_EN_P1=<0|1>", "Disable/Enable VLAN mode for network boot.");
+ printConfigurationParameter("BOOT_VLAN_EN_P2=<0|1>");
+ printConfigurationParameter("BOOT_RETRY_CNT_P1=<0..7>", "Number of retries to attempt in case of boot failure.");
+ printConfigurationParameter("BOOT_RETRY_CNT_P2=<0..7>", "7 indicates infinite retries.");
+ printConfigurationParameter("LEGACY_BOOT_PROTOCOL_P1=<0..3>", "0=None(disable legacy boot), 1=PXE(DHCP/TFTP boot), 2=iSCSI, 3=PXE + iSCSI.");
+ printConfigurationParameter("LEGACY_BOOT_PROTOCOL_P2=<0..3>");
+ printConfigurationParameter("BOOT_VLAN_P1=<VLAN ID>", "VLAN ID for the network boot.");
+ printConfigurationParameter("BOOT_VLAN_P2=<VLAN ID>");
+ printf("\n");
+ printConfigurationHeader("RoCE Congestion Control ECN");
+ printConfigurationParameter("CLAMP_TGT_RATE_AFTER_TIME_INC_P1=<0|1>", "When receiving an CNP, the target rate should be updated if the transmission rate was increased");
+ printConfigurationParameter("CLAMP_TGT_RATE_AFTER_TIME_INC_P2=<0|1>", "due to the timer, and not only due to the byte counter. Default=1.");
+ printConfigurationParameter("CLAMP_TGT_RATE_P1=<0|1>", "If set, whenever a CNP is processed, the target rate is updated to be the current rate.");
+ printConfigurationParameter("CLAMP_TGT_RATE_P2=<0|1>", "Default=1");
+ printConfigurationParameter("CNP_DSCP_P1=<0..7>", "The DiffServ Code Point of the generated CNP for this port.");
+ printConfigurationParameter("CNP_DSCP_P2=<0..7>", "Default=0.");
+ printConfigurationParameter("CNP_802P_PRIO_P1=<NUM>", "The 802.1p priority value of the generated CNP for this port.");
+ printConfigurationParameter("CNP_802P_PRIO_P2=<NUM>", "Default=7.");
+ printConfigurationParameter("DCE_TCP_G_P1=<NUM>", "Used to update the congestion estimator (alpha) once every dce_tcp_rtt microseconds.");
+ printConfigurationParameter("DCE_TCP_G_P2=<NUM>", "Default=64.");
+ printConfigurationParameter("DCE_TCP_RTT_P1=<USEC>", "The time between updates of the alpha value, in microseconds.");
+ printConfigurationParameter("DCE_TCP_RTT_P2=<USEC>", "Default=2.");
+ printConfigurationParameter("INITIAL_ALPHA_VALUE_P1=<NUM>", "The initial value of alpha to use when receiving the first CNP for a flow.");
+ printConfigurationParameter("INITIAL_ALPHA_VALUE_P2=<NUM>", "Expressed in a fixed point fraction of 2^10.");
+ printConfigurationParameter("MIN_TIME_BETWEEN_CNPS_P1=<USEC>", "Minimum time between sending cnps from the port, in microseconds.");
+ printConfigurationParameter("MIN_TIME_BETWEEN_CNPS_P2=<USEC>", "Default=0.");
+ printConfigurationParameter("RATE_TO_SET_ON_FIRST_CNP_P1=<RATE_IN_MBIT>", "The rate that is set for the flow when a rate limiter is allocated to it upon first CNP received, in Mbps.");
+ printConfigurationParameter("RATE_TO_SET_ON_FIRST_CNP_P2=<RATE_IN_MBIT>", "Default=0.");
+ printConfigurationParameter("RATE_REDUCE_MONITOR_PERIOD_P1=<USEC>", "The minimum time between 2 consecutive rate reductions for a single flow.");
+ printConfigurationParameter("RATE_REDUCE_MONITOR_PERIOD_P2=<USEC>", "Rate reduction will occur only if a CNP is received during the relevant time interval. Default=2.");
+ printConfigurationParameter("RPG_AI_RATE_P1=<RATE_IN_MBIT>", "The rate, in Mbits per second, used to increase rpTargetRate in the RPR_ACTIVE_INCREASE state.");
+ printConfigurationParameter("RPG_AI_RATE_P2=<RATE_IN_MBIT>", "Default=10.");
+ printConfigurationParameter("RPG_BYTE_RESET_P1=<BYTE_NUM>", "Transmitted data between rate increases if no CNPs are received. Given in Bytes.");
+ printConfigurationParameter("RPG_BYTE_RESET_P2=<BYTE_NUM>", "Disabled=0, Default=150.");
+ printConfigurationParameter("RPG_GD_P1=<0..15>", "If a CNP is received, the flow rate is reduced at the beginning of the next rate_reduce_monitor_period interval to,");
+ printConfigurationParameter("RPG_GD_P2=<0..15>", "(1-Alpha/Gd)*CurrentRate. RPG_GD is given as log2(Gd), where Gd may only be powers of 2. Default=7.");
+ printConfigurationParameter("RPG_HAI_RATE_P1=<RATE_IN_MBIT>", "The rate, in Mbits per second, used to increase rpTargetRate in the RPR_HYPER_INCREASE state.");
+ printConfigurationParameter("RPG_HAI_RATE_P2=<RATE_IN_MBIT>", "Default=50.");
+ printConfigurationParameter("RPG_MAX_RATE_P1=<RATE_IN_MBIT>", "The maximum rate, in Mbits per second, at which an RP can transmit.");
+ printConfigurationParameter("RPG_MAX_RATE_P2=<RATE_IN_MBIT>", "Once this limit is reached, the RP rate limited is released and");
+ printConfigurationParameter(" ", "the flow is not rate limited any more. Default=0 (Full port speed).");
+ printConfigurationParameter("RPG_MIN_DEC_FAC_P1=<1..100>", "The minimum factor by which the current transmit rate can be changed when processing a CNP.");
+ printConfigurationParameter("RPG_MIN_DEC_FAC_P2=<1..100>", "Value is given as a percentage (1-100). Default=50.");
+ printConfigurationParameter("RPG_MIN_RATE_P1=<RATE_IN_MBIT>", "The minimum value, in Mb per second, for rate to limit.");
+ printConfigurationParameter("RPG_MIN_RATE_P2=<RATE_IN_MBIT>", "Default=2000.");
+ printConfigurationParameter("RPG_THRESHOLD_P1=<0..31>", "The number of times rpByteStage or rpTimeStage can count before the RP rate control state machine advances states.");
+ printConfigurationParameter("RPG_THRESHOLD_P2=<0..31>", "Default=5.");
+ printConfigurationParameter("RPG_TIME_RESET_P1=<USEC>", "Time between rate increases if no CNPs are received. Given in u-seconds");
+ printConfigurationParameter("RPG_TIME_RESET_P2=<USEC>", "Default=2.");
- // print usage examples
printf("\n");
+ printConfigurationHeader("RoCE Congestion Control Parameters");
+ printConfigurationParameter("ROCE_CC_ALGORITHM_P1=<0|1>", "Congestion control algorithm. 0=ECN, 1=QCN.");
+ printConfigurationParameter("ROCE_CC_ALGORITHM_P2=<0|1>");
+ printConfigurationParameter("ROCE_CC_PRIO_MASK_P1=<0..255>", "Per priority enable disable bitmask. default 0.");
+ printConfigurationParameter("ROCE_CC_PRIO_MASK_P2=<0..255>");
+ printf("\n");
+ printConfigurationHeader("RoCE V1.5 next protocol");
+ printConfigurationParameter("ROCE_NEXT_PROTOCOL=<0..255>", "The next protocol value set in the IPv4/IPv6 packets for RoCE v1.5. The default is 0xFE.");
+ printf("\n");
+ printConfigurationHeader("VPI Settings", "Control network link type");
+ printConfigurationParameter("LINK_TYPE_P1=<1|2|3>", "1=Infiniband 2=Ethernet 3=VPI(auto-sense).");
+ printConfigurationParameter("LINK_TYPE_P2=<1|2|3>");
+ printf("\n");
+ printConfigurationHeader("Wake On LAN");
+ printConfigurationParameter("WOL_MAGIC_EN=<0|1>", "5th generation devices only (per physical function).");
+ printConfigurationParameter("WOL_MAGIC_EN_P1=<0|1>", "enable wake on magic packet(per port.)");
+ printConfigurationParameter("WOL_MAGIC_EN_P2=<0|1>", "4th generation devices only.");
+ printf("\n");
+ // print usage examples
printf(IDENT"Examples:\n");
- printf(IDENT2"%-35s: %s\n", "To query current Configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" query");
- printf(IDENT2"%-35s: %s\n", "To set Configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" set SRIOV_EN=1 NUM_OF_VFS=16 WOL_MAGIC_EN_P1=1");
- printf(IDENT2"%-35s: %s\n", "To reset Configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" reset");
+ printf(IDENT2"%-35s: %s\n", "To query current configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" query");
+ printf(IDENT2"%-35s: %s\n", "To set configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" set SRIOV_EN=1 NUM_OF_VFS=16 WOL_MAGIC_EN_P1=1");
+ printf(IDENT2"%-35s: %s\n", "To set raw configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE2" -f conf_file set_raw");
+ printf(IDENT2"%-35s: %s\n", "To reset configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" reset");
printf("\n");
printf(IDENT"Supported devices:\n");
- printf(IDENT2"ConnectX3, ConnectX3-Pro (FW 2.31.5000 and above).\n");
- printf(IDENT2"ConnectIB, ConnectX4.\n");
+ printf(IDENT2"4th Generation devices: ConnectX3, ConnectX3-Pro (FW 2.31.5000 and above).\n");
+ printf(IDENT2"5th Generation devices: ConnectIB, ConnectX4, ConnectX4-LX.\n");
printf("\n");
printf(IDENT"Note: query device to view supported configurations.\n");
printf("\n");
void MlxCfg::printUsage() {
printf("\n"IDENT"Usage:\n"
- IDENT2 MLXCFG_NAME " [-d <device> ] [-y] <s[et] <parameters to set>|q[uery]|r[eset]>\n\n");
+ IDENT2 MLXCFG_NAME " [-d <%s> ] [-y] <s[et] <parameters to set>|q[uery]|r[eset]>\n\n", DEVICE_NAME);
}
bool MlxCfg::tagExsists(mlxCfgParam tag) {
break;
}
}
- // we dont support BAR_SZ atm
if (i == Mcp_Last) {
return err(true, "Unknown Parameter: %s", tag.c_str());
}
}
-static bool strToNum(string str, u_int16_t& num, int base=0)
+static bool strToNum(string str, u_int32_t& num, int base=0)
{
char *endp;
char* numStr = strcpy(new char[str.size()],str.c_str());
int i = 0;
string tag;
string valstr;
- u_int16_t val = 0;
+ u_int32_t val = 0;
for (;i < argc;i++) {
char* ptr;
// get the tag
return err(true, "Invalid Configuration argument %s", argv[i]);
}
//printf("-D- %s %s\n", tag.c_str(), valstr.c_str());
- if (!strToNum(valstr, val, 10)) {
+ if (!strToNum(valstr, val, 0)) {
return err(true, "Failed to parse %s=%s", tag.c_str(), valstr.c_str());
}
// store val in the correct place in mlxconfig Params
_mlxParams.device = argv[i];
} else if (arg == "-y" || arg == "--yes") {
_mlxParams.yes = true;
- } else if (arg == "set" || arg == "s") {
+ } else if (arg == "-f" || arg == "--file") {
+ if (++i == argc) {
+ return err(true, "missing file name");
+ }
+ _mlxParams.rawTlvFile = argv[i];
+ }else if (arg == "set" || arg == "s") {
_mlxParams.cmd = Mc_Set;
break;
} else if (arg == "clear_semaphore") {
_mlxParams.cmd = Mc_Clr_Sem;
break;
+ } else if (arg == "set_raw") {
+ _mlxParams.cmd = Mc_Set_Raw;
+ break;
// hidden flag --force used to ignore parameter checks
- } else if (arg == "--force"){
+ }else if (arg == "--force"){
_mlxParams.force = true;
} else {
return err(true, "invalid argument: %s", arg.c_str());
if (i != argc && (_mlxParams.cmd == Mc_Reset || _mlxParams.cmd == Mc_Query)) {
return err(true, "%s command expects no argument but %d argument recieved", (_mlxParams.cmd == Mc_Reset) ? "reset" : "query", argc -i);
}
- if ((_mlxParams.cmd == Mc_Set || _mlxParams.cmd == Mc_Clr_Sem) && _mlxParams.device.length() == 0) {
- return err(true, "%s command expects device to be specified.", _mlxParams.cmd == Mc_Set ? "set" : "clear_semaphore");
+ if ((_mlxParams.cmd == Mc_Set || _mlxParams.cmd == Mc_Clr_Sem || _mlxParams.cmd == Mc_Set_Raw) && _mlxParams.device.length() == 0) {
+ return err(true, "%s command expects device to be specified.", _mlxParams.cmd == Mc_Set ? "set" : _mlxParams.cmd == Mc_Set_Raw ? "set_raw" : "clear_semaphore");
+ }
+ if ((_mlxParams.cmd == Mc_Set_Raw && _mlxParams.rawTlvFile.size() == 0 )) {
+ return err(true, "set_raw command expects raw TLV file to be specified.");
+ }
+ if ((_mlxParams.cmd != Mc_Set_Raw && _mlxParams.rawTlvFile.size() != 0 )) {
+ return err(true, "raw TLV file can only be specified with set_raw command.");
}
return extractCfgArgs(argc-i, &(argv[i]));
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
- */
-/*
- * mlxcfg_status.h
*
- * Created on: Mar 23, 2015
- * Author: adrianc
+ * Version: $Id$
+ *
*/
#ifndef MLXCFG_STATUS_H_
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#include <stdlib.h>
#include <stdarg.h>
#include <signal.h>
#include <iostream>
+#include <fstream>
+#include <sstream>
#include <tools_dev_types.h>
#define MAX_ERR_STR_LEN 1024
#define MAX_BUF_SIZE 1024
#define PRE_ERR_MSG "-E-"
+#define MLNX_RAW_TLV_FILE_SIG "MLNX_RAW_TLV_FILE"
#ifdef MST_UL
#define NO_DEV_ERR "No devices found."
#define NO_DEV_ERR "No devices found, mst might be stopped. You may need to run 'mst start' to load MST modules. "
#endif
-std::string MlxCfgParams::param2str[Mcp_Last]= {"SRIOV_EN", "NUM_OF_VFS", "FPP_EN", "WOL_MAGIC_EN_P1", "WOL_MAGIC_EN_P2",\
- "LINK_TYPE_P1", "LINK_TYPE_P2", "LOG_BAR_SIZE", "INT_LOG_MAX_PAYLOAD_SIZE"};
+// TODO: adrianc: change to map<mlxCfgParam, string>
+std::string MlxCfgParams::param2str[Mcp_Last]= {"SRIOV_EN", "NUM_OF_VFS", "FPP_EN",
+ "WOL_MAGIC_EN_P1", "WOL_MAGIC_EN_P2",
+ "WOL_MAGIC_EN",
+ "LINK_TYPE_P1", "LINK_TYPE_P2",
+ "LOG_BAR_SIZE",
+ "INT_LOG_MAX_PAYLOAD_SIZE",
+ "BOOT_PKEY_P1", "BOOT_PKEY_P2",
+ "LOG_DCR_HASH_TABLE_SIZE", "DCR_LIFO_SIZE",
+ "PORT_BOOT_STATE_P1", "PORT_BOOT_STATE_P2",
+ "ROCE_NEXT_PROTOCOL",
+ "ROCE_CC_ALGORITHM_P1", "ROCE_CC_PRIO_MASK_P1", "ROCE_CC_ALGORITHM_P2", "ROCE_CC_PRIO_MASK_P2",
+ "CLAMP_TGT_RATE_P1", "CLAMP_TGT_RATE_AFTER_TIME_INC_P1", "RPG_TIME_RESET_P1",
+ "RPG_BYTE_RESET_P1", "RPG_THRESHOLD_P1", "RPG_MAX_RATE_P1", "RPG_AI_RATE_P1",
+ "RPG_HAI_RATE_P1", "RPG_GD_P1", "RPG_MIN_DEC_FAC_P1", "RPG_MIN_RATE_P1",
+ "RATE_TO_SET_ON_FIRST_CNP_P1", "DCE_TCP_G_P1", "DCE_TCP_RTT_P1",
+ "RATE_REDUCE_MONITOR_PERIOD_P1", "INITIAL_ALPHA_VALUE_P1", "MIN_TIME_BETWEEN_CNPS_P1",
+ "CNP_DSCP_P1", "CNP_802P_PRIO_P1",
+ "CLAMP_TGT_RATE_P2", "CLAMP_TGT_RATE_AFTER_TIME_INC_P2", "RPG_TIME_RESET_P2",
+ "RPG_BYTE_RESET_P2", "RPG_THRESHOLD_P2", "RPG_MAX_RATE_P2", "RPG_AI_RATE_P2",
+ "RPG_HAI_RATE_P2", "RPG_GD_P2", "RPG_MIN_DEC_FAC_P2", "RPG_MIN_RATE_P2",
+ "RATE_TO_SET_ON_FIRST_CNP_P2", "DCE_TCP_G_P2", "DCE_TCP_RTT_P2", "RATE_REDUCE_MONITOR_PERIOD_P2",
+ "INITIAL_ALPHA_VALUE_P2", "MIN_TIME_BETWEEN_CNPS_P2", "CNP_DSCP_P2", "CNP_802P_PRIO_P2",
+ "BOOT_OPTION_ROM_EN_P1", "BOOT_VLAN_EN_P1", "BOOT_RETRY_CNT_P1", "LEGACY_BOOT_PROTOCOL_P1", "BOOT_VLAN_P1",
+ "BOOT_OPTION_ROM_EN_P2", "BOOT_VLAN_EN_P2", "BOOT_RETRY_CNT_P2", "LEGACY_BOOT_PROTOCOL_P2", "BOOT_VLAN_P2",
+ };
u_int32_t MlxCfgParams::getParamVal(mlxCfgParam p)
{
char pcibuf[32]= {0};
for(int i=0 ; i < numOfDev ; i++) {
- snprintf(pcibuf,32, "%04x:%02x:%02x.%x", devPtr->pci.domain, devPtr->pci.bus,\
+#ifdef __FREEBSD__
+ const char* device_name_ptrn = "pci%d:%d:%d:%d";
+#else
+ const char* device_name_ptrn = "%04x:%02x:%02x.%x";
+#endif
+ snprintf(pcibuf,32, device_name_ptrn, devPtr->pci.domain, devPtr->pci.bus,\
devPtr->pci.dev, devPtr->pci.func);
if (queryDevCfg(devPtr->pci.conf_dev, pcibuf, i+1)){
printErr();
if (param == MLXCFG_UNKNOWN) {
printf("%-16s", "N/A");
} else {
- printf("%-16d", param);
+ printf("%-16u", param);
}
return;
}
static void printOneParam(const char* name, u_int32_t currVal, bool printNewCfg=false, u_int32_t newVal= MLXCFG_UNKNOWN)
{
- printf(" %-32s", name);
+ printf(" %-36s", name);
printParam(currVal);
if (printNewCfg) {
if (newVal == MLXCFG_UNKNOWN) {
printParam(currVal);
} else {
- printf("%-16d", newVal);
+ printf("%-16u", newVal);
}
}
printf("\n");
}
//print configuration Header
- printf("%-16s%32s","Configurations:","Current");
+ printf("%-16s%36s","Configurations:","Current");
if (printNewCfg) {
printf(" %s", "New");
}
return MLX_CFG_OK;
}
+mlxCfgStatus MlxCfg::setDevRawCfg()
+{
+ // open device
+ MlxCfgOps ops;
+ bool rc;
+ rc = ops.open(_mlxParams.device.c_str());
+ if (rc) {
+ return err(true, "Failed to set configuration on device: %s. %s", _mlxParams.device.c_str(), \
+ ops.err());
+ }
+ // open file
+ std::ifstream ifs(_mlxParams.rawTlvFile.c_str());
+ if (ifs.fail()) {
+ return err(true, "Failed to open file: %s", _mlxParams.rawTlvFile.c_str());
+ }
+ std::vector<std::vector<u_int32_t> > rawTlvsAsDw;
+ rawTlvsAsDw.resize(0);
+ // Check file Sig
+ std::string startLine;
+ std::getline(ifs, startLine);
+ if (startLine != MLNX_RAW_TLV_FILE_SIG) {
+ return err(true, "Invalid raw TLV file header.");
+ }
+ // parse the rest of the Lines
+ int lineIdx = 1;
+ for (std::string line; std::getline(ifs, line); lineIdx++) {
+ std::vector<u_int32_t> rawTlvVec;
+ if (line[0] == '%') { // comment - skip
+ continue;
+ }
+ // convert line to DW
+ if (tlvLine2DwVec(line, rawTlvVec)) {
+ return err(true, "Failed to parse Raw TLV at line %d: %s", lineIdx, _errStr.c_str());
+ }
+ rawTlvsAsDw.push_back(rawTlvVec);
+ }
+ // dump raw TLVs from the file
+ std::string dumpStr;
+ int tlvIdx = 1;
+ for (std::vector<std::vector<u_int32_t> >::iterator it = rawTlvsAsDw.begin(); it != rawTlvsAsDw.end(); it++, tlvIdx++) {
+ if (ops.dumpRawCfg(*it, dumpStr)) {
+ return err(true, "Error at Raw TLV #%d: %s", tlvIdx, ops.err());
+ }
+ printf("Raw TLV #%d Info:\n%s\n", tlvIdx, dumpStr.c_str());
+ }
+ // ask user
+ if(!askUser("Operation intended for advanced users.\n Are you sure you want to apply raw TLV file?")) {
+ printErr();
+ return MLX_CFG_ABORTED;
+ }
+ printf("Applying... ");
+ // set each of the raw TLVs
+ tlvIdx = 1;
+ for (std::vector<std::vector<u_int32_t> >::iterator it = rawTlvsAsDw.begin(); it != rawTlvsAsDw.end(); it++, tlvIdx++) {
+ if (ops.setRawCfg(*it)) {
+ printf("Failed!\n");
+ return err(true, "Failed to set Raw TLV #%d: %s", tlvIdx, ops.err());
+ }
+ }
+ // done successfully
+ printf("Done!\n");
+ printf("-I- Please reboot machine to load new configurations.\n");
+ return MLX_CFG_OK;
+}
+
+mlxCfgStatus MlxCfg::tlvLine2DwVec(const std::string& tlvStringLine, std::vector<u_int32_t>& tlvVec) {
+ tlvVec.resize(0);
+ std::string dwStr;
+ u_int32_t dw;
+ char* p = NULL;
+ std::istringstream isstm(tlvStringLine);
+ while (isstm >> dwStr) {
+ dw = strtoul(dwStr.c_str(), &p, 0);
+ if (*p) {
+ return err(false, "Input is not an unsigned number: %s", dwStr.c_str());
+ }
+ tlvVec.push_back(dw);
+ }
+ return MLX_CFG_OK;
+}
+
mlxCfgStatus MlxCfg::resetDevCfg(const char* dev)
{
MlxCfgOps ops;
case Mc_Clr_Sem:
ret = clrDevSem();
break;
+ case Mc_Set_Raw:
+ ret = setDevRawCfg();
+ break;
default:
// should not reach here.
return err(true, "invalid command.");
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#ifndef MLXCFG_UI_H_
Mc_Query,
Mc_Reset,
Mc_Clr_Sem,
+ Mc_Set_Raw,
Mc_UnknownCmd
} mlxCfgCmd;
class MlxCfgParams
{
public:
- MlxCfgParams() : device(),cmd(Mc_UnknownCmd), yes(false), force(false) {}
+ MlxCfgParams() : device(), rawTlvFile(), cmd(Mc_UnknownCmd), yes(false), force(false) {}
~MlxCfgParams() {}
std::string device;
+ std::string rawTlvFile;
mlxCfgCmd cmd;
bool yes;
std::vector<cfgInfo> params;
// reset Cmd
mlxCfgStatus resetDevsCfg();
mlxCfgStatus resetDevCfg(const char* dev);
+ // Set Raw TLV file
+ mlxCfgStatus setDevRawCfg();
+ mlxCfgStatus tlvLine2DwVec(const std::string& tlvStringLine, std::vector<u_int32_t>& tlvVec);
mlxCfgStatus clrDevSem();
//
COMMON_DIR = $(top_srcdir)/common
LAYOUTS_DIR = $(top_srcdir)/tools_layouts
UTILS_LIB = $(top_srcdir)/mft_utils
+UEFI_COMMON_DIR = $(top_srcdir)/mlxfwops/uefi_c
INCLUDES = -I$(srcdir) -I$(MTCR_INC_DIR) -I$(MFLASH_DIR) -I$(top_srcdir)/ext_libs/json -I$(MINIXZ_DIR)\
- -I$(COMMON_DIR) -I$(MFT_EXT_LIBS_INC_DIR)/zlib -I $(LAYOUTS_DIR) -I$(top_srcdir)/common -I$(UTILS_LIB)
+ -I$(COMMON_DIR) -I$(MFT_EXT_LIBS_INC_DIR)/zlib -I $(LAYOUTS_DIR) -I$(top_srcdir)/common -I$(UTILS_LIB) -I$(UEFI_COMMON_DIR)
MLXFWOPS_VERSION = 1
#endif
}
+bool ErrMsg::errmsg(const char *format, ...) {
+ va_list args;
+ char* prev_err = _err;
+ va_start(args, format);
+ _err = vprint(format, args);
+ va_end(args);
-const CommandInfo* GetCommandInfo(CommandType cmd) {
- for (u_int32_t i = 0 ; i < numbel(g_commands); i++ ) {
- if (cmd == g_commands[i].cmd) {
- return &g_commands[i];
- }
- }
+ delete[] prev_err;
- return (CommandInfo*)NULL;
+ return false;
}
-
-bool ErrMsg::errmsg(const char *format, ...) {
+bool ErrMsg::errmsg(int errorCode, const char *format, ...) {
va_list args;
char* prev_err = _err;
va_end(args);
delete[] prev_err;
-
+ _errCode = errorCode;
return false;
}
// djgpp stdio does not define vsnprintf. I simply call vsprintf (and pray ...)
#define vsnprintf(buf, len, format, args) (vsprintf(buf, format, args))
#define snprintf(buf, len, format, args...) (sprintf(buf, format, args))
- #else // Linux GCC
- #ifdef __FreeBSD__
- #define SWAPL(l) ntohl(l)
- #include <sys/endian.h>
- #define bswap_32(x) ntohl(x)
- #else // Linux
- #include <byteswap.h>
- #include <endian.h>
- #endif
- #include <netinet/in.h>
- #include <unistd.h>
-
#endif // __DJGPP__
#else // __WIN__
//
// Windows (Under DDK)
//
-
- #include <io.h>
- #include <Winsock2.h>
#include <mtcr.h>
// Sleep adaptor
#define usleep(x) Sleep((x)/1000)
#define vsnprintf _vsnprintf
#define isatty _isatty
- #define COMP_CDECL __cdecl
-
- #define __LITTLE_ENDIAN 1234
- #define __BIG_ENDIAN 4321
- #define __BYTE_ORDER __LITTLE_ENDIAN
-
-
-
- #if __BYTE_ORDER == __LITTLE_ENDIAN
- #define bswap_32(x) ntohl(x)
- #else
- #error windows is assumed to run a on little endian architecture
- #endif
-
// MINGW
#if defined(__MINGW32__) || (__MINGW64__)
- #define strtoull strtoull
#define _UNISTD_H // Zlib includes unistd.h which causes some compilation errors.
-
#else
#define strtoull _strtoui64
#endif
#include <vector>
-#include "compatibility.h"
+#include <compatibility.h>
#include "mlxfwops_com.h"
static inline void be_guid_to_cpu(guid_t* to, guid_t* from) {
#define FS_DATA_OFF 0x28
#define SWITCHX_HW_ID 581
#define SWITCH_IB_HW_ID 583
-#define SWITCH_EN_HW_ID 585
+#define SPECTRUM_HW_ID 585
#define CX4_HW_ID 521
#define CX4LX_HW_ID 523
CMD_SET_MFG_GUIDS,
CMD_BURN_VPD,
};
-enum CommandInput {
- CI_NONE = 0x01,
- CI_IMG_ONLY = 0x02,
- CI_DEV_ONLY = 0x04,
- CI_IMG_OR_DEV = 0x06,
- CI_IMG_AND_DEV = 0x08
-};
-
-
-struct CommandInfo {
- CommandType cmd;
- const char* cmdName;
- bool requireExactMatch;
- int maxArgs;
- CommandInput requiredInput;
- const char* cmdDescription;
-
-};
-
-
-////////////////////////////////////////////////////////////////////////
- //
- // Commands database and parsing methods
- //
-////////////////////////////////////////////////////////////////////////
-CommandInfo const g_commands[] = {
- { CMD_BURN , "burn" ,false , 0, CI_IMG_AND_DEV , ""},
- { CMD_BURN_BLOCK , "bb" ,true , 0, CI_IMG_AND_DEV , ""},
- { CMD_SET_GUIDS , "sg" ,true , 1, CI_IMG_OR_DEV , ""},
- { CMD_SET_MFG_GUIDS , "smg" ,true , 0, CI_IMG_ONLY , ""},
- { CMD_BURN_VPD , "set_vpd" ,true , 1, CI_IMG_ONLY , ""},
-
-
- { CMD_SET_VSD , "sv" ,true , 0, CI_IMG_OR_DEV , ""},
- { CMD_SET_KEY , "set_key" ,true , 1, CI_DEV_ONLY , ""},
- { CMD_QUERY_FORCE , "qf" ,true , 0, CI_IMG_OR_DEV , ""},
- { CMD_QUERY , "query" ,false , 1, CI_IMG_OR_DEV , ""},
- { CMD_QUERY_ROM , "qrom" ,true , 0, CI_IMG_ONLY , ""},
- { CMD_VERIFY , "verify",false , 1, CI_IMG_OR_DEV , ""},
- { CMD_READ_WORD , "rw" ,true , 1, CI_DEV_ONLY , ""},
- { CMD_READ_BLOCK , "rb" ,true , 3, CI_IMG_OR_DEV , ""},
- { CMD_WRITE_WORD , "ww" ,true , 2, CI_DEV_ONLY , ""},
- { CMD_WRITE_WORD_NE , "wwne" ,true , 2, CI_DEV_ONLY , ""},
- { CMD_WRITE_BLOCK , "wb" ,true , 2, CI_DEV_ONLY , ""},
- { CMD_WRITE_BLOCK_NE , "wbne" ,true ,-1, CI_DEV_ONLY , ""},
- { CMD_ERASE_SECT , "erase" ,false , 1, CI_DEV_ONLY , ""},
- { CMD_DUMP_CONF , "dc" ,true , 1, CI_IMG_OR_DEV , ""},
- { CMD_DUMP_HASH , "dh" ,true , 1, CI_IMG_OR_DEV , ""},
- { CMD_DUMP_JSON , "dj" ,true , 1, CI_IMG_OR_DEV , ""},
- { CMD_READ_IMAGE , "ri" ,true , 1, CI_DEV_ONLY , ""},
- { CMD_CLEAR_SEM , "clear_semaphore" ,true , 0 , CI_DEV_ONLY , ""},
- { CMD_SWRESET , "swreset" ,true , 0, CI_DEV_ONLY , ""},
- { CMD_HW_INFO , "hw" ,false , 2, CI_DEV_ONLY , ""},
- { CMD_BURN_ROM , "brom" ,true , 1, CI_DEV_ONLY , ""},
- { CMD_REMOVE_ROM , "drom" ,true , 0, CI_DEV_ONLY , ""},
- { CMD_READ_ROM , "rrom" ,true , 1, CI_DEV_ONLY , ""},
- { CMD_HW_ACCESS , "hw_access" , true , 2, CI_DEV_ONLY , ""},
- { CMD_DUMP_TRACER_HASH , "dth" ,true , 1, CI_IMG_OR_DEV , ""},
-
-
-};
struct GPH {
u_int32_t type;
char bid[BOARD_ID_BID_LEN];
};
-/*
-int const VSD_LEN = 208;
-int const PSID_LEN = 16;
-int const PRODUCT_VER_LEN = 16;
-*/
-
#define PROFILES_LIST_SECT "Profiles List section"
#define TLV_FORMAT_SECT "TLVs format section"
#define TRACER_HASH_SECT "Tracer Hash section"
void report_err(char err_buff[MAX_ERR_STR_LEN], const char *format, ...);
void report_warn(const char *format, ...);
void report_repair_msg(const char* common_msg);
-const CommandInfo* GetCommandInfo(CommandType cmd);
class MLXFWOP_API ErrMsg {
public:
- ErrMsg() : _err(0) {}
+ ErrMsg() : _err(0), _errCode(0){}
~ErrMsg() { err_clear();}
const char *err() const { return _err;}
void err_clear();
+ int getErrorCode() {return _errCode;}
protected:
#endif
;
+ bool errmsg(int errorCode, const char *format, ...)
+#ifdef __GNUC__
+ __attribute__ ((format (printf, 3, 4)))
+#endif
+ ;
+
// this is abit ugly as there are no checks on the normalFmt string
bool errmsgAdv(bool showAdv, const char *normalFmt, const char *AdvFmt, ...)
#ifdef __GNUC__
private:
char *_err;
+ int _errCode;
};
extern const char* g_sectNames[];
+#ifdef UEFI_BUILD
+// no signal handling.
+void mft_signal_set_handling(int isOn) {
+ return;
+}
+#endif
+
////////////////////////////////////////////////////////////////////////
//
// FImage Class Implementation
}
////////////////////////////////////////////////////////////////////////
-bool Flash::open(uefi_Dev_t *uefi_dev, f_fw_cmd fw_cmd_func, bool force_lock, bool advErr)
+bool Flash::open(uefi_Dev_t *uefi_dev, uefi_dev_extra_t* uefi_extra, bool force_lock, bool advErr)
{
int rc;
_advErrors = advErr;
- rc = mf_open_uefi(&_mfl, uefi_dev, fw_cmd_func);
+ rc = mf_open_uefi(&_mfl, uefi_dev, uefi_extra);
return open_com_checks("uefi", rc, force_lock);
}
}
memcpy(&buff[word_in_sector], data, cnt);
+
// no need to erase twice noerase=true
return write(sector, &buff[0], sector_size, true);
}
{
u_int32_t towrite = (u_int32_t)cnt;
u_int32_t currSize;
+ u_int32_t currAddr = addr;
+ u_int32_t alreadyWritten = 0;
+ u_int32_t sizeUntillEndOfSector = 0;
while (towrite > 0) {
- currSize = towrite > _attr.sector_size ? (_attr.sector_size) : towrite;
- if (!write_sector_with_erase(addr, data, currSize)) {
+ sizeUntillEndOfSector = _attr.sector_size - (currAddr & (_attr.sector_size - 1));
+ currSize = towrite > sizeUntillEndOfSector ? sizeUntillEndOfSector : towrite;
+ if (!write_sector_with_erase(currAddr, ((u_int8_t*)data + alreadyWritten), currSize)) {
return false;
}
towrite -= currSize;
+ currAddr += currSize;
+ alreadyWritten += currSize;
}
return true;
}
if (!strcmp(param_str, WRITE_PROTECT)) {
write_protect_info_t protect_info;
char *tb, *num_str, *sec;
-
if (!strcmp(param_val_str, WP_DISABLED_STR)) {
memset(&protect_info, 0, sizeof(protect_info));
} else {
} else {
return errmsg("Unknown attribute %s", param_name);
}
-
return true;
}
void Flash::deal_with_signal()
{
+#ifndef UEFI_BUILD
int sig;
sig = mft_signal_is_fired();
if (sig) {
raise(sig);
}
mft_signal_set_handling(0);
+#endif
return;
}
#include "flint_base.h"
#include <mflash.h>
+
+#ifndef UEFI_BUILD
#include <mft_sig_handler.h>
+#endif
// external flash attr struct
public:
Flash() :
FBase(true),
- _mfl(NULL),
+ _mfl((mflash*)NULL),
_no_flash_verify(false),
_ignore_cache_replacement(false),
_curr_sector(0xffffffff),
using FBase::open;
bool open (uefi_Dev_t *uefi_dev,
- f_fw_cmd fw_cmd_func,
+ uefi_dev_extra_t* uefi_extra,
bool force_lock = false,
bool advErr = true);
u_int32_t tagId = __be32_to_cpu(*p) >> 24;
if (offs + tagSize > byteSize) {
- return errmsg("Info section corrupted: Tag %d (TagId %d, size %d) exceeds Info section size (%d bytes) ",
+ return errmsg(MLXFW_SECTION_TOO_LARGE_ERR, "Info section corrupted: Tag %d (TagId %d, size %d) exceeds Info section size (%d bytes) ",
tagNum, tagId, tagSize, byteSize);
}
// printf("-D- tagId = (%#x), tagSize = (%#x), offs = %#x\n", tagId, tagSize, offs);
u_int32_t tmp;
const char* str;
+ int size;
switch (tagId) {
case II_FwVersion:
_fwImgInfo.ext_info.fw_ver[0] = u_int16_t(__be32_to_cpu(*(p+1)) >> 16);
_fwImgInfo.ext_info.psid[PSID_LEN] = '\0';
break;
+ case II_PSInfo:
+ str = (const char*)p;
+ str += 4;
+ size = strlen(str) + 1; // include '\0'
+ if (size > PRS_NAME_LEN ) {
+ // ensure '\0' at the end
+ size = PRS_NAME_LEN - 1;
+ }
+ memcpy(_fs2ImgInfo.ext_info.prs_name, str, size);
+ break;
+
case II_VSD:
// set psid only if not previosly found in PS
str = (const char*)p;
if (offs != byteSize) {
if (endFound) {
- return errmsg("Info section corrupted: Section data size is 0x%x bytes, "
+ return errmsg(MLXFW_SECTION_CORRUPTED_ERR, "Info section corrupted: Section data size is 0x%x bytes, "
"but end tag found after 0x%x bytes.", byteSize, offs);
} else {
- return errmsg("Info section corrupted: Section data size is 0x%x bytes, "
+ return errmsg(MLXFW_SECTION_CORRUPTED_ERR, "Info section corrupted: Section data size is 0x%x bytes, "
"but end tag not found before section end.", byteSize);
}
}
// Look for image in "physical addresses
CntxFindAllImageStart(_ioAccess, cntx_image_start, &cntx_image_num);
if (cntx_image_num == 0) {
- return errmsg("No valid image found");
+ return errmsg(MLXFW_NO_VALID_IMAGE_ERR, "No valid image found");
} else if (cntx_image_num > 2) {
// This check may be redundant - Maybe ignore if more than 2 images found
- return errmsg("More than 2 image start locations found at addresses 0x%x, 0x%x and 0x%x. Image may be corrupted.",
+ return errmsg(MLXFW_MULTIPLE_VALID_IMAGES_ERR, "More than 2 image start locations found at addresses 0x%x, 0x%x and 0x%x. Image may be corrupted.",
cntx_image_start[0],
cntx_image_start[1],
cntx_image_start[2]);
}
if (info_ptr_cs) {
- return errmsg("Failed to read Info Section - Bad checksum for Info section pointer (%08x). Probably the image is corrupted.", info_ptr);
+ return errmsg(MLXFW_BAD_CHECKSUM_ERR, "Failed to read Info Section - Bad checksum for Info section pointer (%08x). Probably the image is corrupted.", info_ptr);
}
info_ptr = info_ptr_ba.range(23,0);
info_ptr += im_start;
if (info_ptr >= _ioAccess->get_size()) {
- return errmsg("Failed to read Info Section - Info section pointer (%08x) too large. Probably the image is corrupted.", info_ptr);
+ return errmsg(MLXFW_SECTION_TOO_LARGE_ERR, "Failed to read Info Section - Info section pointer (%08x) too large. Probably the image is corrupted.", info_ptr);
}
READ4((*_ioAccess), info_ptr - 3*sizeof(u_int32_t), &info_size, "Info section size");
TOCPU1(info_size);
} else {
initSectToRead(H_LAST);
}
- if (!Fs2Verify(NULL, isStripedImage)) {
+ if (!Fs2Verify((VerifyCallBack)NULL, isStripedImage)) {
initSectToRead(H_LAST);
return false;
}
// TODO: Do we need the verify ORENK
if (!allow_nofs) {
if (!imageOps._fwImgInfo.ext_info.is_failsafe) {
- return errmsg("The given image is not a failsafe image");
+ return errmsg(MLXFW_IMAGE_NOT_FS_ERR, "The given image is not a failsafe image");
}
if (_fwImgInfo.cntxLog2ChunkSize != imageOps._fwImgInfo.cntxLog2ChunkSize) {
- return errmsg("Failsafe chunk sizes in flash (0x%x) and in image (0x%x) are not the same.",
+ return errmsg(MLXFW_FS_INFO_MISSMATCH_ERR, "Failsafe chunk sizes in flash (0x%x) and in image (0x%x) are not the same.",
1 << _fwImgInfo.cntxLog2ChunkSize,
1 << imageOps._fwImgInfo.cntxLog2ChunkSize);
}
const char *image_type = (imageOps._fwImgInfo.ext_info.is_failsafe) ? "failsafe" : "non-failsafe";
const char *note_str = (imageOps._fwImgInfo.ext_info.is_failsafe) ? " - half of total flash size" : " - total flash size";
- return errmsg("Size of %s image (0x%x) is greater than max %s image size (0x%x%s)",
+ return errmsg(MLXFW_IMAGE_TOO_LARGE_ERR, "Size of %s image (0x%x) is greater than max %s image size (0x%x%s)",
image_type, imageOps._fwImgInfo.ext_info.image_size, image_type, max_image_size, note_str);
}
// Write new signature
if (!f->write(0, data8, 16, true)) {
//return false;
- return errmsg("Flash write failed. %s", f->err());
+ return errmsg(MLXFW_FLASH_WRITE_ERR, "Flash write failed. %s", f->err());
}
bool boot_address_was_updated = true;
// Write new image start address to crspace (for SW reset)
if (cntx_image_start[i] != new_image_start) {
if (!f->write(cntx_image_start[i], &zeroes, sizeof(zeroes), true)) {
//return false;
- return errmsg("Flash write failed. %s", f->err());
+ return errmsg(MLXFW_FLASH_WRITE_ERR, "Flash write failed. %s", f->err());
}
}
}
f->set_address_convertor(imageOps._fwImgInfo.cntxLog2ChunkSize, is_curr_image_in_odd_chunks);
if (!f->write(0, &zeroes, sizeof(zeroes), true)) {
//return false;
- return errmsg("Flash write failed. %s", f->err());
+ return errmsg(MLXFW_FLASH_WRITE_ERR, "Flash write failed. %s", f->err());
}
}
}
((FImage*)(imageOps._ioAccess))->open((u_int32_t*)(&new_data[0]), actual_image_size);
- if (!imageOps.FwVerify(NULL) || !imageOps.Fs2IntQuery()) {
+ if (!imageOps.FwVerify((VerifyCallBack)NULL) || !imageOps.Fs2IntQuery()) {
return errmsg("Internal error: verify/query of image after integrating ROM failed\n");
}
bool Fs2Operations::Fs2Burn(Fs2Operations &imageOps, ExtBurnParams& burnParams)
{
if (imageOps.FwType() != FIT_FS2) {
- return errmsg("FW image type is not FS2\n");
+ return errmsg(MLXFW_IMAGE_FORMAT_ERR, "FW image type is not FS2\n");
}
if (!imageOps.Fs2IntQuery()) {
}
// Check Matching device ID
- // HACK
-#ifndef UEFI_BUILD // NO Device ID here..
-
if (!burnParams.noDevidCheck) {
if (imageOps._fs2ImgInfo.infoOffs[II_HwDevsId]) {
if (!CheckMatchingHwDevId(_ioAccess->get_dev_id(),
_ioAccess->get_rev_id(),
imageOps._fwImgInfo.supportedHwId,
imageOps._fwImgInfo.supportedHwIdNum)) {
- return errmsg("Device/Image mismatch: %s\n",this->err( ));
+ return errmsg(MLXFW_DEVICE_IMAGE_MISSMATCH_ERR, "Device/Image mismatch: %s\n",this->err( ));
}
} else if (imageOps._fs2ImgInfo.infoOffs[II_DeviceType]) {
if (!CheckMatchingDevId(_ioAccess->get_dev_id(), imageOps._fwImgInfo.ext_info.dev_type)) {
- return errmsg("Device/Image mismatch: %s\n",this->err());
+ return errmsg(MLXFW_DEVICE_IMAGE_MISSMATCH_ERR, "Device/Image mismatch: %s\n",this->err());
}
}
}
-#endif
// Check PSID
if (devIntQueryRes && !CheckPSID(imageOps, burnParams.allowPsidChange)) {
// Verify the new image and exit if it's not VALID.
if (!((Fs2Operations*)newOps)->Fs2IntQuery()) {
- return errmsg("Internal error: The prepared image After modifying the %s is corrupted: %s\n", feature_name, newOps->err());
+ return errmsg(MLXFW_IMAGE_CORRUPTED_ERR, "Internal error: The prepared image After modifying the %s is corrupted: %s\n", feature_name, newOps->err());
}
if (!is_image) {
// Modify the flash
- if (!Fs2FailSafeBurn(*((Fs2Operations*)newOps), true, NULL, callBackFunc)) {
+ if (!Fs2FailSafeBurn(*((Fs2Operations*)newOps), true, (const char*)NULL, callBackFunc)) {
return false;
}
} else {
u_int32_t new_crc_dw = CPUTO1(old_dw);
if (!((Flash*)_ioAccess)->write(IMG_CRC_OFF, &new_crc_dw, 4, true)) {
- return errmsg("flash write error (%s).", _ioAccess->err());
+ return errmsg(MLXFW_FLASH_WRITE_ERR, "flash write error (%s).", _ioAccess->err());
}
}
return true;
// Get the FW types
bx_dev = _fwImgInfo.ext_info.chip_type == CT_BRIDGEX;
SetDevFlags(_fwImgInfo.ext_info.chip_type, _fwImgInfo.ext_info.dev_type, FIT_FS2, ib_dev, eth_dev);
- guid_t* old_guids = _fwImgInfo.imageOk ? _fs2ImgInfo.ext_info.guids : NULL;
+ guid_t* old_guids = _fwImgInfo.imageOk ? _fs2ImgInfo.ext_info.guids : (guid_t*)NULL;
guid_t* used_guids;
// Patch the GUIDs and prints any needed warnings
}
int new_image_size;
if(!UpdateRomInImage((u_int8_t*)(&new_data[0]), (u_int8_t*)(&data[0]),
- NULL, 0, &new_image_size)) {
+ (u_int8_t*)NULL, 0, &new_image_size)) {
return errmsg("%s", _ioAccess->err());
}
const char* Fs2Operations::FwGetResetRecommandationStr()
{
if (!_devName) {// not an mst device
- return NULL;
+ return (const char*)NULL;
}
- return NULL;
+ return (const char*)NULL;
}
II_CONFIG_INFO = 16,
II_TLVS_FORMAT = 17,
II_TRACER_HASH = 18,
- II_ConfigArea = 19,
+ II_ConfigArea = 19,
+ II_PSInfo = 20,
II_Last, // Mark the end of used tag ids
II_End = 0xff
};
#define FS3_DFLT_GUID_NUM_TO_ALLOCATE 8
#define FS3_DFLT_GUID_STEP 1
+#define DEFAULT_GUID_NUM 0xff
+#define DEFAULT_STEP DEFAULT_GUID_NUM
+
// FW Binary version
// max supported major version
+// first time breaking compatibility remove the check if the version is not initialized
#define FS3_MAX_BIN_VER_MAJOR 1
// min supported version
_fs3ImgInfo.ext_info.guids_override_en = cib_mfg_info.guids_override_en;
_fs3ImgInfo.ext_info.orig_fs3_uids_info.valid_field = 0;
} else {
- return errmsg("Unknown MFG_INFO format version (%d.%d).", cib_mfg_info.major_version, cib_mfg_info.minor_version);
+ return errmsg(MLXFW_UNKNOWN_SECT_VER_ERR, "Unknown MFG_INFO format version (%d.%d).", cib_mfg_info.major_version, cib_mfg_info.minor_version);
}
return true;
#define FAIL_NO_OCR(str) do { \
if (_ioAccess->is_flash() && _fwParams.ignoreCacheRep == 0) {\
- return errmsg("-ocr flag must be specified for %s operation.", str);\
+ return errmsg(MLXFW_OCR_ERR, "-ocr flag must be specified for %s operation.", str);\
}\
} while (0)
GET_IMAGE_INFO_VERSION(buff, IIMajor, IIMinor);
(void)IIMinor;
if (!CHECK_IMAGE_INFO_VERSION(IIMajor)) {
- return errmsg("Unknown IMAGE_INFO format version (%d.%d).", IIMajor, IIMinor);
+ return errmsg(MLXFW_UNKNOWN_SECT_VER_ERR, "Unknown IMAGE_INFO format version (%d.%d).", IIMajor, IIMinor);
}
cibfw_image_info_unpack(&image_info, buff);
// cibfw_image_info_dump(&image_info, stdout);
_fs3ImgInfo.ext_info.fs3_uids_info.valid_field = 0;
_fwImgInfo.ext_info.vsd_sect_found = true;
} else {
- return errmsg("Unknown DEV_INFO format version (%d.%d).", cib_dev_info.major_version, cib_dev_info.minor_version);
+ return errmsg(MLXFW_UNKNOWN_SECT_VER_ERR, "Unknown DEV_INFO format version (%d.%d).", cib_dev_info.major_version, cib_dev_info.minor_version);
}
return true;
}
// Uopdate the cont address
_ioAccess->set_address_convertor(_fwImgInfo.cntxLog2ChunkSize, _fwImgInfo.imgStart != 0);
u_int32_t entry_addr = dtoc_addr + TOC_HEADER_SIZE + section_index * TOC_ENTRY_SIZE;
- READBUF((*_ioAccess), entry_addr , entry_buffer, TOC_ENTRY_SIZE, "TOC Entry");
+ READBUF((*_ioAccess), entry_addr , entry_buffer, TOC_ENTRY_SIZE, "TOC Entry");
Fs3UpdateImgCache(entry_buffer, entry_addr, TOC_ENTRY_SIZE);
cibfw_itoc_entry_unpack(&toc_entry, entry_buffer);
printf("-D- Bad ITOC CRC: toc_entry.itoc_entry_crc = %#x, actual crc: %#x, entry_size_in_bytes = %#x\n", toc_entry.itoc_entry_crc,
entry_crc, entry_size_in_bytes);
*/
- return errmsg("Bad Itoc Entry CRC. Expected: 0x%x , Actual: 0x%x", toc_entry.itoc_entry_crc, entry_crc);
+ return errmsg(MLXFW_BAD_CRC_ERR, "Bad Itoc Entry CRC. Expected: 0x%x , Actual: 0x%x", toc_entry.itoc_entry_crc, entry_crc);
}
_fs3ImgInfo.tocArr[section_index].entry_addr = entry_addr;
if (!mfg_exists) {
_badDevDataSections = true;
- return errmsg("No \""MFG_INFO"\" info section.");
+ return errmsg(MLXFW_NO_MFG_ERR, "No \""MFG_INFO"\" info section.");
}
return ret_val;
}
}
if (binVerMajor > FS3_MAX_BIN_VER_MAJOR) {
- return errmsg("Unsupported binary version (%d.%d) please update to latest MFT package", binVerMajor, binVerMinor);
+ return errmsg(MLXFW_UNSUPPORTED_BIN_VER_ERR, "Unsupported binary version (%d.%d) please update to latest MFT package", binVerMajor, binVerMinor);
}
if (binVerMajor < FS3_MIN_BIN_VER_MAJOR || (binVerMajor == FS3_MIN_BIN_VER_MAJOR && binVerMinor < FS3_MIN_BIN_VER_MINOR)) {
- return errmsg("Unsupported binary version (%d.%d) minimal supported version (%d.%d)", \
+ return errmsg(MLXFW_UNSUPPORTED_BIN_VER_ERR, "Unsupported binary version (%d.%d) minimal supported version (%d.%d)", \
binVerMajor, binVerMinor, FS3_MIN_BIN_VER_MAJOR, FS3_MIN_BIN_VER_MINOR);
}
CntxFindAllImageStart(_ioAccess, cntx_image_start, &cntx_image_num);
if (cntx_image_num == 0) {
- return errmsg("No valid FS3 image found");
+ return errmsg(MLXFW_NO_VALID_IMAGE_ERR, "No valid FS3 image found");
}
if (cntx_image_num > 1) { // ATM we support only one valid image
- return errmsg("More than one FS3 image found on %s", this->_ioAccess->is_flash() ? "Device" : "image");
+ return errmsg(MLXFW_MULTIPLE_VALID_IMAGES_ERR, "More than one FS3 image found on %s", this->_ioAccess->is_flash() ? "Device" : "image");
}
u_int32_t image_start = cntx_image_start[0];
offset = 0;
}
offset += sector_size;
}
- return errmsg("No valid ITOC was found.");
+ return errmsg(MLXFW_NO_VALID_ITOC_ERR, "No valid ITOC was found.");
}
return false;
}
// get chip type and device sw id, from device/image
- const u_int32_t* swId = NULL;
+ const u_int32_t* swId = (u_int32_t*)NULL;
if (_ioAccess->is_flash()) {
if (!getInfoFromHwDevid(_ioAccess->get_dev_id(), _fwImgInfo.ext_info.chip_type, &swId)) {
return false;
}
//adrianc: best effort to get chip_type for image on image since it can "theoretically" be used on more than one device , take the first one.
if (!_ioAccess->is_flash()) {
- const u_int32_t* swId = NULL;
+ const u_int32_t* swId = (u_int32_t*)NULL;
if (!getInfoFromHwDevid(_fwImgInfo.supportedHwId[0], _fwImgInfo.ext_info.chip_type, &swId)) {
return false;
}
// perform HACK : i.e keep itoc entry as is in the image
continue;
} else {
- return errmsg("An inconsistency was found in %s section attributes. %s ITOC attribute differs",\
+ return errmsg(MLXFW_DEVICE_IMAGE_MISSMATCH_ERR, "An inconsistency was found in %s section attributes. %s ITOC attribute differs",\
GetSectionNameByType(image_toc_entry->type), GET_DIFFER_STR(flash_toc_entry, image_toc_entry));
}
}
u_int32_t maxImgDataSize = maxImgDataSizeSlot0 < maxImgDataSizeSlot1 ? maxImgDataSizeSlot0 : maxImgDataSizeSlot1;
if (imageOps._fs3ImgInfo.sizeOfImgData > maxImgDataSize) {
- return errmsg("Size of image data (0x%x) is greater than max size of image data (0x%x)",
+ return errmsg(MLXFW_IMAGE_TOO_LARGE_ERR, "Size of image data (0x%x) is greater than max size of image data (0x%x)",
imageOps._fs3ImgInfo.sizeOfImgData, maxImgDataSize);
}
return true;
}
#define SUPPORTS_ISFU(chip_type) \
- (chip_type == CT_CONNECT_IB || chip_type == CT_CONNECTX)
+ (chip_type == CT_CONNECT_IB || chip_type == CT_CONNECTX4 || chip_type == CT_CONNECTX4_LX)
+
+#define FLASH_RESTORE(origFlashObj) \
+ if (origFlashObj) {\
+ _ioAccess->close();\
+ delete _ioAccess;\
+ _ioAccess = origFlashObj;\
+ _fwParams.ignoreCacheRep = 0;\
+ }
bool Fs3Operations::BurnFs3Image(Fs3Operations &imageOps,
ExtBurnParams& burnParams)
FImage *fim = (FImage*)(imageOps._ioAccess);
u_int8_t *data8 = (u_int8_t *) fim->getBuf();
- if (_fwImgInfo.imgStart != 0 || !burnParams.burnFailsafe) {
- // if the burn is not failsafe we also burn the image at 0x0
+ if (_fwImgInfo.imgStart != 0 || (!burnParams.burnFailsafe && ((Flash*)_ioAccess)->get_ignore_cache_replacment())) {
+ // if the burn is not failsafe and with -ocr, the image is burnt at 0x0
is_curr_image_in_odd_chunks = 1;
new_image_start = 0;
} else {
}
// sanity check on the image itoc array
if (!imageOps.CheckItocArray()) {
- return errmsg("%s", imageOps.err());
+ return errmsg(MLXFW_IMAGE_CORRUPTED_ERR, "%s", imageOps.err());
}
//find total image size that will be written
for (int i = 0; i < imageOps._fs3ImgInfo.numOfItocs; i++) {
// if we access without cache replacement or the burn was non failsafe, update YU bootloaders.
// if we access with cache replacement notify currently running fw of new image start address to crspace (for SW reset)
- //TODO: add SwitchIB, SwitchEN when we have support for ISFU
+ //TODO: add SwitchIB, Spectrum when we have support for ISFU
if (!SUPPORTS_ISFU(_fwImgInfo.ext_info.chip_type) || !burnParams.burnFailsafe || f->get_ignore_cache_replacment()) {
boot_address_was_updated = f->update_boot_addr(new_image_start);
} else {
for (u_int32_t i = 0; i < cntx_image_num; i++) {
if (cntx_image_start[i] != new_image_start) {
if (!f->write(cntx_image_start[i], &zeroes, sizeof(zeroes), true)) {
- return errmsg("Failed to invalidate old fw signature: %s", f->err());
+ return errmsg(MLXFW_FLASH_WRITE_ERR, "Failed to invalidate old fw signature: %s", f->err());
}
}
}
// invalidate previous signature
f->set_address_convertor(imageOps._fwImgInfo.cntxLog2ChunkSize, is_curr_image_in_odd_chunks);
if (!f->write(0, &zeroes, sizeof(zeroes), true)) {
- return errmsg("Failed to invalidate old fw signature: %s", f->err());
+ return errmsg(MLXFW_FLASH_WRITE_ERR, "Failed to invalidate old fw signature: %s", f->err());
}
}
}
bool Fs3Operations::Fs3Burn(Fs3Operations &imageOps, ExtBurnParams& burnParams)
{
if (imageOps.FwType() != FIT_FS3) {
- return errmsg("FW image type is not FS3\n");
+ return errmsg(MLXFW_IMAGE_FORMAT_ERR, "FW image type is not FS3\n");
}
bool devIntQueryRes = Fs3IntQuery();
return false;
}
- if (!burnParams.burnFailsafe && _ioAccess->is_flash() && !((Flash*)_ioAccess)->get_ignore_cache_replacment()) {
- return errmsg("cache replacement is active, cannot burn in a non fail-safe manner.");
+ // for image we execute full verify to bring all the information needed for ROM Patch
+ if (!imageOps.Fs3IntQuery(true, false)) {
+ return false;
}
// Check Matching device ID
-#ifndef UEFI_BUILD // NO Device ID here..
if (!burnParams.noDevidCheck && _ioAccess->is_flash()) {
if (imageOps._fwImgInfo.supportedHwIdNum) {
if (!CheckMatchingHwDevId(_ioAccess->get_dev_id(),
_ioAccess->get_rev_id(),
imageOps._fwImgInfo.supportedHwId,
imageOps._fwImgInfo.supportedHwIdNum)) {
- return errmsg("Device/Image mismatch: %s\n",this->err( ));
+ return errmsg(MLXFW_DEVICE_IMAGE_MISSMATCH_ERR, "Device/Image mismatch: %s\n",this->err( ));
}
} else { // no suppored hw ids (problem with the image ?)
- return errmsg("No supported devices were found in the FW image.");
+ return errmsg(MLXFW_DEVICE_IMAGE_MISSMATCH_ERR, "No supported devices were found in the FW image.");
}
}
-#endif
if (!burnParams.burnFailsafe) {
// some checks in case we burn in a non-failsafe manner and attempt to integrate existing device
return errmsg("Cannot integrate device data sections: device data sections are corrupted. please ignore extracting device data sections.");
}
} else { // we will take device data sections from image: make sure device is not write protected
- if (_ioAccess->is_flash() && ((Flash*)_ioAccess)->is_flash_write_protected()) {
- return errmsg("Cannot burn device data sections, Flash is write protected.");
+ if (_ioAccess->is_flash()) {
+ FBase* origFlashObj = (FBase*)NULL;
+ if (!((Flash*)_ioAccess)->get_ignore_cache_replacment()) {
+ origFlashObj = _ioAccess;
+ _fwParams.ignoreCacheRep = 1;
+ if (!FwOperations::FwAccessCreate(_fwParams, &_ioAccess)) {
+ _ioAccess = origFlashObj;
+ _fwParams.ignoreCacheRep = 0;
+ return errmsg(MLXFW_OPEN_OCR_ERR, "Failed to open device for direct flash access");
+ }
+ }
+
+ if (((Flash*)_ioAccess)->is_flash_write_protected()) {
+ FLASH_RESTORE(origFlashObj);
+ return errmsg("Cannot burn device data sections, Flash is write protected.");
+ }
+ FLASH_RESTORE(origFlashObj);
}
}
}
- // for image we execute full verify to bring all the information needed for ROM Patch
- if (!imageOps.Fs3IntQuery(true, false)) {
- return false;
- }
-
Fs3Operations *imgToBurn = &imageOps;
bool createNewImg = false;
std::vector<u_int8_t> newImageData(imageOps._fwImgInfo.lastImageAddr);
return false;
}
+ // no access to flash parameters under uefi
+#ifndef UEFI_BUILD
// TODO: adrianc: remove this in MFT-4.1.0
if(burnParams.burnFailsafe) {
if(!CheckAndFixCX4(false)) {
return false;
}
}
+#endif
if (burnParams.burnFailsafe) {
// Check image and device chunk sizes are Ok
if (_fwImgInfo.cntxLog2ChunkSize != imageOps._fwImgInfo.cntxLog2ChunkSize) {
//TODO: remove both cond before release
if (_ioAccess->get_size() < 0x1000000) {
- return errmsg("Image intended for 16MB Flash. please replace your HCA or perform rework before updating.");
+ return errmsg(MLXFW_DEVICE_IMAGE_MISSMATCH_ERR, "Image intended for 16MB Flash. please replace your HCA or perform rework before updating.");
}
// if (imageOps._fwImgInfo.cntxLog2ChunkSize == 0x16 ) {
- return errmsg("Device and Image chunk sizes differ\n"
+ return errmsg(MLXFW_FS_INFO_MISSMATCH_ERR, "Device and Image chunk sizes differ\n"
" Internal users: in order to fix, please run: mlxfwup -d %s -f %d.%04d.%04d --fix_cx4_image\n"
" External users: contact Mellanox support team.", _devName, imageOps._fwImgInfo.ext_info.fw_ver[0],
imageOps._fwImgInfo.ext_info.fw_ver[1], imageOps._fwImgInfo.ext_info.fw_ver[2]);
TOCPUn((u_int32_t*)&romSect[0], romSect.size()/4);
if (!imageOps.Fs3ReplaceSectionInDevImg(FS3_ROM_CODE, FS3_PCI_CODE, true, (u_int8_t*)&newImageData[0], imageOps._fwImgInfo.lastImageAddr,
(u_int32_t*)&romSect[0], (u_int32_t)romSect.size(), true)) {
- return errmsg("failed to update ROM in image. %s", imageOps.err());
+ return errmsg(MLXFW_ROM_UPDATE_IN_IMAGE_ERR, "failed to update ROM in image. %s", imageOps.err());
}
createNewImg = true;
}
// get image info section :
struct toc_info *imageInfoToc;
if (!imageOps.Fs3GetItocInfo(imageOps._fs3ImgInfo.tocArr, imageOps._fs3ImgInfo.numOfItocs, FS3_IMAGE_INFO, imageInfoToc)){
- return errmsg("failed to get Image Info section.");
+ return errmsg(MLXFW_GET_SECT_ERR, "failed to get Image Info section.");
}
// modify it:
std::vector<u_int8_t> imageInfoSect = imageInfoToc->section_data;
// re-insert it into the image:
if (!imageOps.Fs3ReplaceSectionInDevImg(FS3_IMAGE_INFO, FS3_FW_ADB, true, (u_int8_t*)&newImageData[0], imageOps._fwImgInfo.lastImageAddr,
(u_int32_t*)&imageInfoSect[0], (u_int32_t)imageInfoSect.size(), true)) {
- return errmsg("failed to update image VSD in image. %s", imageOps.err());
+ return errmsg(MLXFW_UPDATE_SECT_ERR, "failed to update image VSD in image. %s", imageOps.err());
}
createNewImg = true;
}
if (createNewImg) {
FwOperations* newImageOps = FwOperationsCreate((void*)&newImageData[0], (void*)&imageOps._fwImgInfo.lastImageAddr, (char*)NULL, FHT_FW_BUFF);
if (!newImageOps) {
- return errmsg("Internal error: The prepared image is corrupted.");
+ return errmsg(MLXFW_IMAGE_CORRUPTED_ERR, "Internal error: The prepared image is corrupted.");
}
// 3. verify it
if (!((Fs3Operations*)newImageOps)->Fs3IntQuery(true,false)) {
- errmsg("Internal error: The prepared image is corrupted: %s", newImageOps->err());
+ errmsg(MLXFW_IMAGE_CORRUPTED_ERR, "Internal error: The prepared image is corrupted: %s", newImageOps->err());
newImageOps->FwCleanUp();
delete newImageOps;
return false;
if (baseGuid.base_mac_specified && !CheckMac(baseGuid.base_mac)) {
return errmsg("Bad MAC (" MAC_FORMAT ") given: %s. Please specify a valid MAC value", baseGuid.base_mac.h, baseGuid.base_mac.l, err());
}
+ if (!baseGuid.use_pp_attr) {
+ baseGuid.num_of_guids_pp[0] = baseGuid.num_of_guids ? baseGuid.num_of_guids : DEFAULT_GUID_NUM;
+ baseGuid.step_size_pp[0] = baseGuid.step_size ? baseGuid.step_size : DEFAULT_STEP;
+ baseGuid.num_of_guids_pp[1] = baseGuid.num_of_guids ? baseGuid.num_of_guids : DEFAULT_GUID_NUM;
+ baseGuid.step_size_pp[1] = baseGuid.step_size ? baseGuid.step_size : DEFAULT_STEP;
+ baseGuid.use_pp_attr = 1;
+ }
FAIL_NO_OCR("set manufacture GUIDs/MACs");
if (!Fs3UpdateSection(&baseGuid, FS3_MFG_INFO, false, CMD_SET_MFG_GUIDS, callBackFunc)) {
return false;
bool Fs3Operations::FwSetMFG(guid_t baseGuid, PrintCallBack callBackFunc)
{
// in FS3 default behavior when setting GUIDs / MFG is to assign ini default step size and number.
- fs3_uid_t bGuid = {baseGuid, 1, {0, 0}, 0, 0, 0, 1};
+ fs3_uid_t bGuid = {baseGuid, 1, {0, 0}, 0, 0, 0, 1, 1, {DEFAULT_GUID_NUM, DEFAULT_STEP}, {DEFAULT_GUID_NUM, DEFAULT_STEP}};
return FwSetMFG(bGuid, callBackFunc);
}
bool Fs3Operations::FwSetGuids(sg_params_t& sgParam, PrintCallBack callBackFunc, ProgressCallBack progressFunc)
{
fs3_uid_t usrGuid;
+ memset(&usrGuid, 0, sizeof(usrGuid));
// Avoid Warning because there is no need for progressFunc
(void)progressFunc;
if (sgParam.userGuids.empty()) {
return errmsg("guids override is not set, cannot set device guids");
}
- usrGuid.num_of_guids = sgParam.numOfGUIDs ? sgParam.numOfGUIDs : 0;
- usrGuid.step_size = usrGuid.step_size ? sgParam.stepSize : 0;
+ usrGuid.num_of_guids_pp[0] = sgParam.usePPAttr ? sgParam.numOfGUIDsPP[0] : sgParam.numOfGUIDs ? sgParam.numOfGUIDs : DEFAULT_GUID_NUM;
+ usrGuid.step_size_pp[0] = sgParam.usePPAttr ? sgParam.stepSizePP[0] : sgParam.stepSize ? sgParam.stepSize : DEFAULT_STEP;
+ usrGuid.num_of_guids_pp[1] = sgParam.usePPAttr ? sgParam.numOfGUIDsPP[1] : sgParam.numOfGUIDs ? sgParam.numOfGUIDs : DEFAULT_GUID_NUM;
+ usrGuid.step_size_pp[1] = sgParam.usePPAttr ? sgParam.stepSizePP[1] : sgParam.stepSize ? sgParam.stepSize : DEFAULT_STEP;
+ usrGuid.use_pp_attr = 1;
usrGuid.base_guid_specified = false;
usrGuid.base_mac_specified = false;
bool Fs3Operations::GetModifiedSectionInfo(fs3_section_t sectionType, fs3_section_t nextSectionType, u_int32_t &newSectAddr,
fs3_section_t &SectToPut, u_int32_t &oldSectSize)
{
- struct toc_info *curr_itoc = NULL;
+ struct toc_info *curr_itoc = (struct toc_info *)NULL;
if (Fs3GetItocInfo(_fs3ImgInfo.tocArr, _fs3ImgInfo.numOfItocs, sectionType, curr_itoc) ||
Fs3GetItocInfo(_fs3ImgInfo.tocArr, _fs3ImgInfo.numOfItocs, nextSectionType, curr_itoc)) {
newSectAddr = curr_itoc->toc_entry.flash_addr << 2;
if (toAdd) {
if (isReplacement) {
- struct toc_info *curr_itoc = NULL;
+ struct toc_info *curr_itoc = (struct toc_info *)NULL;
u_int32_t sectSize;
if (!Fs3GetItocInfo(_fs3ImgInfo.tocArr, _fs3ImgInfo.numOfItocs, sectionType, curr_itoc)) {
return false;
bool Fs3Operations::Fs3RemoveSection(fs3_section_t sectionType, ProgressCallBack progressFunc)
{
- return Fs3ModifySection(sectionType, sectionType, false, NULL, 0, progressFunc);
+ return Fs3ModifySection(sectionType, sectionType, false, (u_int32_t*)NULL, 0, progressFunc);
}
*/
u_int64_t base_guid_64;
u_int64_t base_mac_64;
+ if (!base_uid.use_pp_attr) {
+ return errmsg("Expected per port attributes to be specified");
+ }
+
base_guid_64 = GUID_TO_64(base_uid.base_guid);
base_mac_64 = (((u_int64_t)base_uid.base_guid.l & 0xffffff) | (((u_int64_t)base_uid.base_guid.h & 0xffffff00) << 16));
guids.guids[0].uid = base_guid_64;
- guids.guids[0].num_allocated = base_uid.num_of_guids ? base_uid.num_of_guids : guids.guids[0].num_allocated;
- guids.guids[0].step = base_uid.step_size ? base_uid.step_size : guids.guids[0].step;
+ guids.guids[0].num_allocated = base_uid.num_of_guids_pp[0] != DEFAULT_GUID_NUM ? base_uid.num_of_guids_pp[0] : guids.guids[0].num_allocated;
+ guids.guids[0].step = base_uid.step_size_pp[0] != DEFAULT_STEP ? base_uid.step_size_pp[0] : guids.guids[0].step;
guids.guids[1].uid = base_guid_64 + (guids.guids[0].num_allocated * guids.guids[0].step);
- guids.guids[1].num_allocated = base_uid.num_of_guids ? base_uid.num_of_guids : guids.guids[1].num_allocated;
- guids.guids[1].step = base_uid.step_size ? base_uid.step_size : guids.guids[1].step;
+ guids.guids[1].num_allocated = base_uid.num_of_guids_pp[1] != DEFAULT_GUID_NUM ? base_uid.num_of_guids_pp[1] : guids.guids[1].num_allocated;
+ guids.guids[1].step = base_uid.step_size_pp[1] != DEFAULT_STEP ? base_uid.step_size_pp[1] : guids.guids[1].step;
guids.macs[0].uid = base_mac_64;
- guids.macs[0].num_allocated = base_uid.num_of_guids ? base_uid.num_of_guids : guids.macs[0].num_allocated;
- guids.macs[0].step = base_uid.step_size ? base_uid.step_size : guids.macs[0].step;
+ guids.macs[0].num_allocated = base_uid.num_of_guids_pp[0] != DEFAULT_GUID_NUM ? base_uid.num_of_guids_pp[0] : guids.macs[0].num_allocated;
+ guids.macs[0].step = base_uid.step_size_pp[0] != DEFAULT_STEP ? base_uid.step_size_pp[0] : guids.macs[0].step;
guids.macs[1].uid = base_mac_64 + (guids.macs[0].num_allocated * guids.macs[0].step);
- guids.macs[1].num_allocated = base_uid.num_of_guids ? base_uid.num_of_guids : guids.macs[1].num_allocated;
- guids.macs[1].step = base_uid.step_size ? base_uid.step_size : guids.macs[1].step;
+ guids.macs[1].num_allocated = base_uid.num_of_guids_pp[1] != DEFAULT_GUID_NUM ? base_uid.num_of_guids_pp[1] : guids.macs[1].num_allocated;
+ guids.macs[1].step = base_uid.step_size_pp[1] != DEFAULT_STEP ? base_uid.step_size_pp[1] : guids.macs[1].step;
return true;
}
*/
u_int64_t base_guid_64;
u_int64_t base_mac_64;
+ if (!base_uid.use_pp_attr) {
+ return errmsg("Expected per port attributes to be specified");
+ }
base_guid_64 = base_uid.base_guid_specified ? GUID_TO_64(base_uid.base_guid) : guids.guids.uid;
base_mac_64 = base_uid.base_mac_specified ? GUID_TO_64(base_uid.base_mac) : guids.macs.uid;
}
guids.guids.uid = base_guid_64;
- guids.guids.num_allocated = base_uid.num_of_guids ? base_uid.num_of_guids : guids.guids.num_allocated;
- guids.guids.step = base_uid.step_size ? base_uid.step_size : guids.guids.step;
+ guids.guids.num_allocated = base_uid.num_of_guids_pp[0] != DEFAULT_GUID_NUM ? base_uid.num_of_guids_pp[0] : guids.guids.num_allocated;
+ guids.guids.step = base_uid.step_size_pp[0] != DEFAULT_STEP ? base_uid.step_size_pp[0] : guids.guids.step;
guids.macs.uid = base_mac_64;
- guids.macs.num_allocated = base_uid.num_of_guids ? base_uid.num_of_guids : guids.macs.num_allocated;
- guids.macs.step = base_uid.step_size ? base_uid.step_size : guids.macs.step ;
+ guids.macs.num_allocated = base_uid.num_of_guids_pp[0] != DEFAULT_GUID_NUM ? base_uid.num_of_guids_pp[0] : guids.macs.num_allocated;
+ guids.macs.step = base_uid.step_size_pp[0] != DEFAULT_STEP ? base_uid.step_size_pp[0] : guids.macs.step ;
return true;
}
std::vector<u_int8_t> &newSectionData)
{
int vpd_size = 0;
- u_int8_t *vpd_data = NULL;
+ u_int8_t *vpd_data = (u_int8_t*)NULL;
if (!ReadImageFile(vpd, vpd_data, vpd_size)) {
return false;
//get the last fw section address (i.e the maximal address + size of the fw section)
bool Fs3Operations::getLastFwSAddr(u_int32_t& lastAddr) {
- struct toc_info *maxToc= NULL;
+ struct toc_info *maxToc= (struct toc_info*)NULL;
int i;
// find first itoc that isnt device data (assumption: there is at least one)
for(i=0 ; i < _fs3ImgInfo.numOfItocs ; i++) {
}
bool Fs3Operations::getFirstDevDataAddr(u_int32_t& firstAddr) {
- struct toc_info *minToc = NULL;
+ struct toc_info *minToc = (struct toc_info*)NULL;
//find first dev data itoc entry
int i;
for(i=0 ; i < _fs3ImgInfo.numOfItocs ; i++) {
}
// check if we already shifted
- struct toc_info* mfgToc = NULL;
+ struct toc_info* mfgToc = (struct toc_info*)NULL;
if (!Fs3GetItocInfo(_fs3ImgInfo.tocArr, _fs3ImgInfo.numOfItocs, FS3_MFG_INFO, mfgToc)) {
return errmsg("Failed to get MFG_INFO ITOC information.");
}
#endif
if (!_isfuSupported) {
- return NULL;
+ return (const char*)NULL;
}
return "To load new FW run mlxfwreset or reboot machine.";
}
bool Fs3Operations::Fs3IsfuActivateImage(u_int32_t newImageStart)
{
int rc = 0;
- mfile *mf = NULL;
+ mfile *mf = (mfile*)NULL;
struct cibfw_register_mfai mfai;
struct cibfw_register_mfrl mfrl;
memset(&mfai, 0, sizeof(mfai));
#define IS_EMPTY_CX4_MFG_UIDS(fs3_uids_info) \
(((fs3_uids_info).cx4_uids.base_guid.uid == 0x0ULL) && ((fs3_uids_info).cx4_uids.base_mac.uid == 0x0ULL))
-#define FLASH_RESTORE(origFlashObj) \
- if (origFlashObj) {\
- _ioAccess->close();\
- delete _ioAccess;\
- _ioAccess = origFlashObj;\
- _fwParams.ignoreCacheRep = 0;\
- }
+
#define GET_UID_LOW(uid) \
((uid) & 0xffffffffULL)
bool Fs3Operations::CheckAndFixCX4(bool justCheck)
{
// assuming query/verify was ran before and this is being called on an MST device during burn
- FBase* origFlashObj = NULL;
+ FBase* origFlashObj = (FBase*)NULL;
if (!_ioAccess->is_flash()) {
return true;
baseUid.base_guid_specified = 1;
baseUid.base_mac_specified = 1;
baseUid.set_mac_from_guid = 0;
- baseUid.num_of_guids = 0;
- baseUid.step_size = 0;
// set manufacture guids
if (!FwSetMFG(baseUid)) {
return true;
}
- struct toc_info* mfgToc = NULL;
- struct toc_info* vpdToc = NULL;
+ struct toc_info* mfgToc = (struct toc_info*)NULL;
+ struct toc_info* vpdToc = (struct toc_info*)NULL;
u_int32_t mfgAddr = 0;
u_int32_t vpdAddr = 0;
u_int32_t flashSize = 0;
u_int32_t shiftSize = 0x8000;
- FBase* origFlashObj = NULL;
+ FBase* origFlashObj = (FBase*)NULL;
std::vector<u_int8_t> newVpdSection;
int retries = 0;
if (!Fs3GetItocInfo(_fs3ImgInfo.tocArr, _fs3ImgInfo.numOfItocs, FS3_MFG_INFO, mfgToc)) {
if (_ioAccess) {
_ioAccess->close();
delete _ioAccess;
- _ioAccess = NULL;
+ _ioAccess = (FBase*)NULL;
}
if (_fname) {
delete[] _fname;
- _fname = NULL;
+ _fname = (char*)NULL;
}
if (_devName) {
delete[] _devName;
- _devName = NULL;
+ _devName = (char*)NULL;
}
if (_fwParams.fileHndl) {
delete[] _fwParams.fileHndl;
- _fwParams.fileHndl = NULL;
+ _fwParams.fileHndl = (char*)NULL;
}
if (_fwParams.mstHndl) {
delete[] _fwParams.mstHndl;
- _fwParams.mstHndl = NULL;
+ _fwParams.mstHndl =(char*)NULL;
}
if (_fwParams.psid) {
delete[] _fwParams.psid;
- _fwParams.psid = NULL;
+ _fwParams.psid = (char*)NULL;
}
}
if (crc.get() != crc_act) {
report_callback(verifyCallBackFunc, "%s /0x%08x/ - wrong CRC (exp:0x%x, act:0x%x)\n",
pr, offs+beg, crc.get(), crc_act);
- return errmsg(BAD_CRC_MSG);
+ return errmsg(MLXFW_BAD_CRC_ERR, BAD_CRC_MSG);
}
_ioAccess->get_image_crc() << crc_act;
// TODO: Print CRC
return true;
}
-FwVerInfo FwOperations::FwVerLessThan(u_int16_t r1[3], u_int16_t r2[3], u_int8_t fwType) {
+#define CIB_MAJOR 10
+#define OLD_FORMAT_MAX_MINOR_CIB 10
+#define SIB_MAJOR 11
+#define OLD_FORMAT_MAX_MINOR_SIB 1
+
+/*
+ * currently we have 3 FW version format
+ * 0: MM.mm.ssss
+ * 1: MM.mmbb.ssss
+ * 2: MM.mm.bsss / MM.mm.bbss for branch !=0
+ * Where:
+ * M: major digit
+ * m: minor digit
+ * b: branch digit
+ * s: subminor digit
+ */
+int FwOperations::GetFwVerFormat(u_int16_t fwVer[3])
+{
+ if (fwVer[1] > 99) {
+ return 1;
+ }
+
+ if ((fwVer[0] == CIB_MAJOR && fwVer[1] <= OLD_FORMAT_MAX_MINOR_CIB) ||
+ (fwVer[0] == SIB_MAJOR && fwVer[1] <= OLD_FORMAT_MAX_MINOR_SIB)) {
+ return 0;
+ }
+
+ return 2;
+}
+
+FwVerInfo FwOperations::FwVerLessThan(u_int16_t r1[3], u_int16_t r2[3]) {
// copy version arrays to local variables
u_int16_t fwVer1[3];
u_int16_t fwVer2[3];
- u_int16_t branch1 = 0, branch2 = 0;
+ u_int16_t fwVersionFormatR1 = 0;
+ u_int16_t fwVersionFormatR2 = 0;
memcpy(fwVer1, r1, sizeof(fwVer1));
memcpy(fwVer2, r2, sizeof(fwVer2));
- // update minor according to format
- if (fwType == FIT_FS3) {
- // extract GA release version from minor (upper 2 digits)
- fwVer1[1] = r1[1] / 100;
- fwVer2[1] = r2[1] / 100;
- // extract branch (assume branch is 0 in old format)
- branch1 = r1[1] % 100;
- branch2 = r2[1] % 100;
- }
- //compare
+
+ fwVersionFormatR1 = GetFwVerFormat(fwVer1);
+ fwVersionFormatR2 = GetFwVerFormat(fwVer2);
+ // try to decide according to format
+ if (fwVersionFormatR1 > fwVersionFormatR2) {
+ return FVI_GREATER;
+ } else if (fwVersionFormatR1 < fwVersionFormatR2) {
+ return FVI_SMALLER;
+ }
+ // same format compare each field
for (int i = 0; i < 3 ; i++) {
- if (i == 2 && branch1 != branch2) {
- // major and minor versions are the same
- // check branches to see if its an upgrade/downgrade
- if (branch1 != 0 && branch2 != 0) {
- return FVI_UNKNOWN;
- } else if (branch1 > branch2) {
- return FVI_GREATER;
- } else {
- return FVI_SMALLER;
- }
- }
if (fwVer1[i] < fwVer2[i]) {
return FVI_SMALLER;
}
(((Flash*)&f)->get_dev_id() == SWITCH_IB_HW_ID) ||
(((Flash*)&f)->get_dev_id() == CX4_HW_ID) ||
(((Flash*)&f)->get_dev_id() == CX4LX_HW_ID) ||
- (((Flash*)&f)->get_dev_id() == SWITCH_EN_HW_ID)) {
+ (((Flash*)&f)->get_dev_id() == SPECTRUM_HW_ID)) {
return FS_FS3_GEN;
}
} else {
fwParams.buffSize = *((u_int32_t*)info);
}else if (hndlType == FHT_UEFI_DEV) {
fwParams.uefiHndl = (uefi_Dev_t*)fwHndl;
- fwParams.uefiExtra = (f_fw_cmd)info;
+ fwParams.uefiExtra = (uefi_dev_extra_t*)info;
}else if (hndlType == FHT_MST_DEV) {
fwParams.mstHndl = (char*)fwHndl;
fwParams.forceLock = false;
_fwParams.buffHndl = fwParams.buffHndl;
_fwParams.buffSize = fwParams.buffSize;
_fwParams.cx3FwAccess = fwParams.cx3FwAccess;
- _fwParams.errBuff = NULL;
+ _fwParams.errBuff = (char*)NULL;
_fwParams.errBuffSize = 0;
_fwParams.fileHndl = (fwParams.hndlType == FHT_FW_FILE && fwParams.fileHndl) ? \
- strncpy((char*)(new char[(strlen(fwParams.fileHndl) + 1)]), fwParams.fileHndl, strlen(fwParams.fileHndl) + 1) : NULL;
+ strncpy((char*)(new char[(strlen(fwParams.fileHndl) + 1)]), fwParams.fileHndl, strlen(fwParams.fileHndl) + 1) : (char*)NULL;
// no support for flash params
- _fwParams.flashParams = NULL;
+ _fwParams.flashParams = (flash_params_t*)NULL;
_fwParams.forceLock = fwParams.forceLock;
_fwParams.ignoreCacheRep = fwParams.ignoreCacheRep;
_fwParams.mstHndl = (fwParams.hndlType == FHT_MST_DEV && fwParams.mstHndl) ? \
- strncpy((char*)(new char[(strlen(fwParams.mstHndl) + 1)]), fwParams.mstHndl, strlen(fwParams.mstHndl) + 1) : NULL;
+ strncpy((char*)(new char[(strlen(fwParams.mstHndl) + 1)]), fwParams.mstHndl, strlen(fwParams.mstHndl) + 1) : (char*)NULL;
_fwParams.noFlashVerify = fwParams.noFlashVerify;
_fwParams.numOfBanks = fwParams.numOfBanks;
- _fwParams.psid = fwParams.psid ? strncpy((char*)(new char[(strlen(fwParams.psid) + 1)]), fwParams.psid, strlen(fwParams.psid) + 1) : NULL;
+ _fwParams.psid = fwParams.psid ? strncpy((char*)(new char[(strlen(fwParams.psid) + 1)]), fwParams.psid, strlen(fwParams.psid) + 1) : (char*)NULL;
_fwParams.readOnly = fwParams.readOnly;
_fwParams.shortErrors = fwParams.shortErrors;
_fwParams.uefiExtra = fwParams.uefiExtra;
u_int8_t fwFormat;
FBase *ioAccess;
bool getFwFormatFromImg = false;
-
if (!FwAccessCreate(fwParams, &ioAccess)) {
return (FwOperations*)NULL;
}
rc = ((Flash*)_ioAccess)->write(curr_addr, p, trans);
}
if (!rc) {
- return errmsg("Flash write failed: %s", _ioAccess->err());
+ return errmsg(MLXFW_FLASH_WRITE_ERR, "Flash write failed: %s", _ioAccess->err());
}
} else {
trans = towrite;
bool FwOperations::ModifyImageFile(const char *fimage, u_int32_t addr, void *data, int cnt)
{
int file_size = 0;
- u_int8_t * file_data = NULL;
+ u_int8_t * file_data = (u_int8_t*)NULL;
if (!ReadImageFile(fimage, file_data, file_size, addr + cnt)) {
return false;
bool FwOperations::WriteImageToFile(const char *file_name, u_int8_t *data, u_int32_t length)
{
+#ifndef UEFI_BUILD
FILE* fh;
- if ((fh = fopen(file_name, "wb")) == NULL) {
+ if ((fh = fopen(file_name, "wb")) == (FILE*)NULL) {
return errmsg("Can not open %s: %s\n", file_name, strerror(errno));
}
}
fclose(fh);
return true;
+#else
+ return errmsg("Not Implemented\n");
+#endif
}
bool FwOperations::CheckMac(u_int64_t mac) {
}
i++;
}
- return errmsg("Failed to identify device ID(MT%d).", hwDevId);
+ return errmsg(MLXFW_DEV_ID_ERR, "Failed to identify device ID(MT%d).", hwDevId);
}
// TODO:combine both databases(hwDevData and hwDev2Str) and remove old unsupporded devices i.e infinihost infinihost_iii_ex infinihost_iii_lx
{ "BridgeX", BRIDGEX_HW_ID, CT_BRIDGEX, 0, {64102, 64112, 64122, 0}},
{ "SwitchX", SWITCHX_HW_ID, CT_SWITCHX, 0, {51000, 0}},
{ "Switch_IB", SWITCH_IB_HW_ID, CT_SWITCH_IB, 0, {52000, 0}},
- { "ConnectX-4", CX4_HW_ID, CT_CONNECTX, 0, {4115, 0}},
- { "ConnectX-4LX", CX4LX_HW_ID, CT_CONNECTX, 0, {4117, 0}},
- { "Switch_EN", SWITCH_EN_HW_ID, CT_SWITCH_EN, 0, {52100, 0}},
+ { "ConnectX-4", CX4_HW_ID, CT_CONNECTX4, 0, {4115, 0}},
+ { "ConnectX-4LX", CX4LX_HW_ID, CT_CONNECTX4_LX, 0, {4117, 0}},
+ { "Spectrum", SPECTRUM_HW_ID, CT_SPECTRUM, 0, {52100, 0}},
{ (char*)NULL , 0, CT_UNKNOWN, 0, {0}},// zero devid terminator
};
{"InfiniHost III Lx", INFINIHOST_III_LX_HW_ID, 0xA0},
{"InfiniHost III Ex", INFINIHOST_III_EX_HW_ID, 0xA0},
{"SwitchIB A0", SWITCH_IB_HW_ID, 0x00},
- {"SwitchEN A0", SWITCH_EN_HW_ID, 0x00},
+ {"Spectrum A0", SPECTRUM_HW_ID, 0x00},
{ (char*)NULL , (u_int32_t)0, (u_int8_t)0x00}, // zero device ID terminator
};
return false;
}
- return errmsg("FW image file cannot be programmed to device %s, it is intended for: %s only",
+ return errmsg(MLXFW_DEVICE_IMAGE_MISSMATCH_ERR, "FW image file cannot be programmed to device %s, it is intended for: %s only",
curr_hw_id_name, supp_hw_id_list);
}
bool FwOperations::CheckMatchingDevId(u_int32_t hwDevId, u_int32_t imageDevId) {
{
if (!allow_psid_change) {
if (strncmp( _fwImgInfo.ext_info.psid, imageOps._fwImgInfo.ext_info.psid, PSID_LEN)) {
- return errmsg("Image PSID is %s, it cannot be burnt into current device (PSID: %s)",
+ return errmsg(MLXFW_PSID_MISSMATCH_ERR, "Image PSID is %s, it cannot be burnt into current device (PSID: %s)",
imageOps._fwImgInfo.ext_info.psid, _fwImgInfo.ext_info.psid);
}
}
bool FwOperations::CheckFwVersion(FwOperations &imageOps, u_int8_t forceVersion)
{
- FwVerInfo updateRequired = FVI_UNKNOWN;
+ FwVerInfo updateRequired;
if (!forceVersion) {
- updateRequired = FwVerLessThan(_fwImgInfo.ext_info.fw_ver, imageOps._fwImgInfo.ext_info.fw_ver, _fwImgInfo.fwType);
- if (updateRequired == FVI_UNKNOWN) {
- return errmsg("Cannot compare between FW versions(different branches)");
- } else if (updateRequired != FVI_SMALLER ) {
- return errmsg("FW is already updated.");
+ updateRequired = FwVerLessThan(_fwImgInfo.ext_info.fw_ver, imageOps._fwImgInfo.ext_info.fw_ver);
+ if (updateRequired != FVI_SMALLER ) {
+ return errmsg(MLXFW_FW_ALREADY_UPDATED_ERR, "FW is already updated.");
}
}
return true;
bool FwOperations::FwSwReset() {
if (!_ioAccess->is_flash()) {
- return errmsg("operation supported only for switch devices InfiniScaleIV and SwitchX over an IB interface");
+ return errmsg("operation supported only for switch devices InfiniScaleIV, SwitchX and SwitchIB over an IB interface");
}
if (!((Flash*)_ioAccess)->sw_reset()) {
return errmsg("%s", _ioAccess->err());
bool FwOperations::ReadImageFile(const char *fimage, u_int8_t *&file_data, int &file_size, int min_size)
{
+#ifndef UEFI_BUILD
FILE* fh;
if ((fh = fopen(fimage, "rb")) == NULL) {
}
fclose(fh);
return true;
+#else
+ return errmsg("Not implemented.\n");
+#endif
}
void FwOperations::SetDevFlags(chip_type_t chipType, u_int32_t devType, fw_img_type_t fwType, bool &ibDev, bool ðDev) {
ibDev = true;
ethDev = true;
} else {
- ibDev = (fwType == FIT_FS3 && chipType != CT_SWITCH_EN) || !CntxEthOnly(devType);
- ethDev = (chipType == CT_CONNECTX) || (chipType == CT_SWITCH_EN);
+ ibDev = (fwType == FIT_FS3 && chipType != CT_SPECTRUM) || !CntxEthOnly(devType);
+ ethDev = (chipType == CT_CONNECTX) || (chipType == CT_SPECTRUM) || (chipType == CT_CONNECTX4) || (chipType == CT_CONNECTX4_LX);
}
if ((!ibDev && !ethDev) || chipType == CT_UNKNOWN) {
{
u_int16_t supported_fw[3] = {MAJOR_MOD_ROM_FW, MINOR_MOD_ROM_FW, SUBMINOR_MOD_ROM_FW};
// only used in connectx (FS2)
- FwVerInfo verInfo = FwVerLessThan(fw_ver, supported_fw, FIT_FS2);
+ FwVerInfo verInfo = FwVerLessThan(fw_ver, supported_fw);
return ((verInfo == FVI_EQUAL) || (verInfo == FVI_GREATER));
}
fwOpsParams imgOpsParams;
char errBuff[1024] = {0};
- imgOpsParams.psid = NULL;
+ imgOpsParams.psid = (char*)NULL;
imgOpsParams.buffHndl = data;
imgOpsParams.buffSize = dataSize;
imgOpsParams.errBuff = errBuff;
if (newImgOps == NULL) {
return errmsg("Internal error: Failed to create modified image: %s", errBuff);
}
- if (!newImgOps->FwVerify(NULL)) {
+ if (!newImgOps->FwVerify((VerifyCallBack)NULL)) {
errmsg("Internal error: Modified image failed to verify: %s", newImgOps->err());
newImgOps->FwCleanUp();
delete newImgOps;
// typedef std::tr1::function<void (void)> VerifyCallback;
FwOperations(FBase *ioAccess) :
- _ioAccess(ioAccess), _isCached(false), _wasVerified(false),
- _quickQuery(false), _printFunc((PrintCallBack)NULL), _fname(NULL), _devName(NULL), _advErrors(true)
+ _ioAccess(ioAccess), _isCached(false), _wasVerified(false),
+ _quickQuery(false), _printFunc((PrintCallBack)NULL), _fname((const char*)NULL),\
+ _devName((const char*)NULL), _advErrors(true)
{
memset(_sectionsToRead, 0, sizeof(_sectionsToRead));
memset(&_fwImgInfo, 0, sizeof(_fwImgInfo));
virtual ~FwOperations() {};
//virtual void print_type() {};
virtual u_int8_t FwType() = 0;
- static FwVerInfo FwVerLessThan(u_int16_t r1[3], u_int16_t r2[3], u_int8_t fwType);
+ static FwVerInfo FwVerLessThan(u_int16_t r1[3], u_int16_t r2[3]);
static bool IsFwSupportingRomModify(u_int16_t fw_ver[3]);
static bool CntxEthOnly(u_int32_t devid);
static void SetDevFlags(chip_type_t chipType, u_int32_t devType, fw_img_type_t fwType, bool &ibDev, bool ðDev);
u_int8_t expRomErrMsgValid;
char expRomErrMsg[MAX_ROM_ERR_MSG_LEN];
rom_info_t romsInfo[MAX_ROMS_NUM];
-
std::vector<u_int8_t> romSect;
bool GetExpRomVerForOneRom(u_int32_t verOffset);
ExtBurnParams():userGuidsSpecified(false), userMacsSpecified(false), userUidsSpecified(false),
vsdSpecified(false),blankGuids(false), burnFailsafe(true), allowPsidChange(false),
useImagePs(false), useImageGuids(false), singleImageBurn(true), noDevidCheck(false),
- ignoreVersionCheck(false), useImgDevData(false), burnRomOptions(BRO_DEFAULT), progressFunc(NULL),
- userVsd(NULL){}
+ ignoreVersionCheck(false), useImgDevData(false), burnRomOptions(BRO_DEFAULT), progressFunc((ProgressCallBack)NULL),
+ userVsd((char*)NULL){}
};
struct fwOpsParams{
u_int32_t buffSize;
// FHT_UEFI_DEV
uefi_Dev_t* uefiHndl;
- f_fw_cmd uefiExtra;
+ uefi_dev_extra_t* uefiExtra;
// FHT_MST_DEV
char* mstHndl;
bool forceLock;
std::vector<guid_t> userGuids;
u_int8_t numOfGUIDs; // number of GUIDs to allocate for each port. keep zero for default. (FS3 image Only)
u_int8_t stepSize; // step size between GUIDs. keep zero for default. (FS3 Image Only)
+ bool usePPAttr; // if set, use the per prot attributes below (FS3 Image Only)
+ u_int8_t numOfGUIDsPP[2]; // number of GUIDs to allocate for each port. keep 0xff for default. (FS3 image Only)
+ u_int8_t stepSizePP[2]; // step size between GUIDs. keep 0xff for default. (FS3 Image Only)
};
-
protected:
#define FS3_IND_ADDR 0x24
#define ARR_SIZE(arr) sizeof(arr)/sizeof(arr[0])
typedef int (*print2log_func) (const char* format, ...);
// Protected Methods
-
+ static int GetFwVerFormat(u_int16_t fwVer[3]);
virtual bool UpdateImgCache(u_int8_t *buff, u_int32_t addr, u_int32_t size);
bool CheckAndPrintCrcRes(char* pr, bool blank_crc, u_int32_t off, u_int32_t crc_act, u_int32_t crc_exp, bool ignore_crc = false,
VerifyCallBack verifyCallBackFunc = (VerifyCallBack)NULL);
// show advanced error msgs
bool _advErrors;
-
-
-
private:
// Static Methods
MLXFWOP_API int MLXFWOPCALL mlxfw_open_device(mlxfwops_t** mlxfwops_p, char *handle_name)
{
- return mlxfw_open_int(mlxfwops_p, handle_name, NULL, (char*)NULL, FHT_MST_DEV, NULL, 0);
+ return mlxfw_open_int(mlxfwops_p, handle_name, NULL, (char*)NULL, FHT_MST_DEV, (char*)NULL, 0);
}
MLXFWOP_API int MLXFWOPCALL mlxfw_open_image(mlxfwops_t** mlxfwops_p, char *file_name, char *psid)
{
- return mlxfw_open_int(mlxfwops_p, file_name, NULL, psid, FHT_FW_FILE, NULL, 0);
+ return mlxfw_open_int(mlxfwops_p, file_name, NULL, psid, FHT_FW_FILE, (char*)NULL, 0);
}
MLXFWOP_API int MLXFWOPCALL mlxfw_open_buffer(mlxfwops_t** mlxfwops_p, void* buffer, u_int32_t size, char *psid)
{
- return mlxfw_open_int(mlxfwops_p, buffer, &size, psid, FHT_FW_BUFF, NULL, 0);
+ return mlxfw_open_int(mlxfwops_p, buffer, &size, psid, FHT_FW_BUFF, (char*)NULL, 0);
}
#ifdef UEFI_BUILD
-MLXFWOP_API int MLXFWOPCALL mlxfw_open_uefi(mlxfwops_t** mlxfwops_p, uefi_Dev_t* dev, f_fw_cmd fw_cmd_func)
-{
- return mlxfw_open_int(mlxfwops_p, dev, (void*)fw_cmd_func, (char*)NULL, FHT_UEFI_DEV, NULL, 0);
+MLXFWOP_API int MLXFWOPCALL mlxfw_open_uefi(mlxfwops_t** mlxfwops_p, uefi_Dev_t* dev, f_fw_cmd fw_cmd_func, uefi_dev_info_t* dev_info)
+{
+ uefi_dev_extra_t dev_extra;
+ memset(&dev_extra, 0, sizeof(dev_extra));
+ dev_extra.fw_cmd_func = fw_cmd_func;
+ dev_extra.dev_info = dev_info;
+ return mlxfw_open_int(mlxfwops_p, dev, (void*)&dev_extra, (char*)NULL, FHT_UEFI_DEV, (char*)NULL, 0);
}
MLXFWOP_API int MLXFWOPCALL mlxfw_set_print(mlxfwops_t* mlxfwops, f_prog_func_str print_func)
{
+ if (mlxfwops == NULL) {
+ return MLXFW_BAD_PARAM_ERR;
+ }
return !static_cast<FwOperations*>((void*)mlxfwops)->FwSetPrint(print_func);
}
-#endif
-/*
-int mlxfw_burn(mlxfwops_t* mlxfwops, char *image_file, u_int8_t force_version)
+MLXFWOP_API const char* MLXFWOPCALL mlxfw_err2str(int err)
{
- return 0;
+ switch (err) {
+ case 0:
+ return "";
+ case MLXFW_ERR:
+ return "General Error";
+ case MLXFW_MEM_ERR:
+ return "Memory allocation Error";
+ case MLXFW_ERR_IN_STR:
+ return "Error in String";
+ case MLXFW_PSID_MISSMATCH_ERR:
+ return "PSID Mismatch";
+ case MLXFW_FLASH_WRITE_ERR:
+ return "Flash write Failed";
+ case MLXFW_NO_VALID_IMAGE_ERR:
+ return "No valid image found";
+ case MLXFW_MULTIPLE_VALID_IMAGES_ERR:
+ return "More than one valid image found";
+ case MLXFW_BAD_CRC_ERR:
+ return "Bad CRC";
+ case MLXFW_BAD_CHECKSUM_ERR:
+ return "Bad Checksum";
+ case MLXFW_SECTION_TOO_LARGE_ERR:
+ return "Section too large";
+ case MLXFW_SECTION_CORRUPTED_ERR:
+ return "Section is corrupted";
+ case MLXFW_IMAGE_NOT_FS_ERR:
+ return "Image is not failsafe";
+ case MLXFW_IMAGE_TOO_LARGE_ERR:
+ return "Image too large";
+ case MLXFW_IMAGE_FORMAT_ERR:
+ return "Incompatible image format";
+ case MLXFW_DEVICE_IMAGE_MISSMATCH_ERR:
+ return "FW image does not match device";
+ case MLXFW_IMAGE_CORRUPTED_ERR:
+ return "FW image corrupted";
+ case MLXFW_FS_INFO_MISSMATCH_ERR:
+ return "Failsafe information mismatch";
+ case MLXFW_DEV_ID_ERR:
+ return "Unsupported device ID";
+ case MLXFW_UNSUPPORTED_BIN_VER_ERR:
+ return "Unsupported binary version";
+ case MLXFW_NO_VALID_ITOC_ERR:
+ return "No valid ITOC found";
+ case MLXFW_NO_MFG_ERR:
+ return "No MFG_INFO section found";
+ case MLXFW_UNKNOWN_SECT_VER_ERR:
+ return "Unknown Section Version";
+ case MLXFW_OCR_ERR:
+ return "-ocr flag must be specified";
+ case MLXFW_OPEN_OCR_ERR:
+ return "Failed to open device for flash direct access";
+ case MLXFW_FW_ALREADY_UPDATED_ERR:
+ return "FW already updated";
+ case MLXFW_ROM_UPDATE_IN_IMAGE_ERR:
+ return "Failed to update Exp-ROM in image";
+ case MLXFW_GET_SECT_ERR:
+ return "Failed to get Section";
+ case MLXFW_UPDATE_SECT_ERR:
+ return "Failed to update section";
+ case MLXFW_BAD_PARAM_ERR:
+ return "Bad parameter";
+ default:
+ return "Unknown Error";
+ }
}
-*/
-MLXFWOP_API int MLXFWOPCALL mlxfw_burn(mlxfwops_t* dev_mlxfwops, mlxfwops_t* img_mlxfwops, u_int8_t force_version, f_prog_func prog_func)
+#endif
+
+MLXFWOP_API int MLXFWOPCALL mlxfw_burn(mlxfwops_t* dev_mlxfwops, mlxfwops_t* img_mlxfwops, u_int8_t force_version, f_prog_func prog_func, int allow_psid_change)
{
- return !static_cast<FwOperations*>((void*)dev_mlxfwops)->FwBurn(static_cast<FwOperations*>((void*)img_mlxfwops),force_version, prog_func);
+ if (dev_mlxfwops == NULL || img_mlxfwops == NULL) {
+ return MLXFW_BAD_PARAM_ERR;
+ }
+ FwOperations::ExtBurnParams burnParams = FwOperations::ExtBurnParams();
+ burnParams.ignoreVersionCheck = force_version;
+ burnParams.progressFunc = prog_func;
+ burnParams.allowPsidChange = allow_psid_change ? true : false;
+ bool rc = !static_cast<FwOperations*>((void*)dev_mlxfwops)->FwBurnAdvanced(static_cast<FwOperations*>((void*)img_mlxfwops),burnParams);
+ return static_cast<FwOperations*>((void*)dev_mlxfwops)->getErrorCode() ?\
+ static_cast<FwOperations*>((void*)dev_mlxfwops)->getErrorCode() : rc;
}
MLXFWOP_API int MLXFWOPCALL mlxfw_query(mlxfwops_t* mlxfwops, fw_info_t* fw_info)
{
+ if (mlxfwops == NULL) {
+ return MLXFW_BAD_PARAM_ERR;
+ }
return (static_cast<FwOperations*>((void*)mlxfwops)->FwQuery(fw_info, true) == true) ? MLXFW_OK : MLXFW_ERR_IN_STR;
}
MLXFWOP_API int MLXFWOPCALL mlxfw_verify(mlxfwops_t* mlxfwops)
{
+ if (mlxfwops == NULL) {
+ return MLXFW_BAD_PARAM_ERR;
+ }
return !static_cast<FwOperations*>((void*)mlxfwops)->FwVerify((f_prog_func_str)NULL);
}
MLXFWOP_API int MLXFWOPCALL mlxfw_read_image(mlxfwops_t* mlxfwops, void* image, u_int32_t* image_size)
{
+ if (mlxfwops == NULL) {
+ return MLXFW_BAD_PARAM_ERR;
+ }
return !(static_cast<FwOperations*>((void*)mlxfwops)->FwReadData(image, image_size));
}
MLXFWOP_API void MLXFWOPCALL mlxfw_close(mlxfwops_t* mlxfwops)
{
- static_cast<FwOperations*>((void*)mlxfwops)->FwCleanUp();
- delete static_cast<FwOperations*>((void*)mlxfwops);
+ if (mlxfwops) {
+ static_cast<FwOperations*>((void*)mlxfwops)->FwCleanUp();
+ delete static_cast<FwOperations*>((void*)mlxfwops);
+ mlxfwops = (mlxfwops_t*)NULL;
+ }
return;
}
}
return (static_cast<FwOperations*>((void*)mlxfwops)->err());
}
+
+MLXFWOP_API int MLXFWOPCALL mlxfw_get_last_error_code(mlxfwops_t* mlxfwops)
+{
+ if (mlxfwops == NULL) {
+ return MLXFW_BAD_PARAM_ERR;
+ }
+ return (static_cast<FwOperations*>((void*)mlxfwops)->getErrorCode());
+}
typedef struct mlxfwops mlxfwops_t;
-enum {
- MLXFW_OK = 0,
- MLXFW_ERR,
- MLXFW_MEM_ERR,
- MLXFW_ERR_IN_STR,
-};
-
struct image_context {
void * data;
u_int32_t size;
#ifdef UEFI_BUILD
+#include <mft_uefi_common.h>
-MLXFWOP_API int MLXFWOPCALL mlxfw_open_uefi(mlxfwops_t** mlxfwops_p, uefi_Dev_t* dev, f_fw_cmd fw_cmd_func);
+MLXFWOP_API int MLXFWOPCALL mlxfw_open_uefi(mlxfwops_t** mlxfwops_p, uefi_Dev_t* dev, f_fw_cmd fw_cmd_func, uefi_dev_info_t* dev_info);
MLXFWOP_API int MLXFWOPCALL mlxfw_set_print(mlxfwops_t* mlxfwops, f_prog_func_str print_func);
+MLXFWOP_API const char* MLXFWOPCALL mlxfw_err2str(int err);
#endif
MLXFWOP_API const char* MLXFWOPCALL mlxfw_get_last_error(mlxfwops_t* mlxfwops);
-MLXFWOP_API int MLXFWOPCALL mlxfw_burn(mlxfwops_t* dev_mlxfwops, mlxfwops_t* img_mlxfwops, u_int8_t force_version, f_prog_func prog_func);
+MLXFWOP_API int MLXFWOPCALL mlxfw_get_last_error_code(mlxfwops_t* mlxfwops);
+
+MLXFWOP_API int MLXFWOPCALL mlxfw_burn(mlxfwops_t* dev_mlxfwops, mlxfwops_t* img_mlxfwops, u_int8_t force_version, f_prog_func prog_func, int allow_psid_change);
MLXFWOP_API int MLXFWOPCALL mlxfw_read_image(mlxfwops_t* mlxfwops, void* image, u_int32_t* image_size);
#include <compatibility.h>
+#ifdef UEFI_BUILD
+#include <mft_uefi_common.h>
+#endif
+
#ifdef __WIN__
#ifdef MLXFWOP_EXPORTS
#define VSD_LEN 208
#define PSID_LEN 16
#define PRODUCT_VER_LEN 16
+#define PRS_NAME_LEN 100
#define FREE_STR_MAX_LEN 256
}\
} while(0)\
+enum {
+ MLXFW_OK = 0,
+ MLXFW_ERR,
+ MLXFW_MEM_ERR,
+ MLXFW_ERR_IN_STR,
+ MLXFW_PSID_MISSMATCH_ERR,
+ MLXFW_FLASH_WRITE_ERR,
+ MLXFW_NO_VALID_IMAGE_ERR,
+ MLXFW_MULTIPLE_VALID_IMAGES_ERR,
+ MLXFW_BAD_CRC_ERR,
+ MLXFW_BAD_CHECKSUM_ERR,
+ MLXFW_SECTION_TOO_LARGE_ERR,
+ MLXFW_SECTION_CORRUPTED_ERR,
+ MLXFW_IMAGE_NOT_FS_ERR,
+ MLXFW_IMAGE_TOO_LARGE_ERR,
+ MLXFW_IMAGE_FORMAT_ERR,
+ MLXFW_DEVICE_IMAGE_MISSMATCH_ERR,
+ MLXFW_IMAGE_CORRUPTED_ERR,
+ MLXFW_FS_INFO_MISSMATCH_ERR,
+ MLXFW_DEV_ID_ERR,
+ MLXFW_UNSUPPORTED_BIN_VER_ERR,
+ MLXFW_NO_VALID_ITOC_ERR,
+ MLXFW_NO_MFG_ERR,
+ MLXFW_UNKNOWN_SECT_VER_ERR,
+ MLXFW_OCR_ERR,
+ MLXFW_OPEN_OCR_ERR,
+ MLXFW_FW_ALREADY_UPDATED_ERR,
+ MLXFW_ROM_UPDATE_IN_IMAGE_ERR,
+ MLXFW_GET_SECT_ERR,
+ MLXFW_UPDATE_SECT_ERR,
+ MLXFW_BAD_PARAM_ERR
+};
+
enum {
GUIDS = 4,
MACS = 2,
CT_IS4,
CT_CONNECT_IB,
CT_SWITCH_IB,
- CT_SWITCH_EN,
+ CT_SPECTRUM,
+ CT_CONNECTX4,
+ CT_CONNECTX4_LX,
}chip_type_t;
typedef struct guid {
u_int8_t num_of_guids; // set 0 for default
u_int8_t step_size; // set 0 for default, not relevant for devices >= CX4
int set_mac_from_guid; // if set , base_mac will be derrived automatically from base guid
+ int use_pp_attr; // if set, num_of_guids[2] and step_size[2] will be used for the uid attributes.
+ u_int8_t num_of_guids_pp[2]; // set 0xff for default
+ u_int8_t step_size_pp[2]; // set 0xff for default, not relevant for devices >= CX4
} fs3_uid_t;
typedef struct rom_info {
u_int8_t access_key_exists;
guid_t access_key_value;
u_int8_t blank_guids;
+ char prs_name[PRS_NAME_LEN];
} fs2_info_t;
typedef struct roms_info {
};
typedef enum fw_ver_info {
- FVI_UNKNOWN = -1,
- FVI_SMALLER = 0,
- FVI_EQUAL = 1,
- FVI_GREATER = 2,
+ FVI_SMALLER = -1,
+ FVI_EQUAL = 0,
+ FVI_GREATER = 1,
} fw_ver_info_t;
-typedef struct _MLX4_DEV uefi_Dev_t;
-typedef int (*f_fw_cmd) (uefi_Dev_t* dev, void* buffer, int* size);
-
-
-
#endif
--- /dev/null
+/*
+ *
+ * mft_uefi_common.h - Mellanox Technilogies LTD. UEFI common structs header file
+ * ==================================================================
+ *
+ * Copyright (c) 2005 Mellanox Technologies Ltd. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Version: $Id: $
+ *
+ */
+#ifndef MFT_MLXFWOPS_UEFI_C_MFT_UEFI_COMMON_H_
+#define MFT_MLXFWOPS_UEFI_C_MFT_UEFI_COMMON_H_
+
+
+typedef struct _MLX4_DEV uefi_Dev_t;
+
+typedef int (*f_fw_cmd) (uefi_Dev_t* dev, void* buffer, int* w_size, int* r_size);
+
+typedef struct uefi_dev_info {
+ u_int32_t hw_dev_id;
+ u_int32_t rev_id;
+ u_int32_t max_buffer_size;
+} uefi_dev_info_t;
+
+typedef struct uefi_dev_extra{
+ f_fw_cmd fw_cmd_func;
+ uefi_dev_info_t* dev_info;
+}uefi_dev_extra_t;
+
+
+#endif /* MFT_MLXFWOPS_UEFI_C_MFT_UEFI_COMMON_H_ */
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0x11d160,15,
0x11d1a0,15,
-0x11d1e0,15,
-0x11d220,15,
-0x11d260,15,
-0x11d2a0,15,
-0x11d2e0,15,
-0x11d320,15,
-0x11d360,15,
-0x11d3a0,15,
-0x11d3e0,17,
+0x11d1e0,8,
+0x11d400,9,
0x11d428,3,
0x11d440,5,
0x11d480,9,
0x11d6a0,6,
0x11d6c0,6,
0x11d6e0,6,
-0x11d700,12,
+0x11d708,2,
+0x11d718,4,
0x11d734,1,
0x11d73c,4,
0x11d750,4,
0x11d764,1,
-0x11d800,102,
+0x11d76c,2,
+0x11d800,8,
+0x11d840,8,
+0x11d880,8,
+0x11d8c0,8,
+0x11d900,8,
+0x11d940,8,
+0x11d988,4,
0x11da00,3,
-0x11da10,1,
0x11da18,2,
0x11da24,16,
0x11da80,3,
-0x11da90,1,
0x11da98,2,
0x11daa4,16,
0x11db00,3,
-0x11db10,1,
0x11db18,2,
0x11db24,16,
0x11db80,3,
-0x11db90,1,
0x11db98,2,
0x11dba4,16,
-0x11dc00,17,
+0x11dc00,8,
+0x11dc40,1,
0x11e000,72,
0x11e200,72,
0x11e400,72,
0x11e8c0,6,
0x11e8e0,6,
0x11e900,6,
-0x11e920,1,
-0x11ea00,6,
+0x11e920,6,
+0x11e940,6,
+0x11e9fc,7,
0x11ea20,6,
0x11ea40,6,
0x11ea60,6,
0x11eac0,6,
0x11eae0,6,
0x11eb00,6,
-0x11eb20,1,
-0x11ec00,6,
+0x11eb20,6,
+0x11eb40,6,
+0x11ebfc,7,
0x11ec20,6,
0x11ec40,6,
0x11ec60,6,
0x11ecc0,6,
0x11ece0,6,
0x11ed00,6,
-0x11ed20,1,
-0x11ee00,6,
+0x11ed20,6,
+0x11ed40,6,
+0x11edfc,7,
0x11ee20,6,
0x11ee40,6,
0x11ee60,6,
0x11eec0,6,
0x11eee0,6,
0x11ef00,6,
-0x11ef20,1,
-0x11f000,14,
+0x11ef20,6,
+0x11ef40,6,
+0x11effc,15,
0x11f040,2,
0x11f080,14,
0x11f0c0,2,
0x11f448,5,
0x11f460,3,
0x11f470,3,
-0x11f480,13,
-0x11f4b8,1,
+0x11f480,16,
0x11f500,17,
0x11f548,5,
0x11f560,3,
0x11f570,3,
-0x11f580,13,
-0x11f5b8,1,
+0x11f580,16,
0x11f600,17,
0x11f648,5,
0x11f660,3,
0x11f670,3,
-0x11f680,13,
-0x11f6b8,1,
+0x11f680,16,
0x11f700,17,
0x11f748,5,
0x11f760,3,
0x11f770,3,
-0x11f780,13,
-0x11f7b8,1,
+0x11f780,16,
0x11f800,8,
0x11f824,15,
0x11f864,15,
0x11fd00,6,
0x11fd20,3,
0x11fd30,3,
-0x11fd40,20,
+0x11fd44,1,
+0x11fd4c,1,
+0x11fd54,1,
+0x11fd5c,8,
+0x11fd80,11,
0x11fdc0,3,
--- /dev/null
+#Addr, Size, Enable addr
+0x000800,1,
+0x000808,14,
+0x000880,1,
+0x000888,16,
+0x000900,11,
+0x000940,3,
+0x000950,12,
+0x000984,13,
+0x0009c0,8,
+0x000a00,1,
+0x000a18,8,
+0x000a3c,9,
+0x000a84,1,
+0x000a90,4,
+0x000aa4,1,
+0x000aac,7,
+0x000ae0,2,
+0x000aec,2,
+0x000b00,8,
+0x000b40,6,
+0x000b60,3,
+0x000b80,8,
+0x000bb0,21,
+0x000c08,14,
+0x000c80,1,
+0x000c88,16,
+0x000d00,11,
+0x000d40,3,
+0x000d50,12,
+0x000d84,13,
+0x000dc0,8,
+0x000e00,1,
+0x000e18,8,
+0x000e3c,9,
+0x000e84,1,
+0x000e90,4,
+0x000ea4,1,
+0x000eac,7,
+0x000ee0,2,
+0x000eec,2,
+0x000f00,8,
+0x000f40,6,
+0x000f60,3,
+0x000f80,8,
+0x000fb0,21,
+0x001008,14,
+0x001080,1,
+0x001088,16,
+0x001100,11,
+0x001140,3,
+0x001150,12,
+0x001184,13,
+0x0011c0,8,
+0x001200,1,
+0x001218,8,
+0x00123c,9,
+0x001284,1,
+0x001290,4,
+0x0012a4,1,
+0x0012ac,7,
+0x0012e0,2,
+0x0012ec,2,
+0x001300,8,
+0x001340,6,
+0x001360,3,
+0x001380,8,
+0x0013b0,21,
+0x001408,14,
+0x001480,1,
+0x001488,16,
+0x001500,11,
+0x001540,3,
+0x001550,12,
+0x001584,13,
+0x0015c0,8,
+0x001600,1,
+0x001618,8,
+0x00163c,9,
+0x001684,1,
+0x001690,4,
+0x0016a4,1,
+0x0016ac,7,
+0x0016e0,2,
+0x0016ec,2,
+0x001700,8,
+0x001740,6,
+0x001760,3,
+0x001780,8,
+0x0017b0,21,
+0x001808,14,
+0x001880,1,
+0x001888,16,
+0x001900,11,
+0x001940,3,
+0x001950,12,
+0x001984,13,
+0x0019c0,8,
+0x001a00,1,
+0x001a18,8,
+0x001a3c,9,
+0x001a84,1,
+0x001a90,4,
+0x001aa4,1,
+0x001aac,7,
+0x001ae0,2,
+0x001aec,2,
+0x001b00,8,
+0x001b40,6,
+0x001b60,3,
+0x001b80,8,
+0x001bb0,21,
+0x001c08,14,
+0x001c80,1,
+0x001c88,16,
+0x001d00,11,
+0x001d40,3,
+0x001d50,12,
+0x001d84,13,
+0x001dc0,8,
+0x001e00,1,
+0x001e18,8,
+0x001e3c,9,
+0x001e84,1,
+0x001e90,4,
+0x001ea4,1,
+0x001eac,7,
+0x001ee0,2,
+0x001eec,2,
+0x001f00,8,
+0x001f40,6,
+0x001f60,3,
+0x001f80,8,
+0x001fb0,21,
+0x002008,14,
+0x002080,1,
+0x002088,16,
+0x002100,11,
+0x002140,3,
+0x002150,12,
+0x002184,13,
+0x0021c0,8,
+0x002200,1,
+0x002218,8,
+0x00223c,9,
+0x002284,1,
+0x002290,4,
+0x0022a4,1,
+0x0022ac,7,
+0x0022e0,2,
+0x0022ec,2,
+0x002300,8,
+0x002340,6,
+0x002360,3,
+0x002380,8,
+0x0023b0,21,
+0x002408,14,
+0x002480,1,
+0x002488,16,
+0x002500,11,
+0x002540,3,
+0x002550,12,
+0x002584,13,
+0x0025c0,8,
+0x002600,1,
+0x002618,8,
+0x00263c,9,
+0x002684,1,
+0x002690,4,
+0x0026a4,1,
+0x0026ac,7,
+0x0026e0,2,
+0x0026ec,2,
+0x002700,8,
+0x002740,6,
+0x002760,3,
+0x002780,8,
+0x0027b0,21,
+0x002808,14,
+0x002880,1,
+0x002888,16,
+0x002900,11,
+0x002940,3,
+0x002950,12,
+0x002984,13,
+0x0029c0,8,
+0x002a00,1,
+0x002a18,8,
+0x002a3c,9,
+0x002a84,1,
+0x002a90,4,
+0x002aa4,1,
+0x002aac,7,
+0x002ae0,2,
+0x002aec,2,
+0x002b00,8,
+0x002b40,6,
+0x002b60,3,
+0x002b80,8,
+0x002bb0,21,
+0x002c08,14,
+0x002c80,1,
+0x002c88,16,
+0x002d00,11,
+0x002d40,3,
+0x002d50,12,
+0x002d84,13,
+0x002dc0,8,
+0x002e00,1,
+0x002e18,8,
+0x002e3c,9,
+0x002e84,1,
+0x002e90,4,
+0x002ea4,1,
+0x002eac,7,
+0x002ee0,2,
+0x002eec,2,
+0x002f00,8,
+0x002f40,6,
+0x002f60,3,
+0x002f80,8,
+0x002fb0,21,
+0x003008,14,
+0x003080,1,
+0x003088,16,
+0x003100,11,
+0x003140,3,
+0x003150,12,
+0x003184,13,
+0x0031c0,8,
+0x003200,1,
+0x003218,8,
+0x00323c,9,
+0x003284,1,
+0x003290,4,
+0x0032a4,1,
+0x0032ac,7,
+0x0032e0,2,
+0x0032ec,2,
+0x003300,8,
+0x003340,6,
+0x003360,3,
+0x003380,8,
+0x0033b0,21,
+0x003408,14,
+0x003480,1,
+0x003488,16,
+0x003500,11,
+0x003540,3,
+0x003550,12,
+0x003584,13,
+0x0035c0,8,
+0x003600,1,
+0x003618,8,
+0x00363c,9,
+0x003684,1,
+0x003690,4,
+0x0036a4,1,
+0x0036ac,7,
+0x0036e0,2,
+0x0036ec,2,
+0x003700,8,
+0x003740,6,
+0x003760,3,
+0x003780,8,
+0x0037b0,21,
+0x003808,14,
+0x003880,1,
+0x003888,16,
+0x003900,11,
+0x003940,3,
+0x003950,12,
+0x003984,13,
+0x0039c0,8,
+0x003a00,1,
+0x003a18,8,
+0x003a3c,9,
+0x003a84,1,
+0x003a90,4,
+0x003aa4,1,
+0x003aac,7,
+0x003ae0,2,
+0x003aec,2,
+0x003b00,8,
+0x003b40,6,
+0x003b60,3,
+0x003b80,8,
+0x003bb0,21,
+0x003c08,14,
+0x003c80,1,
+0x003c88,16,
+0x003d00,11,
+0x003d40,3,
+0x003d50,12,
+0x003d84,13,
+0x003dc0,8,
+0x003e00,1,
+0x003e18,8,
+0x003e3c,9,
+0x003e84,1,
+0x003e90,4,
+0x003ea4,1,
+0x003eac,7,
+0x003ee0,2,
+0x003eec,2,
+0x003f00,8,
+0x003f40,6,
+0x003f60,3,
+0x003f80,8,
+0x003fb0,21,
+0x004008,14,
+0x004080,1,
+0x004088,16,
+0x004100,11,
+0x004140,3,
+0x004150,12,
+0x004184,13,
+0x0041c0,8,
+0x004200,1,
+0x004218,8,
+0x00423c,9,
+0x004284,1,
+0x004290,4,
+0x0042a4,1,
+0x0042ac,7,
+0x0042e0,2,
+0x0042ec,2,
+0x004300,8,
+0x004340,6,
+0x004360,3,
+0x004380,8,
+0x0043b0,21,
+0x004408,14,
+0x004480,1,
+0x004488,16,
+0x004500,11,
+0x004540,3,
+0x004550,12,
+0x004584,13,
+0x0045c0,8,
+0x004600,1,
+0x004618,8,
+0x00463c,9,
+0x004684,1,
+0x004690,4,
+0x0046a4,1,
+0x0046ac,7,
+0x0046e0,2,
+0x0046ec,2,
+0x004700,8,
+0x004740,6,
+0x004760,3,
+0x004780,8,
+0x0047b0,21,
+0x004808,14,
+0x004880,1,
+0x004888,16,
+0x004900,11,
+0x004940,3,
+0x004950,12,
+0x004984,13,
+0x0049c0,8,
+0x004a00,1,
+0x004a18,8,
+0x004a3c,9,
+0x004a84,1,
+0x004a90,4,
+0x004aa4,1,
+0x004aac,7,
+0x004ae0,2,
+0x004aec,2,
+0x004b00,8,
+0x004b40,6,
+0x004b60,3,
+0x004b80,8,
+0x004bb0,21,
+0x004c08,14,
+0x004c80,1,
+0x004c88,16,
+0x004d00,11,
+0x004d40,3,
+0x004d50,12,
+0x004d84,13,
+0x004dc0,8,
+0x004e00,1,
+0x004e18,8,
+0x004e3c,9,
+0x004e84,1,
+0x004e90,4,
+0x004ea4,1,
+0x004eac,7,
+0x004ee0,2,
+0x004eec,2,
+0x004f00,8,
+0x004f40,6,
+0x004f60,3,
+0x004f80,8,
+0x004fb0,21,
+0x005008,14,
+0x005080,1,
+0x005088,16,
+0x005100,11,
+0x005140,3,
+0x005150,12,
+0x005184,13,
+0x0051c0,8,
+0x005200,1,
+0x005218,8,
+0x00523c,9,
+0x005284,1,
+0x005290,4,
+0x0052a4,1,
+0x0052ac,7,
+0x0052e0,2,
+0x0052ec,2,
+0x005300,8,
+0x005340,6,
+0x005360,3,
+0x005380,8,
+0x0053b0,21,
+0x005408,14,
+0x005480,1,
+0x005488,16,
+0x005500,11,
+0x005540,3,
+0x005550,12,
+0x005584,13,
+0x0055c0,8,
+0x005600,1,
+0x005618,8,
+0x00563c,9,
+0x005684,1,
+0x005690,4,
+0x0056a4,1,
+0x0056ac,7,
+0x0056e0,2,
+0x0056ec,2,
+0x005700,8,
+0x005740,6,
+0x005760,3,
+0x005780,8,
+0x0057b0,21,
+0x005808,14,
+0x005880,1,
+0x005888,16,
+0x005900,11,
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+0x005950,12,
+0x005984,13,
+0x0059c0,8,
+0x005a00,1,
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+0x005a3c,9,
+0x005a84,1,
+0x005a90,4,
+0x005aa4,1,
+0x005aac,7,
+0x005ae0,2,
+0x005aec,2,
+0x005b00,8,
+0x005b40,6,
+0x005b60,3,
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+0x005c08,14,
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+0x0061c0,8,
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+0x006500,11,
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+0x0071c0,8,
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+0x0072a4,1,
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+0x007300,8,
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+0x007380,8,
+0x0073b0,21,
+0x007408,14,
+0x007480,1,
+0x007488,16,
+0x007500,11,
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+0x007550,12,
+0x007584,13,
+0x0075c0,8,
+0x007600,1,
+0x007618,8,
+0x00763c,9,
+0x007684,1,
+0x007690,4,
+0x0076a4,1,
+0x0076ac,7,
+0x0076e0,2,
+0x0076ec,2,
+0x007700,8,
+0x007740,6,
+0x007760,3,
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+0x3e9540,3,
+0x3e9550,7,
+0x3e9570,18,
+0x3e95bc,5,
+0x3e9800,480,
+0x3ea020,4,
+0x3ea040,11,
+0x3ea074,2,
+0x3ea080,4,
+0x3ea0b0,22,
+0x3ea110,2,
+0x3ea120,22,
+0x3ea180,2,
+0x3ea1a0,6,
+0x3ea1c0,9,
+0x3ea200,42,
+0x3ea2c0,1,
+0x3ea2c8,13,
+0x3ea300,25,
+0x3ea36c,4,
+0x3ea380,2,
+0x3ea3a0,1,
+0x3ea3c0,11,
+0x3ea404,3,
+0x3ea420,11,
+0x3ea480,6,
+0x3ea500,1,
+0x3ea520,6,
+0x3ea540,3,
+0x3ea550,7,
+0x3ea570,18,
+0x3ea5bc,5,
+0x3ea800,480,
+0x3eb020,4,
+0x3eb040,11,
+0x3eb074,2,
+0x3eb080,4,
+0x3eb0b0,22,
+0x3eb110,2,
+0x3eb120,22,
+0x3eb180,2,
+0x3eb1a0,6,
+0x3eb1c0,9,
+0x3eb200,42,
+0x3eb2c0,1,
+0x3eb2c8,13,
+0x3eb300,25,
+0x3eb36c,4,
+0x3eb380,2,
+0x3eb3a0,1,
+0x3eb3c0,11,
+0x3eb404,3,
+0x3eb420,11,
+0x3eb480,6,
+0x3eb500,1,
+0x3eb520,6,
+0x3eb540,3,
+0x3eb550,7,
+0x3eb570,18,
+0x3eb5bc,5,
+0x3eb800,480,
+0x3ec020,4,
+0x3ec040,11,
+0x3ec074,2,
+0x3ec080,4,
+0x3ec0b0,22,
+0x3ec110,2,
+0x3ec120,22,
+0x3ec180,2,
+0x3ec1a0,6,
+0x3ec1c0,9,
+0x3ec200,42,
+0x3ec2c0,1,
+0x3ec2c8,13,
+0x3ec300,25,
+0x3ec36c,4,
+0x3ec380,2,
+0x3ec3a0,1,
+0x3ec3c0,11,
+0x3ec404,3,
+0x3ec420,11,
+0x3ec480,6,
+0x3ec500,1,
+0x3ec520,6,
+0x3ec540,3,
+0x3ec550,7,
+0x3ec570,18,
+0x3ec5bc,5,
+0x3ec800,480,
+0x3ef800,5,
+0x3ef818,1,
+0x3ef854,6,
+0x3ef880,4,
+0x3ef8a4,1,
+0x3ef8ac,2,
+0x3ef900,5,
+0x3ef918,1,
+0x3ef954,6,
+0x3ef980,4,
+0x3ef9a4,1,
+0x3ef9ac,2,
+0x3efa00,5,
+0x3efa18,1,
+0x3efa54,6,
+0x3efa80,4,
+0x3efaa4,1,
+0x3efaac,2,
+0x3efb00,5,
+0x3efb18,1,
+0x3efb54,6,
+0x3efb80,4,
+0x3efba4,1,
+0x3efbac,2,
+0x3f4000,3,
+0x3f4018,10,
+0x3f4100,58,
+0x3f41f0,1,
+0x3f4400,3,
+0x3f4418,10,
+0x3f4500,58,
+0x3f45f0,1,
+0x3f4800,3,
+0x3f4810,3,
+0x3f4820,6,
+0x3f4880,9,
+0x3f48c0,9,
+0x3f4900,8,
+0x3f4938,2,
+0x3f4944,1,
+0x3f4954,3,
+0x3f4980,8,
+0x3f49b8,2,
+0x3f49c4,1,
+0x3f49d4,3,
+0x3f5000,3,
+0x3f5018,10,
+0x3f5100,58,
+0x3f51f0,1,
+0x3f5400,3,
+0x3f5418,10,
+0x3f5500,58,
+0x3f55f0,1,
+0x3f5800,3,
+0x3f5810,3,
+0x3f5820,6,
+0x3f5880,9,
+0x3f58c0,9,
+0x3f5900,8,
+0x3f5938,2,
+0x3f5944,1,
+0x3f5954,3,
+0x3f5980,8,
+0x3f59b8,2,
+0x3f59c4,1,
+0x3f59d4,3,
+0x3f6004,7,
+0x3f6024,1,
+0x3f6030,4,
+0x3f6300,5,
+0x3f631c,2,
+0x3f6600,10,
+0x3f6630,1,
+0x3f6640,10,
+0x3f6670,1,
+0x3f6700,10,
+0x3f6730,1,
+0x3f6740,10,
+0x3f6770,1,
+0x3f6800,19,
+0x3f6890,15,
+0x3f6910,15,
+0x3f6a00,10,
+0x3f6ab8,4,
+0x3f6b00,3,
+0x3f6b10,1,
+0x3f6e00,6,
+0x3f6f00,5,
+0x3f7000,65,
+0x3f7800,6,
+0x3f7820,6,
+0x3f7840,6,
+0x3f7860,6,
+0x3f7880,6,
+0x3f78a0,6,
+0x3f78c0,6,
+0x3f78e0,3,
+0x3f7900,6,
+0x3f7920,6,
+0x3f7940,6,
+0x3f7960,6,
+0x3f7980,6,
+0x3f79a0,6,
+0x3f79c0,6,
+0x3f79e0,3,
+0x3f7a00,6,
+0x3f7a20,6,
+0x3f7a40,3,
+0x3f7a80,7,
+0x3f7aa0,7,
+0x3f7ac0,9,
+0x3f7b00,9,
+0x3f7b40,10,
+0x3f7b80,10,
+0x3f7bc0,10,
+0x3f7c00,10,
+0x3f7c40,10,
+0x3f7c80,10,
+0x3f7cc0,3,
+0x3f7e40,7,
+0x3f7e60,7,
+0x3f7e80,7,
+0x3f7ea0,7,
+0x3f7ec0,7,
+0x3f7ee0,7,
+0x3f7f00,7,
+0x3f7f20,7,
+0x3f7f40,7,
+0x3f7f60,4,
+0x3f7f78,13,
+0x3f8000,2,
+0x3f800c,3,
+0x3f8028,2,
+0x3f8038,2,
+0x3f8080,29,
+0x3f80f8,1,
+0x3f8100,13,
+0x3f8140,13,
+0x3f8500,6,
+0x3f8520,6,
+0x3f8540,3,
+0x3f8580,10,
+0x3f85c0,15,
+0x3f8600,2,
+0x3f8618,5,
+0x3f8630,1,
+0x3f8800,2,
+0x3f880c,3,
+0x3f8828,2,
+0x3f8838,2,
+0x3f8880,29,
+0x3f88f8,1,
+0x3f8900,13,
+0x3f8940,13,
+0x3f8d00,6,
+0x3f8d20,6,
+0x3f8d40,3,
+0x3f8d80,10,
+0x3f8dc0,15,
+0x3f8e00,2,
+0x3f8e18,5,
+0x3f8e30,1,
+0x3f9800,3,
+0x3f9828,3,
+0x3f9850,3,
+0x3f9878,3,
+0x3f98a0,9,
+0x3f99ac,1,
+0x3f99d8,4,
+0x3f9a00,6,
+0x3f9a20,6,
+0x3f9a40,6,
+0x3f9a60,6,
+0x3f9a80,6,
+0x3f9aa0,6,
+0x3f9ac0,3,
+0x3f9c00,6,
+0x3f9c20,3,
+0x3f9c40,2,
+0x3f9c60,1,
+++ /dev/null
-#Addr, Size, Enable addr
-0x000800,1,
-0x000808,14,
-0x000880,1,
-0x000888,16,
-0x000900,11,
-0x000940,3,
-0x000950,12,
-0x000984,19,
-0x000a00,1,
-0x000a18,8,
-0x000a3c,9,
-0x000a84,1,
-0x000a90,4,
-0x000aa4,1,
-0x000aac,7,
-0x000ae0,2,
-0x000aec,2,
-0x000b00,8,
-0x000b40,6,
-0x000b60,3,
-0x000b80,8,
-0x000bb8,19,
-0x000c08,14,
-0x000c80,1,
-0x000c88,16,
-0x000d00,11,
-0x000d40,3,
-0x000d50,12,
-0x000d84,19,
-0x000e00,1,
-0x000e18,8,
-0x000e3c,9,
-0x000e84,1,
-0x000e90,4,
-0x000ea4,1,
-0x000eac,7,
-0x000ee0,2,
-0x000eec,2,
-0x000f00,8,
-0x000f40,6,
-0x000f60,3,
-0x000f80,8,
-0x000fb8,19,
-0x001008,14,
-0x001080,1,
-0x001088,16,
-0x001100,11,
-0x001140,3,
-0x001150,12,
-0x001184,19,
-0x001200,1,
-0x001218,8,
-0x00123c,9,
-0x001284,1,
-0x001290,4,
-0x0012a4,1,
-0x0012ac,7,
-0x0012e0,2,
-0x0012ec,2,
-0x001300,8,
-0x001340,6,
-0x001360,3,
-0x001380,8,
-0x0013b8,19,
-0x001408,14,
-0x001480,1,
-0x001488,16,
-0x001500,11,
-0x001540,3,
-0x001550,12,
-0x001584,19,
-0x001600,1,
-0x001618,8,
-0x00163c,9,
-0x001684,1,
-0x001690,4,
-0x0016a4,1,
-0x0016ac,7,
-0x0016e0,2,
-0x0016ec,2,
-0x001700,8,
-0x001740,6,
-0x001760,3,
-0x001780,8,
-0x0017b8,19,
-0x001808,14,
-0x001880,1,
-0x001888,16,
-0x001900,11,
-0x001940,3,
-0x001950,12,
-0x001984,19,
-0x001a00,1,
-0x001a18,8,
-0x001a3c,9,
-0x001a84,1,
-0x001a90,4,
-0x001aa4,1,
-0x001aac,7,
-0x001ae0,2,
-0x001aec,2,
-0x001b00,8,
-0x001b40,6,
-0x001b60,3,
-0x001b80,8,
-0x001bb8,19,
-0x001c08,14,
-0x001c80,1,
-0x001c88,16,
-0x001d00,11,
-0x001d40,3,
-0x001d50,12,
-0x001d84,19,
-0x001e00,1,
-0x001e18,8,
-0x001e3c,9,
-0x001e84,1,
-0x001e90,4,
-0x001ea4,1,
-0x001eac,7,
-0x001ee0,2,
-0x001eec,2,
-0x001f00,8,
-0x001f40,6,
-0x001f60,3,
-0x001f80,8,
-0x001fb8,19,
-0x002008,14,
-0x002080,1,
-0x002088,16,
-0x002100,11,
-0x002140,3,
-0x002150,12,
-0x002184,19,
-0x002200,1,
-0x002218,8,
-0x00223c,9,
-0x002284,1,
-0x002290,4,
-0x0022a4,1,
-0x0022ac,7,
-0x0022e0,2,
-0x0022ec,2,
-0x002300,8,
-0x002340,6,
-0x002360,3,
-0x002380,8,
-0x0023b8,19,
-0x002408,14,
-0x002480,1,
-0x002488,16,
-0x002500,11,
-0x002540,3,
-0x002550,12,
-0x002584,19,
-0x002600,1,
-0x002618,8,
-0x00263c,9,
-0x002684,1,
-0x002690,4,
-0x0026a4,1,
-0x0026ac,7,
-0x0026e0,2,
-0x0026ec,2,
-0x002700,8,
-0x002740,6,
-0x002760,3,
-0x002780,8,
-0x0027b8,19,
-0x002808,14,
-0x002880,1,
-0x002888,16,
-0x002900,11,
-0x002940,3,
-0x002950,12,
-0x002984,19,
-0x002a00,1,
-0x002a18,8,
-0x002a3c,9,
-0x002a84,1,
-0x002a90,4,
-0x002aa4,1,
-0x002aac,7,
-0x002ae0,2,
-0x002aec,2,
-0x002b00,8,
-0x002b40,6,
-0x002b60,3,
-0x002b80,8,
-0x002bb8,19,
-0x002c08,14,
-0x002c80,1,
-0x002c88,16,
-0x002d00,11,
-0x002d40,3,
-0x002d50,12,
-0x002d84,19,
-0x002e00,1,
-0x002e18,8,
-0x002e3c,9,
-0x002e84,1,
-0x002e90,4,
-0x002ea4,1,
-0x002eac,7,
-0x002ee0,2,
-0x002eec,2,
-0x002f00,8,
-0x002f40,6,
-0x002f60,3,
-0x002f80,8,
-0x002fb8,19,
-0x003008,14,
-0x003080,1,
-0x003088,16,
-0x003100,11,
-0x003140,3,
-0x003150,12,
-0x003184,19,
-0x003200,1,
-0x003218,8,
-0x00323c,9,
-0x003284,1,
-0x003290,4,
-0x0032a4,1,
-0x0032ac,7,
-0x0032e0,2,
-0x0032ec,2,
-0x003300,8,
-0x003340,6,
-0x003360,3,
-0x003380,8,
-0x0033b8,19,
-0x003408,14,
-0x003480,1,
-0x003488,16,
-0x003500,11,
-0x003540,3,
-0x003550,12,
-0x003584,19,
-0x003600,1,
-0x003618,8,
-0x00363c,9,
-0x003684,1,
-0x003690,4,
-0x0036a4,1,
-0x0036ac,7,
-0x0036e0,2,
-0x0036ec,2,
-0x003700,8,
-0x003740,6,
-0x003760,3,
-0x003780,8,
-0x0037b8,19,
-0x003808,14,
-0x003880,1,
-0x003888,16,
-0x003900,11,
-0x003940,3,
-0x003950,12,
-0x003984,19,
-0x003a00,1,
-0x003a18,8,
-0x003a3c,9,
-0x003a84,1,
-0x003a90,4,
-0x003aa4,1,
-0x003aac,7,
-0x003ae0,2,
-0x003aec,2,
-0x003b00,8,
-0x003b40,6,
-0x003b60,3,
-0x003b80,8,
-0x003bb8,19,
-0x003c08,14,
-0x003c80,1,
-0x003c88,16,
-0x003d00,11,
-0x003d40,3,
-0x003d50,12,
-0x003d84,19,
-0x003e00,1,
-0x003e18,8,
-0x003e3c,9,
-0x003e84,1,
-0x003e90,4,
-0x003ea4,1,
-0x003eac,7,
-0x003ee0,2,
-0x003eec,2,
-0x003f00,8,
-0x003f40,6,
-0x003f60,3,
-0x003f80,8,
-0x003fb8,19,
-0x004008,14,
-0x004080,1,
-0x004088,16,
-0x004100,11,
-0x004140,3,
-0x004150,12,
-0x004184,19,
-0x004200,1,
-0x004218,8,
-0x00423c,9,
-0x004284,1,
-0x004290,4,
-0x0042a4,1,
-0x0042ac,7,
-0x0042e0,2,
-0x0042ec,2,
-0x004300,8,
-0x004340,6,
-0x004360,3,
-0x004380,8,
-0x0043b8,19,
-0x004408,14,
-0x004480,1,
-0x004488,16,
-0x004500,11,
-0x004540,3,
-0x004550,12,
-0x004584,19,
-0x004600,1,
-0x004618,8,
-0x00463c,9,
-0x004684,1,
-0x004690,4,
-0x0046a4,1,
-0x0046ac,7,
-0x0046e0,2,
-0x0046ec,2,
-0x004700,8,
-0x004740,6,
-0x004760,3,
-0x004780,8,
-0x0047b8,19,
-0x004808,14,
-0x004880,1,
-0x004888,16,
-0x004900,11,
-0x004940,3,
-0x004950,12,
-0x004984,19,
-0x004a00,1,
-0x004a18,8,
-0x004a3c,9,
-0x004a84,1,
-0x004a90,4,
-0x004aa4,1,
-0x004aac,7,
-0x004ae0,2,
-0x004aec,2,
-0x004b00,8,
-0x004b40,6,
-0x004b60,3,
-0x004b80,8,
-0x004bb8,19,
-0x004c08,14,
-0x004c80,1,
-0x004c88,16,
-0x004d00,11,
-0x004d40,3,
-0x004d50,12,
-0x004d84,19,
-0x004e00,1,
-0x004e18,8,
-0x004e3c,9,
-0x004e84,1,
-0x004e90,4,
-0x004ea4,1,
-0x004eac,7,
-0x004ee0,2,
-0x004eec,2,
-0x004f00,8,
-0x004f40,6,
-0x004f60,3,
-0x004f80,8,
-0x004fb8,19,
-0x005008,14,
-0x005080,1,
-0x005088,16,
-0x005100,11,
-0x005140,3,
-0x005150,12,
-0x005184,19,
-0x005200,1,
-0x005218,8,
-0x00523c,9,
-0x005284,1,
-0x005290,4,
-0x0052a4,1,
-0x0052ac,7,
-0x0052e0,2,
-0x0052ec,2,
-0x005300,8,
-0x005340,6,
-0x005360,3,
-0x005380,8,
-0x0053b8,19,
-0x005408,14,
-0x005480,1,
-0x005488,16,
-0x005500,11,
-0x005540,3,
-0x005550,12,
-0x005584,19,
-0x005600,1,
-0x005618,8,
-0x00563c,9,
-0x005684,1,
-0x005690,4,
-0x0056a4,1,
-0x0056ac,7,
-0x0056e0,2,
-0x0056ec,2,
-0x005700,8,
-0x005740,6,
-0x005760,3,
-0x005780,8,
-0x0057b8,19,
-0x005808,14,
-0x005880,1,
-0x005888,16,
-0x005900,11,
-0x005940,3,
-0x005950,12,
-0x005984,19,
-0x005a00,1,
-0x005a18,8,
-0x005a3c,9,
-0x005a84,1,
-0x005a90,4,
-0x005aa4,1,
-0x005aac,7,
-0x005ae0,2,
-0x005aec,2,
-0x005b00,8,
-0x005b40,6,
-0x005b60,3,
-0x005b80,8,
-0x005bb8,19,
-0x005c08,14,
-0x005c80,1,
-0x005c88,16,
-0x005d00,11,
-0x005d40,3,
-0x005d50,12,
-0x005d84,19,
-0x005e00,1,
-0x005e18,8,
-0x005e3c,9,
-0x005e84,1,
-0x005e90,4,
-0x005ea4,1,
-0x005eac,7,
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-0x3ec110,2,
-0x3ec120,22,
-0x3ec180,1,
-0x3ec1a0,6,
-0x3ec1c0,8,
-0x3ec200,42,
-0x3ec2c0,1,
-0x3ec2c8,13,
-0x3ec300,25,
-0x3ec36c,4,
-0x3ec380,2,
-0x3ec3a0,1,
-0x3ec3c0,11,
-0x3ec404,3,
-0x3ec420,11,
-0x3ec480,6,
-0x3ec500,1,
-0x3ec520,6,
-0x3ec540,3,
-0x3ec550,7,
-0x3ec570,18,
-0x3ec5bc,5,
-0x3ec800,448,
-0x3ef800,5,
-0x3ef818,1,
-0x3ef854,6,
-0x3ef880,4,
-0x3ef8a4,1,
-0x3ef8ac,2,
-0x3ef900,5,
-0x3ef918,1,
-0x3ef954,6,
-0x3ef980,4,
-0x3ef9a4,1,
-0x3ef9ac,2,
-0x3efa00,5,
-0x3efa18,1,
-0x3efa54,6,
-0x3efa80,4,
-0x3efaa4,1,
-0x3efaac,2,
-0x3efb00,5,
-0x3efb18,1,
-0x3efb54,6,
-0x3efb80,4,
-0x3efba4,1,
-0x3efbac,2,
-0x3f4000,3,
-0x3f4018,8,
-0x3f4100,56,
-0x3f41f0,1,
-0x3f4400,3,
-0x3f4418,8,
-0x3f4500,56,
-0x3f45f0,1,
-0x3f4800,3,
-0x3f4810,3,
-0x3f4820,6,
-0x3f4880,9,
-0x3f48c0,9,
-0x3f4900,8,
-0x3f4938,2,
-0x3f4944,1,
-0x3f4954,3,
-0x3f4980,8,
-0x3f49b8,2,
-0x3f49c4,1,
-0x3f49d4,3,
-0x3f5000,3,
-0x3f5018,8,
-0x3f5100,56,
-0x3f51f0,1,
-0x3f5400,3,
-0x3f5418,8,
-0x3f5500,56,
-0x3f55f0,1,
-0x3f5800,3,
-0x3f5810,3,
-0x3f5820,6,
-0x3f5880,9,
-0x3f58c0,9,
-0x3f5900,8,
-0x3f5938,2,
-0x3f5944,1,
-0x3f5954,3,
-0x3f5980,8,
-0x3f59b8,2,
-0x3f59c4,1,
-0x3f59d4,3,
-0x3f6004,7,
-0x3f6024,1,
-0x3f6030,4,
-0x3f6300,5,
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-0x3f6600,10,
-0x3f6630,1,
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-0x3f6670,1,
-0x3f6700,10,
-0x3f6730,1,
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-0x3f6770,1,
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-0x3f6890,15,
-0x3f6910,15,
-0x3f6990,10,
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-0x3f6b00,3,
-0x3f6e00,6,
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%{!?ibmadlib: %define ibmadlib libibmad-devel}
%{!?name: %define name mstflint}
-%{!?version: %define version 4.0.1}
+%{!?version: %define version 4.1.0}
%{!?release: %define release 1}
%{!?buildtype: %define buildtype "native"}
%{!?noinband: %define noinband 0}
%{_mandir}/man1/*
%changelog
+* Wed Aug 26 2015 Adrian Chiris <adrianc@dev.mellanox.co.il>
+ MFT 4.1.0 Updates
+
* Wed Jun 05 2015 Adrian Chiris <adrianc@dev.mellanox.co.il>
MFT 4.0.1 Updates
-/*
- * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved.
+/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
+ *
+ * Version: $Id$
+ *
*/
#ifndef _MTCR_ICMD_CIF /* guard */
#define INOUT
#define FLASH_REG_ACCESS 0x9001
+#define ICMD_MAX_CMD_SIZE 0x300 // max mailbox size
/* --------- Functional API ---------------------------------------- */
/**
}
}
-#ifdef __FreeBSD__
-void mpci_change(mfile* mf)
-{
- (void)mf;
-}
-#else
extern void mpci_change(mfile* mf);
-#endif
static void tools_cmdif_pack(tools_cmdif* cmd, u_int32_t* buf) {
memset((char*)buf, 0, CMD_IF_SIZE);
int tools_cmdif_is_supported(mfile *mf)
{
int rc = ME_OK;
+ // run mailbox write cmd (read command fails after driver restart or internal reset)
+ u_int32_t writebuf[2] = {0};
if (!mf) {
return ME_BAD_PARAMS;
}
rc = ME_SEM_LOCKED;
goto cleanup;
}
- // run mailbox write cmd (read command fails after driver restart or internal reset)
- u_int32_t writebuf[2] = {0};
rc = tools_cmdif_mbox_write(mf, 0, writebuf);
if (rc) {
tools_cmdif_flash_lock(mf, 0);
int fd;
};
+#define CX3_SW_ID 4099
+#define CX3PRO_SW_ID 4103
+
/* Forward decl*/
static int get_inband_dev_from_pci(char* inband_dev, char* pci_dev);
+int check_force_config(unsigned my_domain, unsigned my_bus, unsigned my_dev, unsigned my_func);
/*
* Lock file section:
*
errno = err;
return -1;
}
-
return 0;
}
}
rc = mtcr_check_signature(mf);
-
end:
if (rc) {
mtcr_pcicr_mclose(mf);
#endif
}
-
-
static
enum mtcr_access_method mtcr_parse_name(const char* name, int *force,
unsigned *domain_p, unsigned *bus_p,
unsigned my_dev;
unsigned my_func;
int scnt, r;
+ int force_config = 0;
char config[] = "/config";
char resource0[] = "/resource0";
char procbuspci[] = "/proc/bus/pci/";
&my_domain, &my_bus, &my_dev, &my_func);
if (scnt != 4)
goto parse_error;
+ if (sscanf(name, "mlx5_%x", &tmp) == 1) {
+ force_config = 1;
+ }
goto name_parsed;
}
scnt = sscanf(name, "%x:%x.%x", &my_bus, &my_dev, &my_func);
- if (scnt == 3)
+ if (scnt == 3) {
+ force_config = check_force_config(my_domain, my_bus, my_dev, my_func);
goto name_parsed;
+ }
scnt = sscanf(name, "%x:%x:%x.%x", &my_domain, &my_bus, &my_dev, &my_func);
- if (scnt == 4)
+ if (scnt == 4) {
+ force_config = check_force_config(my_domain, my_bus, my_dev, my_func);
goto name_parsed;
+ }
parse_error:
fprintf(stderr,"Unable to parse device name %s\n", name);
// on ARM processors MMAP not supported
return MTCR_ACCESS_CONFIG;
#else
+ if (force_config) {
+ return MTCR_ACCESS_CONFIG;
+ }
return MTCR_ACCESS_MEMORY;
#endif
}
#endif
}
+int mhca_reset(mfile *mf)
+{
+ (void)mf;
+ errno = ENOTSUP;
+ return -1;
+}
+
+int is_supported_device(char* devname)
+{
+ static char* unsupported_dev_ids[] = {
+ "0x0600", //FPGA
+ "-1"
+ };
+ char fname[64];
+ char devid[64];
+ FILE* f;
+ int ret_val = 1;
+ int i = 0;
+ sprintf(fname, "/sys/bus/pci/devices/%s/device", devname);
+ f = fopen(fname, "r");
+ if (f == NULL) {
+ //printf("-D- Could not open file: %s\n", fname);
+ return 1;
+ }
+ if (fgets(devid, sizeof(devid), f)) {
+ while (strcmp(unsupported_dev_ids[i], "-1")) {
+ if (!strncmp(devid, unsupported_dev_ids[i], strlen(unsupported_dev_ids[i]))) {
+ //printf("-D- device: %s, with devid: %s is unsupported\n", devname, devid);
+ ret_val = 0;
+ break;
+ }
+ i++;
+ }
+ }
+ fclose(f);
+ return ret_val;
+}
+
int mdevices(char *buf, int len, int mask)
{
goto cleanup_dir_opened;
}
if (fgets(inbuf, sizeof(inbuf), f)) {
- if(!strncmp(inbuf, MLNX_PCI_VENDOR_ID, strlen(MLNX_PCI_VENDOR_ID))) {
+ if(!strncmp(inbuf, MLNX_PCI_VENDOR_ID, strlen(MLNX_PCI_VENDOR_ID)) &&
+ is_supported_device(dir->d_name)) {
rsz = sz + 1; //dev name size + place for Null char
if ((pos + rsz) > len) {
ndevs = -1;
return 0;
}
+
+int check_force_config(unsigned my_domain, unsigned my_bus, unsigned my_dev, unsigned my_func)
+{
+ u_int8_t conf_header[0x40];
+ u_int32_t *conf_header_32p = (u_int32_t*)conf_header;
+ if (read_pci_config_header(my_domain, my_bus, my_dev, my_func, conf_header)) {
+ return 0;
+ }
+ u_int32_t devid = __le32_to_cpu(conf_header_32p[0]) >> 16;
+ if (devid == CX3PRO_SW_ID || devid == CX3_SW_ID) {
+ return 0;
+ }
+ return 1;
+}
+
+
dev_info* mdevices_info(int mask, int* len)
{
char* devs = 0;
mf->ctx = tmp_ctx;
}
-mfile *mopen_fw_ctx(void* fw_cmd_context, void* fw_cmd_func)
+mfile *mopen_fw_ctx(void* fw_cmd_context, void* fw_cmd_func, void* extra_data)
{
// not implemented
TOOLS_UNUSED(fw_cmd_context);
TOOLS_UNUSED(fw_cmd_func);
+ TOOLS_UNUSED(extra_data);
return NULL;
}
#define REGISTER_HEADERS_SIZE 12
#define INBAND_MAX_REG_SIZE 44
-#define ICMD_MAX_REG_SIZE 236
+#define ICMD_MAX_REG_SIZE (ICMD_MAX_CMD_SIZE - REGISTER_HEADERS_SIZE)
#define TOOLS_HCR_MAX_REG_SIZE (TOOLS_HCR_MAX_MBOX - REGISTER_HEADERS_SIZE)
static int supports_icmd(mfile* mf);
return ME_OK;
}
-
-#define CIB_HW_ID 511
-#define CX4_HW_ID 521
-#define CX4LX_HW_ID 523
-#define SW_IB_HW_ID 583
-#define CX3_PRO_HW_ID 0x1F7
-#define CX3_HW_ID_REV 0x1f5
+// needed device HW IDs
+#define CONNECTX3_PRO_HW_ID 0x1f7
+#define CONNECTX3_HW_ID 0x1f5
+#define SWITCHX_HW_ID 0x245
+#define INFINISCALE4_HW_ID 0x1b3
#define HW_ID_ADDR 0xf0014
+
static int supports_icmd(mfile* mf) {
u_int32_t dev_id;
- if (mread4(mf,HW_ID_ADDR, &dev_id) !=4) { // cr might be locked and retured 0xbad0cafe but we dont care we search for device that supports icmd
- return 1;
- }
- switch (dev_id & 0xffff) { // that the hw device id
- case CIB_HW_ID :
- case CX4_HW_ID :
- case CX4LX_HW_ID :
- case SW_IB_HW_ID :
- return 1;
- default:
- break;
- }
- return 0;
+
+ if (mread4(mf,HW_ID_ADDR, &dev_id) != 4 ) {// cr might be locked and retured 0xbad0cafe but we dont care we search for device that supports icmd
+ return 0;
+ }
+ switch (dev_id & 0xffff) { // that the hw device id
+ case CONNECTX3_HW_ID :
+ case CONNECTX3_PRO_HW_ID :
+ case INFINISCALE4_HW_ID :
+ case SWITCHX_HW_ID :
+ return 0;
+ default:
+ break;
+ }
+ return 1;
}
static int supports_tools_cmdif_reg(mfile* mf) {
u_int32_t dev_id;
if (mread4(mf,HW_ID_ADDR, &dev_id) != 4) { // cr might be locked and retured 0xbad0cafe but we dont care we search for device that supports tools cmdif
- return 1;
+ return 0;
}
switch (dev_id & 0xffff) { // that the hw device id
- case CX3_HW_ID_REV : //Cx3
- case CX3_PRO_HW_ID : // Cx3-pro
+ case CONNECTX3_HW_ID : //Cx3
+ case CONNECTX3_PRO_HW_ID : // Cx3-pro
if (tools_cmdif_is_supported(mf) == ME_OK) {
return 1;
}
#define OPCODE_BITLEN 16
#define STATUS_BITOFF 8
#define STATUS_BITLEN 8
-#define ICMD_MAX_CMD_SIZE 256
#define VCR_CTRL_ADDR 0x0
#define VCR_SEMAPHORE62 0x0 // semaphore Domain
#define HW_ID_ADDR 0xf0014
#define CIB_HW_ID 511
#define CX4_HW_ID 521
+#define CX4LX_HW_ID 523
#define SW_IB_HW_ID 583
#define SW_EN_HW_ID 585
MREAD4((mf), (HW_ID_ADDR), &(_hw_id));\
switch (_hw_id & 0xffff) {\
case (CX4_HW_ID):\
+ case (CX4LX_HW_ID):\
addr = addr_cx4;\
break;\
case (SW_IB_HW_ID):\
#define REG_ID_PMDIC 0x9021
#define REG_ID_MNVA 0x9024
#define REG_ID_MNVI 0x9025
-#define REG_ID_MNVIA 0x9029
+#define REG_ID_MNVIA 0x9029 // 4th gen
#define REG_ID_NVQC 0x9030
+#define REG_ID_NVIA 0x9033 // 5th gen
// TODO: get correct register ID for mfrl mfai
#define REG_ID_MFRL 0x9028
}
/************************************
- * Function: reg_access_nvdia
+ * Function: reg_access_nvia
************************************/
-reg_access_status_t reg_access_nvdia (mfile* mf, reg_access_method_t method, struct tools_open_nvdia* nvdia)
+reg_access_status_t reg_access_nvia (mfile* mf, reg_access_method_t method, struct tools_open_nvia* nvia)
{
if (method != REG_ACCESS_METHOD_SET ) { // this register supports only set method
return ME_REG_ACCESS_BAD_METHOD;
}
- REG_ACCCESS(mf, method, REG_ID_MNVIA, nvdia, nvdia, tools_open);
+ REG_ACCCESS(mf, method, REG_ID_NVIA, nvia, nvia, tools_open);
}
/************************************
reg_access_status_t reg_access_mfai (mfile* mf, reg_access_method_t method, struct cibfw_register_mfai* mfai);
reg_access_status_t reg_access_nvda (mfile* mf, reg_access_method_t method, struct tools_open_nvda* nvda);
reg_access_status_t reg_access_nvdi (mfile* mf, reg_access_method_t method, struct tools_open_nvdi* nvdi);
-reg_access_status_t reg_access_nvdia (mfile* mf, reg_access_method_t method, struct tools_open_nvdia* nvdia);
+reg_access_status_t reg_access_nvia (mfile* mf, reg_access_method_t method, struct tools_open_nvia* nvdia);
reg_access_status_t reg_access_nvqc (mfile* mf, reg_access_method_t method, struct tools_open_nvqc* nvqc);
#ifdef __cplusplus
HCA_LSPCI_NAME="InfiniBand"
+HCA_LSPCI_NAME_NEW="Infiniband controller"
VPI_LSPCI_NAME="Network controller"
NIC_LSPCI_NAME="Ethernet controller"
MEM_CON_LSPCI_NAME="Memory controller"
-MEL_LSPCI_NAME_EXP="${HCA_LSPCI_NAME}|${VPI_LSPCI_NAME}|${NIC_LSPCI_NAME}"
+MEL_LSPCI_NAME_EXP="${HCA_LSPCI_NAME}|${HCA_LSPCI_NAME_NEW}|${VPI_LSPCI_NAME}|${NIC_LSPCI_NAME}"
echo "---- Performing Adapter Device Self Test ----"
current_pci_info=`get_curr_ca_pci_info $loop_cnt`
- if [[ ${current_pci_info} =~ ${HCA_LSPCI_NAME} ]] || [[ ${current_pci_info} =~ ${MEM_CON_LSPCI_NAME} ]]; then
+ if [[ ${current_pci_info} =~ ${HCA_LSPCI_NAME} ]] || [[ ${current_pci_info} =~ ${HCA_LSPCI_NAME_NEW} ]] || [[ ${current_pci_info} =~ ${MEM_CON_LSPCI_NAME} ]]; then
ca_type=HCA
elif [[ ${current_pci_info} =~ ${VPI_LSPCI_NAME} ]]; then
ca_type=VPI
*/
/***
- *** This file was generated at "2015-04-20 13:45:50"
+ *** This file was generated at "2015-06-17 12:05:46"
*** by:
- *** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/connectx4/connectx4.adb --file-prefix connectx4 --prefix connectx4_
+ *** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/tools_open/tools_open.adb --file-prefix tools_open --prefix tools_open_
***/
#include <assert.h>
*/
/***
- *** This file was generated at "2015-04-20 13:45:50"
+ *** This file was generated at "2015-06-17 12:05:46"
*** by:
- *** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/connectx4/connectx4.adb --file-prefix connectx4 --prefix connectx4_
+ *** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/tools_open/tools_open.adb --file-prefix tools_open --prefix tools_open_
***/
#ifndef ADABE_TO_C_UTILS
*/
/***
- *** This file was generated at "2015-02-05 17:00:49"
+ *** This file was generated at "2015-06-17 12:05:15"
*** by:
*** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/cibfw/cibfw.adb --file-prefix cibfw --prefix cibfw_
***/
cibfw_module_versions_print(ptr_struct, file, 0);
}
+void cibfw_image_size_pack(const struct cibfw_image_size *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=24;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->log_step);
+
+ offset=32;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->max_size);
+
+}
+
+void cibfw_image_size_unpack(struct cibfw_image_size *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=24;
+ ptr_struct->log_step = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+
+ offset=32;
+ ptr_struct->max_size = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
+}
+
+void cibfw_image_size_print(const struct cibfw_image_size *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== cibfw_image_size ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_step : "UH_FMT"\n", ptr_struct->log_step);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_size : "U32H_FMT"\n", ptr_struct->max_size);
+
+}
+
+int cibfw_image_size_size(void){
+ return 8;
+}
+
+void cibfw_image_size_dump(const struct cibfw_image_size *ptr_struct, FILE* file) {
+ cibfw_image_size_print(ptr_struct, file, 0);
+}
+
void cibfw_TRIPPLE_VERSION_pack(const struct cibfw_TRIPPLE_VERSION *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)ptr_struct;
(void)ptr_buff;
+ offset=8;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->minor_version);
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->major_version);
+
offset=32;
cibfw_FW_VERSION_pack(&(ptr_struct->FW_VERSION), ptr_buff + offset/8);
adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->vsd[i]);
}
+ offset=2112;
+ cibfw_image_size_pack(&(ptr_struct->image_size), ptr_buff + offset/8);
+
for (i=0; i < 4; i++) {
offset=adb2c_calc_array_field_address(2240, 32, i, 8192, 1);
adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->supported_hw_id[i]);
(void)ptr_struct;
(void)ptr_buff;
+ offset=8;
+ ptr_struct->minor_version = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+
+ offset=0;
+ ptr_struct->major_version = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+
offset=32;
cibfw_FW_VERSION_unpack(&(ptr_struct->FW_VERSION), ptr_buff + offset/8);
}
ptr_struct->vsd[208] = '\0';
+ offset=2112;
+ cibfw_image_size_unpack(&(ptr_struct->image_size), ptr_buff + offset/8);
+
for (i=0; i < 4; i++) {
offset=adb2c_calc_array_field_address(2240, 32, i, 8192, 1);
ptr_struct->supported_hw_id[i] = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
(void)file;
(void)indent_level;
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "minor_version : "UH_FMT"\n", ptr_struct->minor_version);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "major_version : "UH_FMT"\n", ptr_struct->major_version);
+
adb2c_add_indentation(file, indent_level);
fprintf(file, "FW_VERSION:\n");
cibfw_FW_VERSION_print(&(ptr_struct->FW_VERSION), file, indent_level + 1);
fprintf(file, "vsd_vendor_id : "UH_FMT"\n", ptr_struct->vsd_vendor_id);
fprintf(file, "vsd : \"%s\"\n", ptr_struct->vsd);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "image_size:\n");
+ cibfw_image_size_print(&(ptr_struct->image_size), file, indent_level + 1);
+
for (i=0; i < 4; i++) {
adb2c_add_indentation(file, indent_level);
fprintf(file, "supported_hw_id_%03d : "U32H_FMT"\n", i, ptr_struct->supported_hw_id[i]);
*/
/***
- *** This file was generated at "2015-02-05 17:00:49"
+ *** This file was generated at "2015-06-17 12:05:15"
*** by:
*** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/cibfw/cibfw.adb --file-prefix cibfw --prefix cibfw_
***/
struct cibfw_module_version mad;
};
+/* Description - */
+/* Size in bytes - 8 */
+struct cibfw_image_size {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - log of next address in bytes to search for an image. Address in bytes is 2^log_step */
+ /* 0.0 - 0.7 */
+ u_int8_t log_step;
+/*---------------- DWORD[1] (Offset 0x4) ----------------*/
+ /* Description - Max possible size in bytes of image. Image read / write should not occure beyond this address */
+ /* 4.0 - 8.31 */
+ u_int32_t max_size;
+};
+
/* Description - */
/* Size in bytes - 8 */
struct cibfw_TRIPPLE_VERSION {
/* Description - */
/* Size in bytes - 1024 */
struct cibfw_image_info {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - IMAGE_INFO section minor version */
+ /* 0.16 - 0.23 */
+ u_int8_t minor_version;
+ /* Description - IMAGE_INFO section major version */
+ /* 0.24 - 4.31 */
+ u_int8_t major_version;
/*---------------- DWORD[1] (Offset 0x4) ----------------*/
/* Description - */
/* 4.0 - 20.31 */
/* Description - */
/* 56.24 - 264.23 */
char vsd[209];
+/*---------------- DWORD[66] (Offset 0x108) ----------------*/
+ /* Description - image size parameters */
+ /* 264.0 - 272.31 */
+ struct cibfw_image_size image_size;
/*---------------- DWORD[70] (Offset 0x118) ----------------*/
/* Description - HW device(s) supported by this FW image.
0 means invalid entry.
int cibfw_uint64_size(void);
#define CIBFW_UINT64_SIZE (0x8)
void cibfw_uint64_dump(const struct cibfw_uint64 *ptr_struct, FILE* file);
-;
/* module_version */
void cibfw_module_version_pack(const struct cibfw_module_version *ptr_struct, u_int8_t* ptr_buff);
void cibfw_module_version_unpack(struct cibfw_module_version *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_module_version_size(void);
#define CIBFW_MODULE_VERSION_SIZE (0x4)
void cibfw_module_version_dump(const struct cibfw_module_version *ptr_struct, FILE* file);
-;
/* uid_entry */
void cibfw_uid_entry_pack(const struct cibfw_uid_entry *ptr_struct, u_int8_t* ptr_buff);
void cibfw_uid_entry_unpack(struct cibfw_uid_entry *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_uid_entry_size(void);
#define CIBFW_UID_ENTRY_SIZE (0x10)
void cibfw_uid_entry_dump(const struct cibfw_uid_entry *ptr_struct, FILE* file);
-;
/* module_versions */
void cibfw_module_versions_pack(const struct cibfw_module_versions *ptr_struct, u_int8_t* ptr_buff);
void cibfw_module_versions_unpack(struct cibfw_module_versions *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_module_versions_size(void);
#define CIBFW_MODULE_VERSIONS_SIZE (0x40)
void cibfw_module_versions_dump(const struct cibfw_module_versions *ptr_struct, FILE* file);
-;
+/* image_size */
+void cibfw_image_size_pack(const struct cibfw_image_size *ptr_struct, u_int8_t* ptr_buff);
+void cibfw_image_size_unpack(struct cibfw_image_size *ptr_struct, const u_int8_t* ptr_buff);
+void cibfw_image_size_print(const struct cibfw_image_size *ptr_struct, FILE* file, int indent_level);
+int cibfw_image_size_size(void);
+#define CIBFW_IMAGE_SIZE_SIZE (0x8)
+void cibfw_image_size_dump(const struct cibfw_image_size *ptr_struct, FILE* file);
/* TRIPPLE_VERSION */
void cibfw_TRIPPLE_VERSION_pack(const struct cibfw_TRIPPLE_VERSION *ptr_struct, u_int8_t* ptr_buff);
void cibfw_TRIPPLE_VERSION_unpack(struct cibfw_TRIPPLE_VERSION *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_TRIPPLE_VERSION_size(void);
#define CIBFW_TRIPPLE_VERSION_SIZE (0x8)
void cibfw_TRIPPLE_VERSION_dump(const struct cibfw_TRIPPLE_VERSION *ptr_struct, FILE* file);
-;
/* FW_VERSION */
void cibfw_FW_VERSION_pack(const struct cibfw_FW_VERSION *ptr_struct, u_int8_t* ptr_buff);
void cibfw_FW_VERSION_unpack(struct cibfw_FW_VERSION *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_FW_VERSION_size(void);
#define CIBFW_FW_VERSION_SIZE (0x10)
void cibfw_FW_VERSION_dump(const struct cibfw_FW_VERSION *ptr_struct, FILE* file);
-;
/* guids */
void cibfw_guids_pack(const struct cibfw_guids *ptr_struct, u_int8_t* ptr_buff);
void cibfw_guids_unpack(struct cibfw_guids *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_guids_size(void);
#define CIBFW_GUIDS_SIZE (0x40)
void cibfw_guids_dump(const struct cibfw_guids *ptr_struct, FILE* file);
-;
/* operation_key */
void cibfw_operation_key_pack(const struct cibfw_operation_key *ptr_struct, u_int8_t* ptr_buff);
void cibfw_operation_key_unpack(struct cibfw_operation_key *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_operation_key_size(void);
#define CIBFW_OPERATION_KEY_SIZE (0x10)
void cibfw_operation_key_dump(const struct cibfw_operation_key *ptr_struct, FILE* file);
-;
/* image_info */
void cibfw_image_info_pack(const struct cibfw_image_info *ptr_struct, u_int8_t* ptr_buff);
void cibfw_image_info_unpack(struct cibfw_image_info *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_image_info_size(void);
#define CIBFW_IMAGE_INFO_SIZE (0x400)
void cibfw_image_info_dump(const struct cibfw_image_info *ptr_struct, FILE* file);
-;
/* mfg_info */
void cibfw_mfg_info_pack(const struct cibfw_mfg_info *ptr_struct, u_int8_t* ptr_buff);
void cibfw_mfg_info_unpack(struct cibfw_mfg_info *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_mfg_info_size(void);
#define CIBFW_MFG_INFO_SIZE (0x140)
void cibfw_mfg_info_dump(const struct cibfw_mfg_info *ptr_struct, FILE* file);
-;
/* device_info */
void cibfw_device_info_pack(const struct cibfw_device_info *ptr_struct, u_int8_t* ptr_buff);
void cibfw_device_info_unpack(struct cibfw_device_info *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_device_info_size(void);
#define CIBFW_DEVICE_INFO_SIZE (0x200)
void cibfw_device_info_dump(const struct cibfw_device_info *ptr_struct, FILE* file);
-;
/* register_mfrl */
void cibfw_register_mfrl_pack(const struct cibfw_register_mfrl *ptr_struct, u_int8_t* ptr_buff);
void cibfw_register_mfrl_unpack(struct cibfw_register_mfrl *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_register_mfrl_size(void);
#define CIBFW_REGISTER_MFRL_SIZE (0x10)
void cibfw_register_mfrl_dump(const struct cibfw_register_mfrl *ptr_struct, FILE* file);
-;
/* itoc_header */
void cibfw_itoc_header_pack(const struct cibfw_itoc_header *ptr_struct, u_int8_t* ptr_buff);
void cibfw_itoc_header_unpack(struct cibfw_itoc_header *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_itoc_header_size(void);
#define CIBFW_ITOC_HEADER_SIZE (0x20)
void cibfw_itoc_header_dump(const struct cibfw_itoc_header *ptr_struct, FILE* file);
-;
/* itoc_entry */
void cibfw_itoc_entry_pack(const struct cibfw_itoc_entry *ptr_struct, u_int8_t* ptr_buff);
void cibfw_itoc_entry_unpack(struct cibfw_itoc_entry *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_itoc_entry_size(void);
#define CIBFW_ITOC_ENTRY_SIZE (0x20)
void cibfw_itoc_entry_dump(const struct cibfw_itoc_entry *ptr_struct, FILE* file);
-;
/* register_mfai */
void cibfw_register_mfai_pack(const struct cibfw_register_mfai *ptr_struct, u_int8_t* ptr_buff);
void cibfw_register_mfai_unpack(struct cibfw_register_mfai *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_register_mfai_size(void);
#define CIBFW_REGISTER_MFAI_SIZE (0x10)
void cibfw_register_mfai_dump(const struct cibfw_register_mfai *ptr_struct, FILE* file);
-;
/* cibfw_Nodes */
void cibfw_cibfw_Nodes_pack(const union cibfw_cibfw_Nodes *ptr_struct, u_int8_t* ptr_buff);
void cibfw_cibfw_Nodes_unpack(union cibfw_cibfw_Nodes *ptr_struct, const u_int8_t* ptr_buff);
int cibfw_cibfw_Nodes_size(void);
#define CIBFW_CIBFW_NODES_SIZE (0x400)
void cibfw_cibfw_Nodes_dump(const union cibfw_cibfw_Nodes *ptr_struct, FILE* file);
-;
#ifdef __cplusplus
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
+
/***
*** This file was generated at "2015-04-20 13:45:40"
*/
/***
- *** This file was generated at "2015-02-05 17:01:35"
+ *** This file was generated at "2015-06-17 12:05:44"
*** by:
*** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/register_access_open/register_access_open.adb --file-prefix register_access_open --prefix register_access_
***/
int register_access_mfba_size(void);
#define REGISTER_ACCESS_MFBA_SIZE (0x10c)
void register_access_mfba_dump(const struct register_access_mfba *ptr_struct, FILE* file);
-;
/* mfpa */
void register_access_mfpa_pack(const struct register_access_mfpa *ptr_struct, u_int8_t* ptr_buff);
void register_access_mfpa_unpack(struct register_access_mfpa *ptr_struct, const u_int8_t* ptr_buff);
int register_access_mfpa_size(void);
#define REGISTER_ACCESS_MFPA_SIZE (0x24)
void register_access_mfpa_dump(const struct register_access_mfpa *ptr_struct, FILE* file);
-;
/* mfbe */
void register_access_mfbe_pack(const struct register_access_mfbe *ptr_struct, u_int8_t* ptr_buff);
void register_access_mfbe_unpack(struct register_access_mfbe *ptr_struct, const u_int8_t* ptr_buff);
int register_access_mfbe_size(void);
#define REGISTER_ACCESS_MFBE_SIZE (0xc)
void register_access_mfbe_dump(const struct register_access_mfbe *ptr_struct, FILE* file);
-;
/* register_access_open_Nodes */
void register_access_register_access_open_Nodes_pack(const union register_access_register_access_open_Nodes *ptr_struct, u_int8_t* ptr_buff);
void register_access_register_access_open_Nodes_unpack(union register_access_register_access_open_Nodes *ptr_struct, const u_int8_t* ptr_buff);
int register_access_register_access_open_Nodes_size(void);
#define REGISTER_ACCESS_REGISTER_ACCESS_OPEN_NODES_SIZE (0x10c)
void register_access_register_access_open_Nodes_dump(const union register_access_register_access_open_Nodes *ptr_struct, FILE* file);
-;
#ifdef __cplusplus
*/
/***
- *** This file was generated at "2015-02-05 17:00:28"
+ *** This file was generated at "2015-06-17 12:04:46"
*** by:
*** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/register_access/register_access_sib.adb --file-prefix register_access_sib --prefix register_access_sib_
***/
offset=144;
adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->temperature_threshold_lo);
- offset=160;
- adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->name_lo);
-
offset=192;
adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->name_hi);
+ offset=224;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->name_lo);
+
}
void register_access_sib_mtmp_unpack(struct register_access_sib_mtmp *ptr_struct, const u_int8_t* ptr_buff){
offset=144;
ptr_struct->temperature_threshold_lo = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
- offset=160;
- ptr_struct->name_lo = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
-
offset=192;
ptr_struct->name_hi = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+ offset=224;
+ ptr_struct->name_lo = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
}
void register_access_sib_mtmp_print(const struct register_access_sib_mtmp *ptr_struct, FILE* file, int indent_level){
fprintf(file, "temperature_threshold_lo : "UH_FMT"\n", ptr_struct->temperature_threshold_lo);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "name_lo : "U32H_FMT"\n", ptr_struct->name_lo);
+ fprintf(file, "name_hi : "U32H_FMT"\n", ptr_struct->name_hi);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "name_hi : "U32H_FMT"\n", ptr_struct->name_hi);
+ fprintf(file, "name_lo : "U32H_FMT"\n", ptr_struct->name_lo);
}
int register_access_sib_mtmp_size(void){
- return 28;
+ return 32;
}
void register_access_sib_mtmp_dump(const struct register_access_sib_mtmp *ptr_struct, FILE* file) {
*/
/***
- *** This file was generated at "2015-02-05 17:00:28"
+ *** This file was generated at "2015-06-17 12:04:46"
*** by:
*** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/register_access/register_access_sib.adb --file-prefix register_access_sib --prefix register_access_sib_
***/
};
/* Description - */
-/* Size in bytes - 28 */
+/* Size in bytes - 32 */
struct register_access_sib_mtmp {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - Sensors index to access */
/* Description - */
/* 16.0 - 16.15 */
u_int16_t temperature_threshold_lo;
-/*---------------- DWORD[5] (Offset 0x14) ----------------*/
- /* Description - */
- /* 20.0 - 24.31 */
- u_int32_t name_lo;
/*---------------- DWORD[6] (Offset 0x18) ----------------*/
/* Description - */
/* 24.0 - 28.31 */
u_int32_t name_hi;
+/*---------------- DWORD[7] (Offset 0x1c) ----------------*/
+ /* Description - */
+ /* 28.0 - 32.31 */
+ u_int32_t name_lo;
};
/* Description - */
union register_access_sib_register_access_sib_Nodes {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
- /* 0.0 - 28.31 */
+ /* 0.0 - 32.31 */
struct register_access_sib_mtmp mtmp;
/* Description - */
/* 0.0 - 128.31 */
int register_access_sib_IB_PSID__size(void);
#define REGISTER_ACCESS_SIB_IB_PSID__SIZE (0x10)
void register_access_sib_IB_PSID__dump(const struct register_access_sib_IB_PSID_ *ptr_struct, FILE* file);
-;
/* IB_SWInfo_ */
void register_access_sib_IB_SWInfo__pack(const struct register_access_sib_IB_SWInfo_ *ptr_struct, u_int8_t* ptr_buff);
void register_access_sib_IB_SWInfo__unpack(struct register_access_sib_IB_SWInfo_ *ptr_struct, const u_int8_t* ptr_buff);
int register_access_sib_IB_SWInfo__size(void);
#define REGISTER_ACCESS_SIB_IB_SWINFO__SIZE (0x20)
void register_access_sib_IB_SWInfo__dump(const struct register_access_sib_IB_SWInfo_ *ptr_struct, FILE* file);
-;
/* IB_FWInfo_ */
void register_access_sib_IB_FWInfo__pack(const struct register_access_sib_IB_FWInfo_ *ptr_struct, u_int8_t* ptr_buff);
void register_access_sib_IB_FWInfo__unpack(struct register_access_sib_IB_FWInfo_ *ptr_struct, const u_int8_t* ptr_buff);
int register_access_sib_IB_FWInfo__size(void);
#define REGISTER_ACCESS_SIB_IB_FWINFO__SIZE (0x40)
void register_access_sib_IB_FWInfo__dump(const struct register_access_sib_IB_FWInfo_ *ptr_struct, FILE* file);
-;
/* IB_HWInfo_ */
void register_access_sib_IB_HWInfo__pack(const struct register_access_sib_IB_HWInfo_ *ptr_struct, u_int8_t* ptr_buff);
void register_access_sib_IB_HWInfo__unpack(struct register_access_sib_IB_HWInfo_ *ptr_struct, const u_int8_t* ptr_buff);
int register_access_sib_IB_HWInfo__size(void);
#define REGISTER_ACCESS_SIB_IB_HWINFO__SIZE (0x20)
void register_access_sib_IB_HWInfo__dump(const struct register_access_sib_IB_HWInfo_ *ptr_struct, FILE* file);
-;
/* mgir */
void register_access_sib_mgir_pack(const struct register_access_sib_mgir *ptr_struct, u_int8_t* ptr_buff);
void register_access_sib_mgir_unpack(struct register_access_sib_mgir *ptr_struct, const u_int8_t* ptr_buff);
int register_access_sib_mgir_size(void);
#define REGISTER_ACCESS_SIB_MGIR_SIZE (0x80)
void register_access_sib_mgir_dump(const struct register_access_sib_mgir *ptr_struct, FILE* file);
-;
/* mtmp */
void register_access_sib_mtmp_pack(const struct register_access_sib_mtmp *ptr_struct, u_int8_t* ptr_buff);
void register_access_sib_mtmp_unpack(struct register_access_sib_mtmp *ptr_struct, const u_int8_t* ptr_buff);
void register_access_sib_mtmp_print(const struct register_access_sib_mtmp *ptr_struct, FILE* file, int indent_level);
int register_access_sib_mtmp_size(void);
-#define REGISTER_ACCESS_SIB_MTMP_SIZE (0x1c)
+#define REGISTER_ACCESS_SIB_MTMP_SIZE (0x20)
void register_access_sib_mtmp_dump(const struct register_access_sib_mtmp *ptr_struct, FILE* file);
-;
/* register_access_sib_Nodes */
void register_access_sib_register_access_sib_Nodes_pack(const union register_access_sib_register_access_sib_Nodes *ptr_struct, u_int8_t* ptr_buff);
void register_access_sib_register_access_sib_Nodes_unpack(union register_access_sib_register_access_sib_Nodes *ptr_struct, const u_int8_t* ptr_buff);
int register_access_sib_register_access_sib_Nodes_size(void);
#define REGISTER_ACCESS_SIB_REGISTER_ACCESS_SIB_NODES_SIZE (0x80)
void register_access_sib_register_access_sib_Nodes_dump(const union register_access_sib_register_access_sib_Nodes *ptr_struct, FILE* file);
-;
#ifdef __cplusplus
*/
/***
- *** This file was generated at "2015-06-16 07:00:30"
+ *** This file was generated at "2015-08-31 18:48:47"
*** by:
*** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/tools_open/tools_open.adb --file-prefix tools_open --prefix tools_open_
***/
tools_open_tlv_type_dw_print(ptr_struct, file, 0);
}
-void tools_open_eswitch_type_pack(const struct tools_open_eswitch_type *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_per_port_type_pack(const struct tools_open_per_port_type *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
offset=16;
adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->param_idx);
- offset=14;
- adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->port);
-
offset=8;
- adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->host);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->port);
offset=0;
adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->param_class);
}
-void tools_open_eswitch_type_unpack(struct tools_open_eswitch_type *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_per_port_type_unpack(struct tools_open_per_port_type *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
offset=16;
ptr_struct->param_idx = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
- offset=14;
- ptr_struct->port = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
-
offset=8;
- ptr_struct->host = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
+ ptr_struct->port = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
offset=0;
ptr_struct->param_class = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
}
-void tools_open_eswitch_type_print(const struct tools_open_eswitch_type *ptr_struct, FILE* file, int indent_level){
+void tools_open_per_port_type_print(const struct tools_open_per_port_type *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_eswitch_type ========\n");
+ fprintf(file, "======== tools_open_per_port_type ========\n");
int i=0;
(void)i;(void)ptr_struct;
(void)file;
adb2c_add_indentation(file, indent_level);
fprintf(file, "port : "UH_FMT"\n", ptr_struct->port);
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "host : "UH_FMT"\n", ptr_struct->host);
-
adb2c_add_indentation(file, indent_level);
fprintf(file, "param_class : "UH_FMT"\n", ptr_struct->param_class);
}
-int tools_open_eswitch_type_size(void){
+int tools_open_per_port_type_size(void){
return 4;
}
-void tools_open_eswitch_type_dump(const struct tools_open_eswitch_type *ptr_struct, FILE* file) {
- tools_open_eswitch_type_print(ptr_struct, file, 0);
+void tools_open_per_port_type_dump(const struct tools_open_per_port_type *ptr_struct, FILE* file) {
+ tools_open_per_port_type_print(ptr_struct, file, 0);
}
-void tools_open_per_host_type_pack(const struct tools_open_per_host_type *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_bmc_type_pack(const struct tools_open_bmc_type *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
(void)ptr_struct;
(void)ptr_buff;
- offset=22;
- adb2c_push_bits_to_buff(ptr_buff, offset, 10, (u_int32_t)ptr_struct->param_idx);
+ offset=19;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 13, (u_int32_t)ptr_struct->param_idx);
offset=14;
- adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->function);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 5, (u_int32_t)ptr_struct->channel);
offset=8;
adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->host);
}
-void tools_open_per_host_type_unpack(struct tools_open_per_host_type *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_bmc_type_unpack(struct tools_open_bmc_type *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
(void)ptr_struct;
(void)ptr_buff;
- offset=22;
- ptr_struct->param_idx = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 10);
+ offset=19;
+ ptr_struct->param_idx = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 13);
offset=14;
- ptr_struct->function = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+ ptr_struct->channel = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 5);
offset=8;
ptr_struct->host = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
}
-void tools_open_per_host_type_print(const struct tools_open_per_host_type *ptr_struct, FILE* file, int indent_level){
+void tools_open_bmc_type_print(const struct tools_open_bmc_type *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_per_host_type ========\n");
+ fprintf(file, "======== tools_open_bmc_type ========\n");
int i=0;
(void)i;(void)ptr_struct;
(void)file;
fprintf(file, "param_idx : "UH_FMT"\n", ptr_struct->param_idx);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "function : "UH_FMT"\n", ptr_struct->function);
+ fprintf(file, "channel : "UH_FMT"\n", ptr_struct->channel);
adb2c_add_indentation(file, indent_level);
fprintf(file, "host : "UH_FMT"\n", ptr_struct->host);
}
-int tools_open_per_host_type_size(void){
+int tools_open_bmc_type_size(void){
return 4;
}
-void tools_open_per_host_type_dump(const struct tools_open_per_host_type *ptr_struct, FILE* file) {
- tools_open_per_host_type_print(ptr_struct, file, 0);
+void tools_open_bmc_type_dump(const struct tools_open_bmc_type *ptr_struct, FILE* file) {
+ tools_open_bmc_type_print(ptr_struct, file, 0);
}
-void tools_open_bmc_type_pack(const struct tools_open_bmc_type *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_per_host_type_pack(const struct tools_open_per_host_type *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
(void)ptr_struct;
(void)ptr_buff;
- offset=19;
- adb2c_push_bits_to_buff(ptr_buff, offset, 13, (u_int32_t)ptr_struct->param_idx);
+ offset=22;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 10, (u_int32_t)ptr_struct->param_idx);
offset=14;
- adb2c_push_bits_to_buff(ptr_buff, offset, 5, (u_int32_t)ptr_struct->channel);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->function);
offset=8;
adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->host);
}
-void tools_open_bmc_type_unpack(struct tools_open_bmc_type *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_per_host_type_unpack(struct tools_open_per_host_type *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
(void)ptr_struct;
(void)ptr_buff;
- offset=19;
- ptr_struct->param_idx = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 13);
+ offset=22;
+ ptr_struct->param_idx = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 10);
offset=14;
- ptr_struct->channel = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 5);
+ ptr_struct->function = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
offset=8;
ptr_struct->host = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
}
-void tools_open_bmc_type_print(const struct tools_open_bmc_type *ptr_struct, FILE* file, int indent_level){
+void tools_open_per_host_type_print(const struct tools_open_per_host_type *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_bmc_type ========\n");
+ fprintf(file, "======== tools_open_per_host_type ========\n");
int i=0;
(void)i;(void)ptr_struct;
(void)file;
fprintf(file, "param_idx : "UH_FMT"\n", ptr_struct->param_idx);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "channel : "UH_FMT"\n", ptr_struct->channel);
+ fprintf(file, "function : "UH_FMT"\n", ptr_struct->function);
adb2c_add_indentation(file, indent_level);
fprintf(file, "host : "UH_FMT"\n", ptr_struct->host);
}
-int tools_open_bmc_type_size(void){
+int tools_open_per_host_type_size(void){
return 4;
}
-void tools_open_bmc_type_dump(const struct tools_open_bmc_type *ptr_struct, FILE* file) {
- tools_open_bmc_type_print(ptr_struct, file, 0);
+void tools_open_per_host_type_dump(const struct tools_open_per_host_type *ptr_struct, FILE* file) {
+ tools_open_per_host_type_print(ptr_struct, file, 0);
}
-void tools_open_per_port_type_pack(const struct tools_open_per_port_type *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_eswitch_type_pack(const struct tools_open_eswitch_type *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
offset=16;
adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->param_idx);
+ offset=14;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->port);
+
offset=8;
- adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->port);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->host);
offset=0;
adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->param_class);
}
-void tools_open_per_port_type_unpack(struct tools_open_per_port_type *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_eswitch_type_unpack(struct tools_open_eswitch_type *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
offset=16;
ptr_struct->param_idx = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
+ offset=14;
+ ptr_struct->port = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
+
offset=8;
- ptr_struct->port = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+ ptr_struct->host = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
offset=0;
ptr_struct->param_class = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
}
-void tools_open_per_port_type_print(const struct tools_open_per_port_type *ptr_struct, FILE* file, int indent_level){
+void tools_open_eswitch_type_print(const struct tools_open_eswitch_type *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_per_port_type ========\n");
+ fprintf(file, "======== tools_open_eswitch_type ========\n");
int i=0;
(void)i;(void)ptr_struct;
(void)file;
adb2c_add_indentation(file, indent_level);
fprintf(file, "port : "UH_FMT"\n", ptr_struct->port);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "host : "UH_FMT"\n", ptr_struct->host);
+
adb2c_add_indentation(file, indent_level);
fprintf(file, "param_class : "UH_FMT"\n", ptr_struct->param_class);
}
-int tools_open_per_port_type_size(void){
+int tools_open_eswitch_type_size(void){
return 4;
}
-void tools_open_per_port_type_dump(const struct tools_open_per_port_type *ptr_struct, FILE* file) {
- tools_open_per_port_type_print(ptr_struct, file, 0);
+void tools_open_eswitch_type_dump(const struct tools_open_eswitch_type *ptr_struct, FILE* file) {
+ tools_open_eswitch_type_print(ptr_struct, file, 0);
}
void tools_open_global_type_pack(const struct tools_open_global_type *ptr_struct, u_int8_t* ptr_buff){
tools_open_global_type_print(&(ptr_struct->global), file, indent_level + 1);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "per_port:\n");
- tools_open_per_port_type_print(&(ptr_struct->per_port), file, indent_level + 1);
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "bmc:\n");
- tools_open_bmc_type_print(&(ptr_struct->bmc), file, indent_level + 1);
+ fprintf(file, "eswitch:\n");
+ tools_open_eswitch_type_print(&(ptr_struct->eswitch), file, indent_level + 1);
adb2c_add_indentation(file, indent_level);
fprintf(file, "per_host:\n");
tools_open_per_host_type_print(&(ptr_struct->per_host), file, indent_level + 1);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "eswitch:\n");
- tools_open_eswitch_type_print(&(ptr_struct->eswitch), file, indent_level + 1);
+ fprintf(file, "bmc:\n");
+ tools_open_bmc_type_print(&(ptr_struct->bmc), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "per_port:\n");
+ tools_open_per_port_type_print(&(ptr_struct->per_port), file, indent_level + 1);
adb2c_add_indentation(file, indent_level);
fprintf(file, "tlv_type_dw:\n");
tools_open_pmdio_addr_data_print(ptr_struct, file, 0);
}
-void tools_open_nv_hdr_pack(const struct tools_open_nv_hdr *ptr_struct, u_int8_t* ptr_buff){
- u_int32_t offset;
- int i=0;
- (void)offset;
- (void)i;
- (void)ptr_struct;
- (void)ptr_buff;
-
- offset=16;
- adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->type);
-
- offset=2;
- adb2c_push_bits_to_buff(ptr_buff, offset, 12, (u_int32_t)ptr_struct->length);
-
- offset=40;
- adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->type_mod);
-
- offset=39;
- adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->shadow);
-
- offset=37;
- adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->pad_cnt);
-
- offset=32;
- adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->version);
-
-}
-
-void tools_open_nv_hdr_unpack(struct tools_open_nv_hdr *ptr_struct, const u_int8_t* ptr_buff){
- u_int32_t offset;
- int i=0;
- u_int8_t val=0;
- (void)val;
- (void)offset;
- (void)i;
- (void)ptr_struct;
- (void)ptr_buff;
-
- offset=16;
- ptr_struct->type = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
-
- offset=2;
- ptr_struct->length = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 12);
-
- offset=40;
- ptr_struct->type_mod = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
-
- offset=39;
- ptr_struct->shadow = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
-
- offset=37;
- ptr_struct->pad_cnt = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
-
- offset=32;
- ptr_struct->version = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
-
-}
-
-void tools_open_nv_hdr_print(const struct tools_open_nv_hdr *ptr_struct, FILE* file, int indent_level){
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_nv_hdr ========\n");
- int i=0;
- (void)i;(void)ptr_struct;
- (void)file;
- (void)indent_level;
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "type : "UH_FMT"\n", ptr_struct->type);
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "length : "UH_FMT"\n", ptr_struct->length);
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "type_mod : "UH_FMT"\n", ptr_struct->type_mod);
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "shadow : "UH_FMT"\n", ptr_struct->shadow);
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "pad_cnt : "UH_FMT"\n", ptr_struct->pad_cnt);
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "version : "UH_FMT"\n", ptr_struct->version);
-
-}
-
-int tools_open_nv_hdr_size(void){
- return 8;
-}
-
-void tools_open_nv_hdr_dump(const struct tools_open_nv_hdr *ptr_struct, FILE* file) {
- tools_open_nv_hdr_print(ptr_struct, file, 0);
-}
-
void tools_open_nv_hdr_fifth_gen_pack(const struct tools_open_nv_hdr_fifth_gen *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
tools_open_nv_hdr_fifth_gen_print(ptr_struct, file, 0);
}
-void tools_open_pmdio_pack(const struct tools_open_pmdio *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_nv_hdr_pack(const struct tools_open_nv_hdr *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
(void)ptr_struct;
(void)ptr_buff;
- offset=29;
- adb2c_push_bits_to_buff(ptr_buff, offset, 3, (u_int32_t)ptr_struct->operation);
-
- offset=22;
- adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->clause);
-
- offset=8;
- adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->local_port);
+ offset=16;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->type);
- offset=0;
- adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->lock);
+ offset=2;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 12, (u_int32_t)ptr_struct->length);
- offset=59;
- adb2c_push_bits_to_buff(ptr_buff, offset, 5, (u_int32_t)ptr_struct->reg_adr_mmd);
+ offset=40;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->type_mod);
- offset=48;
- adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->last_op_idx);
+ offset=39;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->shadow);
- offset=40;
- adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->num_ops_done);
+ offset=37;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->pad_cnt);
- for (i=0; i < 64; i++) {
- offset=adb2c_calc_array_field_address(64, 32, i, 2112, 1);
- tools_open_pmdio_addr_data_pack(&(ptr_struct->mdio_trans[i]), ptr_buff + offset/8);
- }
+ offset=32;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->version);
}
-void tools_open_pmdio_unpack(struct tools_open_pmdio *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_nv_hdr_unpack(struct tools_open_nv_hdr *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=16;
+ ptr_struct->type = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
+
+ offset=2;
+ ptr_struct->length = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 12);
+
+ offset=40;
+ ptr_struct->type_mod = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+
+ offset=39;
+ ptr_struct->shadow = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=37;
+ ptr_struct->pad_cnt = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
+
+ offset=32;
+ ptr_struct->version = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
+
+}
+
+void tools_open_nv_hdr_print(const struct tools_open_nv_hdr *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_nv_hdr ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "type : "UH_FMT"\n", ptr_struct->type);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "length : "UH_FMT"\n", ptr_struct->length);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "type_mod : "UH_FMT"\n", ptr_struct->type_mod);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "shadow : "UH_FMT"\n", ptr_struct->shadow);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "pad_cnt : "UH_FMT"\n", ptr_struct->pad_cnt);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "version : "UH_FMT"\n", ptr_struct->version);
+
+}
+
+int tools_open_nv_hdr_size(void){
+ return 8;
+}
+
+void tools_open_nv_hdr_dump(const struct tools_open_nv_hdr *ptr_struct, FILE* file) {
+ tools_open_nv_hdr_print(ptr_struct, file, 0);
+}
+
+void tools_open_pmdio_pack(const struct tools_open_pmdio *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=29;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 3, (u_int32_t)ptr_struct->operation);
+
+ offset=22;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->clause);
+
+ offset=8;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->local_port);
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->lock);
+
+ offset=59;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 5, (u_int32_t)ptr_struct->reg_adr_mmd);
+
+ offset=48;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->last_op_idx);
+
+ offset=40;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->num_ops_done);
+
+ for (i=0; i < 64; i++) {
+ offset=adb2c_calc_array_field_address(64, 32, i, 2112, 1);
+ tools_open_pmdio_addr_data_pack(&(ptr_struct->mdio_trans[i]), ptr_buff + offset/8);
+ }
+
+}
+
+void tools_open_pmdio_unpack(struct tools_open_pmdio *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
tools_open_pmdic_print(ptr_struct, file, 0);
}
-void tools_open_mnvi_pack(const struct tools_open_mnvi *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_nvdi_pack(const struct tools_open_nvdi *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
(void)ptr_buff;
offset=0;
- tools_open_nv_hdr_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+ tools_open_nv_hdr_fifth_gen_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
}
-void tools_open_mnvi_unpack(struct tools_open_mnvi *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_nvdi_unpack(struct tools_open_nvdi *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
(void)ptr_buff;
offset=0;
- tools_open_nv_hdr_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+ tools_open_nv_hdr_fifth_gen_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
}
-void tools_open_mnvi_print(const struct tools_open_mnvi *ptr_struct, FILE* file, int indent_level){
+void tools_open_nvdi_print(const struct tools_open_nvdi *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_mnvi ========\n");
+ fprintf(file, "======== tools_open_nvdi ========\n");
int i=0;
(void)i;(void)ptr_struct;
(void)file;
adb2c_add_indentation(file, indent_level);
fprintf(file, "nv_hdr:\n");
- tools_open_nv_hdr_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
+ tools_open_nv_hdr_fifth_gen_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
}
-int tools_open_mnvi_size(void){
- return 8;
+int tools_open_nvdi_size(void){
+ return 12;
}
-void tools_open_mnvi_dump(const struct tools_open_mnvi *ptr_struct, FILE* file) {
- tools_open_mnvi_print(ptr_struct, file, 0);
+void tools_open_nvdi_dump(const struct tools_open_nvdi *ptr_struct, FILE* file) {
+ tools_open_nvdi_print(ptr_struct, file, 0);
}
-void tools_open_mnvia_pack(const struct tools_open_mnvia *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_nvda_pack(const struct tools_open_nvda *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
(void)ptr_buff;
offset=0;
- tools_open_nv_hdr_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+ tools_open_nv_hdr_fifth_gen_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+
+ for (i=0; i < 128; i++) {
+ offset=adb2c_calc_array_field_address(120, 8, i, 2048, 1);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->data[i]);
+ }
}
-void tools_open_mnvia_unpack(struct tools_open_mnvia *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_nvda_unpack(struct tools_open_nvda *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
(void)ptr_buff;
offset=0;
- tools_open_nv_hdr_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+ tools_open_nv_hdr_fifth_gen_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+
+ for (i=0; i < 128; i++) {
+ offset=adb2c_calc_array_field_address(120, 8, i, 2048, 1);
+ ptr_struct->data[i] = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+ }
}
-void tools_open_mnvia_print(const struct tools_open_mnvia *ptr_struct, FILE* file, int indent_level){
+void tools_open_nvda_print(const struct tools_open_nvda *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_mnvia ========\n");
+ fprintf(file, "======== tools_open_nvda ========\n");
int i=0;
(void)i;(void)ptr_struct;
(void)file;
adb2c_add_indentation(file, indent_level);
fprintf(file, "nv_hdr:\n");
- tools_open_nv_hdr_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
+ tools_open_nv_hdr_fifth_gen_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
+
+ for (i=0; i < 128; i++) {
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "data_%03d : "UH_FMT"\n", i, ptr_struct->data[i]);
+ }
}
-int tools_open_mnvia_size(void){
- return 8;
+int tools_open_nvda_size(void){
+ return 256;
}
-void tools_open_mnvia_dump(const struct tools_open_mnvia *ptr_struct, FILE* file) {
- tools_open_mnvia_print(ptr_struct, file, 0);
+void tools_open_nvda_dump(const struct tools_open_nvda *ptr_struct, FILE* file) {
+ tools_open_nvda_print(ptr_struct, file, 0);
+}
+
+void tools_open_nvia_pack(const struct tools_open_nvia *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=0;
+ tools_open_nv_hdr_fifth_gen_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+
+ offset=125;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 3, (u_int32_t)ptr_struct->target);
+
+}
+
+void tools_open_nvia_unpack(struct tools_open_nvia *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=0;
+ tools_open_nv_hdr_fifth_gen_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+
+ offset=125;
+ ptr_struct->target = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 3);
+
+}
+
+void tools_open_nvia_print(const struct tools_open_nvia *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_nvia ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "nv_hdr:\n");
+ tools_open_nv_hdr_fifth_gen_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "target : "UH_FMT"\n", ptr_struct->target);
+
+}
+
+int tools_open_nvia_size(void){
+ return 20;
+}
+
+void tools_open_nvia_dump(const struct tools_open_nvia *ptr_struct, FILE* file) {
+ tools_open_nvia_print(ptr_struct, file, 0);
}
void tools_open_nvqc_pack(const struct tools_open_nvqc *ptr_struct, u_int8_t* ptr_buff){
tools_open_nvqc_print(ptr_struct, file, 0);
}
-void tools_open_nvdia_pack(const struct tools_open_nvdia *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_mnvia_pack(const struct tools_open_mnvia *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
(void)ptr_buff;
offset=0;
- tools_open_nv_hdr_fifth_gen_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+ tools_open_nv_hdr_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
}
-void tools_open_nvdia_unpack(struct tools_open_nvdia *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_mnvia_unpack(struct tools_open_mnvia *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
(void)ptr_buff;
offset=0;
- tools_open_nv_hdr_fifth_gen_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
+ tools_open_nv_hdr_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
}
-void tools_open_nvdia_print(const struct tools_open_nvdia *ptr_struct, FILE* file, int indent_level){
+void tools_open_mnvia_print(const struct tools_open_mnvia *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_nvdia ========\n");
+ fprintf(file, "======== tools_open_mnvia ========\n");
int i=0;
(void)i;(void)ptr_struct;
(void)file;
adb2c_add_indentation(file, indent_level);
fprintf(file, "nv_hdr:\n");
- tools_open_nv_hdr_fifth_gen_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
+ tools_open_nv_hdr_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
}
-int tools_open_nvdia_size(void){
- return 12;
+int tools_open_mnvia_size(void){
+ return 8;
}
-void tools_open_nvdia_dump(const struct tools_open_nvdia *ptr_struct, FILE* file) {
- tools_open_nvdia_print(ptr_struct, file, 0);
+void tools_open_mnvia_dump(const struct tools_open_mnvia *ptr_struct, FILE* file) {
+ tools_open_mnvia_print(ptr_struct, file, 0);
}
-void tools_open_nvda_pack(const struct tools_open_nvda *ptr_struct, u_int8_t* ptr_buff){
+void tools_open_mnvi_pack(const struct tools_open_mnvi *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
(void)offset;
(void)ptr_buff;
offset=0;
- tools_open_nv_hdr_fifth_gen_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
-
- for (i=0; i < 128; i++) {
- offset=adb2c_calc_array_field_address(120, 8, i, 2048, 1);
- adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->data[i]);
- }
+ tools_open_nv_hdr_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
}
-void tools_open_nvda_unpack(struct tools_open_nvda *ptr_struct, const u_int8_t* ptr_buff){
+void tools_open_mnvi_unpack(struct tools_open_mnvi *ptr_struct, const u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
u_int8_t val=0;
(void)ptr_buff;
offset=0;
- tools_open_nv_hdr_fifth_gen_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
-
- for (i=0; i < 128; i++) {
- offset=adb2c_calc_array_field_address(120, 8, i, 2048, 1);
- ptr_struct->data[i] = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
- }
+ tools_open_nv_hdr_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
}
-void tools_open_nvda_print(const struct tools_open_nvda *ptr_struct, FILE* file, int indent_level){
+void tools_open_mnvi_print(const struct tools_open_mnvi *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_nvda ========\n");
+ fprintf(file, "======== tools_open_mnvi ========\n");
int i=0;
(void)i;(void)ptr_struct;
(void)file;
adb2c_add_indentation(file, indent_level);
fprintf(file, "nv_hdr:\n");
- tools_open_nv_hdr_fifth_gen_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
-
- for (i=0; i < 128; i++) {
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "data_%03d : "UH_FMT"\n", i, ptr_struct->data[i]);
- }
+ tools_open_nv_hdr_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
}
-int tools_open_nvda_size(void){
- return 256;
+int tools_open_mnvi_size(void){
+ return 8;
}
-void tools_open_nvda_dump(const struct tools_open_nvda *ptr_struct, FILE* file) {
- tools_open_nvda_print(ptr_struct, file, 0);
-}
-
-void tools_open_nvdi_pack(const struct tools_open_nvdi *ptr_struct, u_int8_t* ptr_buff){
- u_int32_t offset;
- int i=0;
- (void)offset;
- (void)i;
- (void)ptr_struct;
- (void)ptr_buff;
-
- offset=0;
- tools_open_nv_hdr_fifth_gen_pack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
-
-}
-
-void tools_open_nvdi_unpack(struct tools_open_nvdi *ptr_struct, const u_int8_t* ptr_buff){
- u_int32_t offset;
- int i=0;
- u_int8_t val=0;
- (void)val;
- (void)offset;
- (void)i;
- (void)ptr_struct;
- (void)ptr_buff;
-
- offset=0;
- tools_open_nv_hdr_fifth_gen_unpack(&(ptr_struct->nv_hdr), ptr_buff + offset/8);
-
-}
-
-void tools_open_nvdi_print(const struct tools_open_nvdi *ptr_struct, FILE* file, int indent_level){
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "======== tools_open_nvdi ========\n");
- int i=0;
- (void)i;(void)ptr_struct;
- (void)file;
- (void)indent_level;
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "nv_hdr:\n");
- tools_open_nv_hdr_fifth_gen_print(&(ptr_struct->nv_hdr), file, indent_level + 1);
-
-}
-
-int tools_open_nvdi_size(void){
- return 12;
-}
-
-void tools_open_nvdi_dump(const struct tools_open_nvdi *ptr_struct, FILE* file) {
- tools_open_nvdi_print(ptr_struct, file, 0);
+void tools_open_mnvi_dump(const struct tools_open_mnvi *ptr_struct, FILE* file) {
+ tools_open_mnvi_print(ptr_struct, file, 0);
}
void tools_open_mnva_pack(const struct tools_open_mnva *ptr_struct, u_int8_t* ptr_buff){
(void)ptr_struct;
(void)ptr_buff;
+ offset=13;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->nv_config_vpi);
+
+ offset=12;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->nv_config_wol);
+
offset=0;
adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->fw_default_config_payload_version);
offset=52;
- adb2c_push_bits_to_buff(ptr_buff, offset, 12, (u_int32_t)ptr_struct->boot_vlan);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 12, (u_int32_t)ptr_struct->default_boot_vlan);
offset=44;
- adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->boot_protocol);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->default_boot_protocol);
offset=40;
- adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->boot_retry_cnt);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->default_boot_retry_cnt);
offset=37;
- adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->network_link_type);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->default_network_link_type);
offset=36;
- adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->en_wol_magic);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->default_en_wol_magic);
offset=35;
- adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->boot_vlan_en);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->default_boot_vlan_en);
offset=34;
- adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->boot_option_rom_en);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->default_boot_option_rom_en);
offset=33;
- adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->pprx);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->default_pprx);
offset=32;
- adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->pptx);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->default_pptx);
offset=80;
- adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->boot_pkey);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->default_boot_pkey);
+
+ offset=68;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->nv_config_infiniband_dhcp_settings);
+
+ offset=67;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->nv_config_infiniband_boot_settings);
offset=66;
adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->nv_config_dhcp_iscsi_parameters);
offset=64;
adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->nv_config_boot_parameters);
+ offset=108;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->client_indentifier);
+
+ offset=106;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->mac_admin_bit);
+
offset=104;
adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->iscsi_boot_to_target);
(void)ptr_struct;
(void)ptr_buff;
+ offset=13;
+ ptr_struct->nv_config_vpi = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=12;
+ ptr_struct->nv_config_wol = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
offset=0;
ptr_struct->fw_default_config_payload_version = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
offset=52;
- ptr_struct->boot_vlan = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 12);
+ ptr_struct->default_boot_vlan = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 12);
offset=44;
- ptr_struct->boot_protocol = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
+ ptr_struct->default_boot_protocol = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
offset=40;
- ptr_struct->boot_retry_cnt = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
+ ptr_struct->default_boot_retry_cnt = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
offset=37;
- ptr_struct->network_link_type = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
+ ptr_struct->default_network_link_type = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
offset=36;
- ptr_struct->en_wol_magic = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+ ptr_struct->default_en_wol_magic = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
offset=35;
- ptr_struct->boot_vlan_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+ ptr_struct->default_boot_vlan_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
offset=34;
- ptr_struct->boot_option_rom_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+ ptr_struct->default_boot_option_rom_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
offset=33;
- ptr_struct->pprx = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+ ptr_struct->default_pprx = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
offset=32;
- ptr_struct->pptx = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+ ptr_struct->default_pptx = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
offset=80;
- ptr_struct->boot_pkey = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
+ ptr_struct->default_boot_pkey = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
+
+ offset=68;
+ ptr_struct->nv_config_infiniband_dhcp_settings = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=67;
+ ptr_struct->nv_config_infiniband_boot_settings = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
offset=66;
ptr_struct->nv_config_dhcp_iscsi_parameters = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
offset=64;
ptr_struct->nv_config_boot_parameters = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+ offset=108;
+ ptr_struct->client_indentifier = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
+
+ offset=106;
+ ptr_struct->mac_admin_bit = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
+
offset=104;
ptr_struct->iscsi_boot_to_target = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
(void)file;
(void)indent_level;
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "nv_config_vpi : "UH_FMT"\n", ptr_struct->nv_config_vpi);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "nv_config_wol : "UH_FMT"\n", ptr_struct->nv_config_wol);
+
adb2c_add_indentation(file, indent_level);
fprintf(file, "fw_default_config_payload_version : "UH_FMT"\n", ptr_struct->fw_default_config_payload_version);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "boot_vlan : "UH_FMT"\n", ptr_struct->boot_vlan);
+ fprintf(file, "default_boot_vlan : "UH_FMT"\n", ptr_struct->default_boot_vlan);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "boot_protocol : "UH_FMT"\n", ptr_struct->boot_protocol);
+ fprintf(file, "default_boot_protocol : "UH_FMT"\n", ptr_struct->default_boot_protocol);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "boot_retry_cnt : "UH_FMT"\n", ptr_struct->boot_retry_cnt);
+ fprintf(file, "default_boot_retry_cnt : "UH_FMT"\n", ptr_struct->default_boot_retry_cnt);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "network_link_type : "UH_FMT"\n", ptr_struct->network_link_type);
+ fprintf(file, "default_network_link_type : "UH_FMT"\n", ptr_struct->default_network_link_type);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "en_wol_magic : "UH_FMT"\n", ptr_struct->en_wol_magic);
+ fprintf(file, "default_en_wol_magic : "UH_FMT"\n", ptr_struct->default_en_wol_magic);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "boot_vlan_en : "UH_FMT"\n", ptr_struct->boot_vlan_en);
+ fprintf(file, "default_boot_vlan_en : "UH_FMT"\n", ptr_struct->default_boot_vlan_en);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "boot_option_rom_en : "UH_FMT"\n", ptr_struct->boot_option_rom_en);
+ fprintf(file, "default_boot_option_rom_en : "UH_FMT"\n", ptr_struct->default_boot_option_rom_en);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "pprx : "UH_FMT"\n", ptr_struct->pprx);
+ fprintf(file, "default_pprx : "UH_FMT"\n", ptr_struct->default_pprx);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "pptx : "UH_FMT"\n", ptr_struct->pptx);
+ fprintf(file, "default_pptx : "UH_FMT"\n", ptr_struct->default_pptx);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "boot_pkey : "UH_FMT"\n", ptr_struct->boot_pkey);
+ fprintf(file, "default_boot_pkey : "UH_FMT"\n", ptr_struct->default_boot_pkey);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "nv_config_infiniband_dhcp_settings : "UH_FMT"\n", ptr_struct->nv_config_infiniband_dhcp_settings);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "nv_config_infiniband_boot_settings : "UH_FMT"\n", ptr_struct->nv_config_infiniband_boot_settings);
adb2c_add_indentation(file, indent_level);
fprintf(file, "nv_config_dhcp_iscsi_parameters : "UH_FMT"\n", ptr_struct->nv_config_dhcp_iscsi_parameters);
adb2c_add_indentation(file, indent_level);
fprintf(file, "nv_config_boot_parameters : "UH_FMT"\n", ptr_struct->nv_config_boot_parameters);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "client_indentifier : "UH_FMT"\n", ptr_struct->client_indentifier);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "mac_admin_bit : "UH_FMT"\n", ptr_struct->mac_admin_bit);
+
adb2c_add_indentation(file, indent_level);
fprintf(file, "iscsi_boot_to_target : "UH_FMT"\n", ptr_struct->iscsi_boot_to_target);
void tools_open_mnv_cfg_pack(const union tools_open_mnv_cfg *ptr_struct, u_int8_t* ptr_buff)
{
- tools_open_mnvi_pack(&(ptr_struct->mnvi), ptr_buff);
+ tools_open_nvdi_pack(&(ptr_struct->nvdi), ptr_buff);
}
void tools_open_mnv_cfg_unpack(union tools_open_mnv_cfg *ptr_struct, const u_int8_t* ptr_buff)
{
- tools_open_mnvi_unpack(&(ptr_struct->mnvi), ptr_buff);
+ tools_open_nvdi_unpack(&(ptr_struct->nvdi), ptr_buff);
}
void tools_open_mnv_cfg_print(const union tools_open_mnv_cfg *ptr_struct, FILE* file, int indent_level){
tools_open_mnva_print(&(ptr_struct->mnva), file, indent_level + 1);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "nvdi:\n");
- tools_open_nvdi_print(&(ptr_struct->nvdi), file, indent_level + 1);
+ fprintf(file, "mnvi:\n");
+ tools_open_mnvi_print(&(ptr_struct->mnvi), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "mnvia:\n");
+ tools_open_mnvia_print(&(ptr_struct->mnvia), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "nvqc:\n");
+ tools_open_nvqc_print(&(ptr_struct->nvqc), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "nvia:\n");
+ tools_open_nvia_print(&(ptr_struct->nvia), file, indent_level + 1);
adb2c_add_indentation(file, indent_level);
fprintf(file, "nvda:\n");
tools_open_nvda_print(&(ptr_struct->nvda), file, indent_level + 1);
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "nvdia:\n");
- tools_open_nvdia_print(&(ptr_struct->nvdia), file, indent_level + 1);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "nvdi:\n");
+ tools_open_nvdi_print(&(ptr_struct->nvdi), file, indent_level + 1);
+
+}
+
+int tools_open_mnv_cfg_size(void){
+ return 256;
+}
+
+void tools_open_mnv_cfg_dump(const union tools_open_mnv_cfg *ptr_struct, FILE* file) {
+ tools_open_mnv_cfg_print(ptr_struct, file, 0);
+}
+
+void tools_open_lldp_nb_capability_pack(const struct tools_open_lldp_nb_capability *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->lldp_nb_supported);
+
+ offset=48;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 16, (u_int32_t)ptr_struct->max_total_lldp_tlv_len);
+
+ for (i=0; i < 16; i++) {
+ offset=adb2c_calc_array_field_address(88, 8, i, 192, 1);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->supported_lldp_tx_tlv_mask[i]);
+ }
+
+}
+
+void tools_open_lldp_nb_capability_unpack(struct tools_open_lldp_nb_capability *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=0;
+ ptr_struct->lldp_nb_supported = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=48;
+ ptr_struct->max_total_lldp_tlv_len = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 16);
+
+ for (i=0; i < 16; i++) {
+ offset=adb2c_calc_array_field_address(88, 8, i, 192, 1);
+ ptr_struct->supported_lldp_tx_tlv_mask[i] = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+ }
+
+}
+
+void tools_open_lldp_nb_capability_print(const struct tools_open_lldp_nb_capability *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_lldp_nb_capability ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "lldp_nb_supported : "UH_FMT"\n", ptr_struct->lldp_nb_supported);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_total_lldp_tlv_len : "UH_FMT"\n", ptr_struct->max_total_lldp_tlv_len);
+
+ for (i=0; i < 16; i++) {
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "supported_lldp_tx_tlv_mask_%03d : "UH_FMT"\n", i, ptr_struct->supported_lldp_tx_tlv_mask[i]);
+ }
+
+}
+
+int tools_open_lldp_nb_capability_size(void){
+ return 24;
+}
+
+void tools_open_lldp_nb_capability_dump(const struct tools_open_lldp_nb_capability *ptr_struct, FILE* file) {
+ tools_open_lldp_nb_capability_print(ptr_struct, file, 0);
+}
+
+void tools_open_lldp_nb_pack(const struct tools_open_lldp_nb *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=1;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->lldp_nb_rx_en);
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->lldp_nb_tx_en);
+
+ offset=84;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 12, (u_int32_t)ptr_struct->lldp_msg_tx_interval);
+
+ for (i=0; i < 16; i++) {
+ offset=adb2c_calc_array_field_address(120, 8, i, 224, 1);
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->lldp_tx_tlv_mask[i]);
+ }
+
+}
+
+void tools_open_lldp_nb_unpack(struct tools_open_lldp_nb *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=1;
+ ptr_struct->lldp_nb_rx_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=0;
+ ptr_struct->lldp_nb_tx_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=84;
+ ptr_struct->lldp_msg_tx_interval = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 12);
+
+ for (i=0; i < 16; i++) {
+ offset=adb2c_calc_array_field_address(120, 8, i, 224, 1);
+ ptr_struct->lldp_tx_tlv_mask[i] = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+ }
+
+}
+
+void tools_open_lldp_nb_print(const struct tools_open_lldp_nb *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_lldp_nb ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "lldp_nb_rx_en : "UH_FMT"\n", ptr_struct->lldp_nb_rx_en);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "lldp_nb_tx_en : "UH_FMT"\n", ptr_struct->lldp_nb_tx_en);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "lldp_msg_tx_interval : "UH_FMT"\n", ptr_struct->lldp_msg_tx_interval);
+
+ for (i=0; i < 16; i++) {
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "lldp_tx_tlv_mask_%03d : "UH_FMT"\n", i, ptr_struct->lldp_tx_tlv_mask[i]);
+ }
+
+}
+
+int tools_open_lldp_nb_size(void){
+ return 28;
+}
+
+void tools_open_lldp_nb_dump(const struct tools_open_lldp_nb *ptr_struct, FILE* file) {
+ tools_open_lldp_nb_print(ptr_struct, file, 0);
+}
+
+void tools_open_roce_cc_ecn_pack(const struct tools_open_roce_cc_ecn *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=1;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->clamp_tgt_rate_after_time_inc);
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->clamp_tgt_rate);
+
+ offset=47;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 17, (u_int32_t)ptr_struct->rpg_time_reset);
+
+ offset=81;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 15, (u_int32_t)ptr_struct->rpg_byte_reset);
+
+ offset=123;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 5, (u_int32_t)ptr_struct->rpg_threshold);
+
+ offset=129;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 31, (u_int32_t)ptr_struct->rpg_max_rate);
+
+ offset=175;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 17, (u_int32_t)ptr_struct->rpg_ai_rate);
+
+ offset=207;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 17, (u_int32_t)ptr_struct->rpg_hai_rate);
+
+ offset=252;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 4, (u_int32_t)ptr_struct->rpg_gd);
+
+ offset=280;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->rpg_min_dec_fac);
+
+ offset=303;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 17, (u_int32_t)ptr_struct->rpg_min_rate);
+
+ offset=335;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 17, (u_int32_t)ptr_struct->rate_to_set_on_first_cnp);
+
+ offset=374;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 10, (u_int32_t)ptr_struct->dce_tcp_g);
+
+ offset=399;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 17, (u_int32_t)ptr_struct->dce_tcp_rtt);
+
+ offset=431;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 17, (u_int32_t)ptr_struct->rate_reduce_monitor_period);
+
+ offset=470;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 10, (u_int32_t)ptr_struct->initial_alpha_value);
+
+ offset=495;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 17, (u_int32_t)ptr_struct->min_time_between_cnps);
+
+ offset=541;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 3, (u_int32_t)ptr_struct->cnp_dscp);
+
+ offset=530;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 6, (u_int32_t)ptr_struct->cnp_802p_prio);
+
+}
+
+void tools_open_roce_cc_ecn_unpack(struct tools_open_roce_cc_ecn *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=1;
+ ptr_struct->clamp_tgt_rate_after_time_inc = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=0;
+ ptr_struct->clamp_tgt_rate = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=47;
+ ptr_struct->rpg_time_reset = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 17);
+
+ offset=81;
+ ptr_struct->rpg_byte_reset = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 15);
+
+ offset=123;
+ ptr_struct->rpg_threshold = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 5);
+
+ offset=129;
+ ptr_struct->rpg_max_rate = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 31);
+
+ offset=175;
+ ptr_struct->rpg_ai_rate = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 17);
+
+ offset=207;
+ ptr_struct->rpg_hai_rate = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 17);
+
+ offset=252;
+ ptr_struct->rpg_gd = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 4);
+
+ offset=280;
+ ptr_struct->rpg_min_dec_fac = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+
+ offset=303;
+ ptr_struct->rpg_min_rate = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 17);
+
+ offset=335;
+ ptr_struct->rate_to_set_on_first_cnp = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 17);
+
+ offset=374;
+ ptr_struct->dce_tcp_g = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 10);
+
+ offset=399;
+ ptr_struct->dce_tcp_rtt = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 17);
+
+ offset=431;
+ ptr_struct->rate_reduce_monitor_period = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 17);
+
+ offset=470;
+ ptr_struct->initial_alpha_value = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 10);
+
+ offset=495;
+ ptr_struct->min_time_between_cnps = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 17);
+
+ offset=541;
+ ptr_struct->cnp_dscp = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 3);
+
+ offset=530;
+ ptr_struct->cnp_802p_prio = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 6);
+
+}
+
+void tools_open_roce_cc_ecn_print(const struct tools_open_roce_cc_ecn *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_roce_cc_ecn ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "clamp_tgt_rate_after_time_inc : "UH_FMT"\n", ptr_struct->clamp_tgt_rate_after_time_inc);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "clamp_tgt_rate : "UH_FMT"\n", ptr_struct->clamp_tgt_rate);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_time_reset : "UH_FMT"\n", ptr_struct->rpg_time_reset);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_byte_reset : "UH_FMT"\n", ptr_struct->rpg_byte_reset);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_threshold : "UH_FMT"\n", ptr_struct->rpg_threshold);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_max_rate : "UH_FMT"\n", ptr_struct->rpg_max_rate);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_ai_rate : "UH_FMT"\n", ptr_struct->rpg_ai_rate);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_hai_rate : "UH_FMT"\n", ptr_struct->rpg_hai_rate);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_gd : "UH_FMT"\n", ptr_struct->rpg_gd);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_min_dec_fac : "UH_FMT"\n", ptr_struct->rpg_min_dec_fac);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rpg_min_rate : "UH_FMT"\n", ptr_struct->rpg_min_rate);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rate_to_set_on_first_cnp : "UH_FMT"\n", ptr_struct->rate_to_set_on_first_cnp);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "dce_tcp_g : "UH_FMT"\n", ptr_struct->dce_tcp_g);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "dce_tcp_rtt : "UH_FMT"\n", ptr_struct->dce_tcp_rtt);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "rate_reduce_monitor_period : "UH_FMT"\n", ptr_struct->rate_reduce_monitor_period);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "initial_alpha_value : "UH_FMT"\n", ptr_struct->initial_alpha_value);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "min_time_between_cnps : "UH_FMT"\n", ptr_struct->min_time_between_cnps);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "cnp_dscp : "UH_FMT"\n", ptr_struct->cnp_dscp);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "cnp_802p_prio : "UH_FMT"\n", ptr_struct->cnp_802p_prio);
+
+}
+
+int tools_open_roce_cc_ecn_size(void){
+ return 68;
+}
+
+void tools_open_roce_cc_ecn_dump(const struct tools_open_roce_cc_ecn *ptr_struct, FILE* file) {
+ tools_open_roce_cc_ecn_print(ptr_struct, file, 0);
+}
+
+void tools_open_roce_cc_pack(const struct tools_open_roce_cc *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=24;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->roce_cc_enable_priority);
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->roce_cc_algorithm);
+
+}
+
+void tools_open_roce_cc_unpack(struct tools_open_roce_cc *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=24;
+ ptr_struct->roce_cc_enable_priority = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+
+ offset=0;
+ ptr_struct->roce_cc_algorithm = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+}
+
+void tools_open_roce_cc_print(const struct tools_open_roce_cc *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_roce_cc ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "roce_cc_enable_priority : "UH_FMT"\n", ptr_struct->roce_cc_enable_priority);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "roce_cc_algorithm : "UH_FMT"\n", ptr_struct->roce_cc_algorithm);
+
+}
+
+int tools_open_roce_cc_size(void){
+ return 4;
+}
+
+void tools_open_roce_cc_dump(const struct tools_open_roce_cc *ptr_struct, FILE* file) {
+ tools_open_roce_cc_print(ptr_struct, file, 0);
+}
+
+void tools_open_roce_v_1_5_next_protocol_pack(const struct tools_open_roce_v_1_5_next_protocol *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=24;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->roce_over_ip_next_protocol);
+
+}
+
+void tools_open_roce_v_1_5_next_protocol_unpack(struct tools_open_roce_v_1_5_next_protocol *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=24;
+ ptr_struct->roce_over_ip_next_protocol = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "nvqc:\n");
- tools_open_nvqc_print(&(ptr_struct->nvqc), file, indent_level + 1);
+}
+void tools_open_roce_v_1_5_next_protocol_print(const struct tools_open_roce_v_1_5_next_protocol *ptr_struct, FILE* file, int indent_level){
adb2c_add_indentation(file, indent_level);
- fprintf(file, "mnvia:\n");
- tools_open_mnvia_print(&(ptr_struct->mnvia), file, indent_level + 1);
+ fprintf(file, "======== tools_open_roce_v_1_5_next_protocol ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
adb2c_add_indentation(file, indent_level);
- fprintf(file, "mnvi:\n");
- tools_open_mnvi_print(&(ptr_struct->mnvi), file, indent_level + 1);
+ fprintf(file, "roce_over_ip_next_protocol : "UH_FMT"\n", ptr_struct->roce_over_ip_next_protocol);
}
-int tools_open_mnv_cfg_size(void){
- return 256;
+int tools_open_roce_v_1_5_next_protocol_size(void){
+ return 4;
}
-void tools_open_mnv_cfg_dump(const union tools_open_mnv_cfg *ptr_struct, FILE* file) {
- tools_open_mnv_cfg_print(ptr_struct, file, 0);
+void tools_open_roce_v_1_5_next_protocol_dump(const struct tools_open_roce_v_1_5_next_protocol *ptr_struct, FILE* file) {
+ tools_open_roce_v_1_5_next_protocol_print(ptr_struct, file, 0);
}
void tools_open_vpi_settings_pack(const struct tools_open_vpi_settings *ptr_struct, u_int8_t* ptr_buff){
tools_open_preboot_flow_ctrl_print(ptr_struct, file, 0);
}
+void tools_open_preboot_boot_settings_pack(const struct tools_open_preboot_boot_settings *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=20;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 12, (u_int32_t)ptr_struct->boot_vlan);
+
+ offset=8;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 8, (u_int32_t)ptr_struct->legacy_boot_protocol);
+
+ offset=5;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 3, (u_int32_t)ptr_struct->boot_retry_count);
+
+ offset=1;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->boot_vlan_en);
+
+ offset=0;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 1, (u_int32_t)ptr_struct->boot_option_rom_en);
+
+}
+
+void tools_open_preboot_boot_settings_unpack(struct tools_open_preboot_boot_settings *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=20;
+ ptr_struct->boot_vlan = (u_int16_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 12);
+
+ offset=8;
+ ptr_struct->legacy_boot_protocol = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 8);
+
+ offset=5;
+ ptr_struct->boot_retry_count = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 3);
+
+ offset=1;
+ ptr_struct->boot_vlan_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+ offset=0;
+ ptr_struct->boot_option_rom_en = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 1);
+
+}
+
+void tools_open_preboot_boot_settings_print(const struct tools_open_preboot_boot_settings *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_preboot_boot_settings ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "boot_vlan : "UH_FMT"\n", ptr_struct->boot_vlan);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "legacy_boot_protocol : "UH_FMT"\n", ptr_struct->legacy_boot_protocol);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "boot_retry_count : "UH_FMT"\n", ptr_struct->boot_retry_count);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "boot_vlan_en : "UH_FMT"\n", ptr_struct->boot_vlan_en);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "boot_option_rom_en : "UH_FMT"\n", ptr_struct->boot_option_rom_en);
+
+}
+
+int tools_open_preboot_boot_settings_size(void){
+ return 4;
+}
+
+void tools_open_preboot_boot_settings_dump(const struct tools_open_preboot_boot_settings *ptr_struct, FILE* file) {
+ tools_open_preboot_boot_settings_print(ptr_struct, file, 0);
+}
+
void tools_open_boot_settings_pack(const struct tools_open_boot_settings *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
tools_open_iscsi_settings_print(ptr_struct, file, 0);
}
+void tools_open_port_boot_state_pack(const struct tools_open_port_boot_state *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=30;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 2, (u_int32_t)ptr_struct->port_boot_state);
+
+}
+
+void tools_open_port_boot_state_unpack(struct tools_open_port_boot_state *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=30;
+ ptr_struct->port_boot_state = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 2);
+
+}
+
+void tools_open_port_boot_state_print(const struct tools_open_port_boot_state *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_port_boot_state ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "port_boot_state : "UH_FMT"\n", ptr_struct->port_boot_state);
+
+}
+
+int tools_open_port_boot_state_size(void){
+ return 4;
+}
+
+void tools_open_port_boot_state_dump(const struct tools_open_port_boot_state *ptr_struct, FILE* file) {
+ tools_open_port_boot_state_print(ptr_struct, file, 0);
+}
+
void tools_open_pci_configuration_pack(const struct tools_open_pci_configuration *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->max_total_msix);
offset=128;
- adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->log_max_total_bar_h);
-
- offset=160;
- adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->log_max_total_bar_l);
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->log_max_total_bar);
}
ptr_struct->max_total_msix = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
offset=128;
- ptr_struct->log_max_total_bar_h = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
-
- offset=160;
- ptr_struct->log_max_total_bar_l = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+ ptr_struct->log_max_total_bar = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
}
fprintf(file, "max_total_msix : "U32H_FMT"\n", ptr_struct->max_total_msix);
adb2c_add_indentation(file, indent_level);
- fprintf(file, "log_max_total_bar_h : "U32H_FMT"\n", ptr_struct->log_max_total_bar_h);
-
- adb2c_add_indentation(file, indent_level);
- fprintf(file, "log_max_total_bar_l : "U32H_FMT"\n", ptr_struct->log_max_total_bar_l);
+ fprintf(file, "log_max_total_bar : "U32H_FMT"\n", ptr_struct->log_max_total_bar);
}
int tools_open_pci_capabilities_size(void){
- return 24;
+ return 20;
}
void tools_open_pci_capabilities_dump(const struct tools_open_pci_capabilities *ptr_struct, FILE* file) {
tools_open_tpt_capabilities_print(ptr_struct, file, 0);
}
+void tools_open_infiniband_dc_settings_pack(const struct tools_open_infiniband_dc_settings *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=27;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 5, (u_int32_t)ptr_struct->log_dcr_hash_table_size);
+
+ offset=40;
+ adb2c_push_bits_to_buff(ptr_buff, offset, 24, (u_int32_t)ptr_struct->dcr_lifo_size);
+
+}
+
+void tools_open_infiniband_dc_settings_unpack(struct tools_open_infiniband_dc_settings *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=27;
+ ptr_struct->log_dcr_hash_table_size = (u_int8_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 5);
+
+ offset=40;
+ ptr_struct->dcr_lifo_size = (u_int32_t)adb2c_pop_bits_from_buff(ptr_buff, offset, 24);
+
+}
+
+void tools_open_infiniband_dc_settings_print(const struct tools_open_infiniband_dc_settings *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_infiniband_dc_settings ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "log_dcr_hash_table_size : "UH_FMT"\n", ptr_struct->log_dcr_hash_table_size);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "dcr_lifo_size : "UH_FMT"\n", ptr_struct->dcr_lifo_size);
+
+}
+
+int tools_open_infiniband_dc_settings_size(void){
+ return 8;
+}
+
+void tools_open_infiniband_dc_settings_dump(const struct tools_open_infiniband_dc_settings *ptr_struct, FILE* file) {
+ tools_open_infiniband_dc_settings_print(ptr_struct, file, 0);
+}
+
+void tools_open_infiniband_dc_capabilities_pack(const struct tools_open_infiniband_dc_capabilities *ptr_struct, u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=0;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->min_log_dcr_hash_table_size);
+
+ offset=32;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->max_log_dcr_hash_table_size);
+
+ offset=64;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->min_dcr_lifo_size);
+
+ offset=96;
+ adb2c_push_integer_to_buff(ptr_buff, offset, 4, (u_int64_t)ptr_struct->max_dcr_lifo_size);
+
+}
+
+void tools_open_infiniband_dc_capabilities_unpack(struct tools_open_infiniband_dc_capabilities *ptr_struct, const u_int8_t* ptr_buff){
+ u_int32_t offset;
+ int i=0;
+ u_int8_t val=0;
+ (void)val;
+ (void)offset;
+ (void)i;
+ (void)ptr_struct;
+ (void)ptr_buff;
+
+ offset=0;
+ ptr_struct->min_log_dcr_hash_table_size = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
+ offset=32;
+ ptr_struct->max_log_dcr_hash_table_size = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
+ offset=64;
+ ptr_struct->min_dcr_lifo_size = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
+ offset=96;
+ ptr_struct->max_dcr_lifo_size = (u_int32_t)adb2c_pop_integer_from_buff(ptr_buff, offset, 4);
+
+}
+
+void tools_open_infiniband_dc_capabilities_print(const struct tools_open_infiniband_dc_capabilities *ptr_struct, FILE* file, int indent_level){
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "======== tools_open_infiniband_dc_capabilities ========\n");
+ int i=0;
+ (void)i;(void)ptr_struct;
+ (void)file;
+ (void)indent_level;
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "min_log_dcr_hash_table_size : "U32H_FMT"\n", ptr_struct->min_log_dcr_hash_table_size);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_log_dcr_hash_table_size : "U32H_FMT"\n", ptr_struct->max_log_dcr_hash_table_size);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "min_dcr_lifo_size : "U32H_FMT"\n", ptr_struct->min_dcr_lifo_size);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "max_dcr_lifo_size : "U32H_FMT"\n", ptr_struct->max_dcr_lifo_size);
+
+}
+
+int tools_open_infiniband_dc_capabilities_size(void){
+ return 16;
+}
+
+void tools_open_infiniband_dc_capabilities_dump(const struct tools_open_infiniband_dc_capabilities *ptr_struct, FILE* file) {
+ tools_open_infiniband_dc_capabilities_print(ptr_struct, file, 0);
+}
+
void tools_open_wol_pack(const struct tools_open_wol *ptr_struct, u_int8_t* ptr_buff){
u_int32_t offset;
int i=0;
void tools_open_nv_cfg_pack(const union tools_open_nv_cfg *ptr_struct, u_int8_t* ptr_buff)
{
- tools_open_vpi_settings_pack(&(ptr_struct->vpi_settings), ptr_buff);
+ tools_open_lldp_nb_capability_pack(&(ptr_struct->lldp_nb_capability), ptr_buff);
}
void tools_open_nv_cfg_unpack(union tools_open_nv_cfg *ptr_struct, const u_int8_t* ptr_buff)
{
- tools_open_vpi_settings_unpack(&(ptr_struct->vpi_settings), ptr_buff);
+ tools_open_lldp_nb_capability_unpack(&(ptr_struct->lldp_nb_capability), ptr_buff);
}
void tools_open_nv_cfg_print(const union tools_open_nv_cfg *ptr_struct, FILE* file, int indent_level){
fprintf(file, "wol:\n");
tools_open_wol_print(&(ptr_struct->wol), file, indent_level + 1);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "infiniband_dc_capabilities:\n");
+ tools_open_infiniband_dc_capabilities_print(&(ptr_struct->infiniband_dc_capabilities), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "infiniband_dc_settings:\n");
+ tools_open_infiniband_dc_settings_print(&(ptr_struct->infiniband_dc_settings), file, indent_level + 1);
+
adb2c_add_indentation(file, indent_level);
fprintf(file, "tpt_capabilities:\n");
tools_open_tpt_capabilities_print(&(ptr_struct->tpt_capabilities), file, indent_level + 1);
fprintf(file, "pci_configuration:\n");
tools_open_pci_configuration_print(&(ptr_struct->pci_configuration), file, indent_level + 1);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "port_boot_state:\n");
+ tools_open_port_boot_state_print(&(ptr_struct->port_boot_state), file, indent_level + 1);
+
adb2c_add_indentation(file, indent_level);
fprintf(file, "iscsi_settings:\n");
tools_open_iscsi_settings_print(&(ptr_struct->iscsi_settings), file, indent_level + 1);
fprintf(file, "boot_settings:\n");
tools_open_boot_settings_print(&(ptr_struct->boot_settings), file, indent_level + 1);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "preboot_boot_settings:\n");
+ tools_open_preboot_boot_settings_print(&(ptr_struct->preboot_boot_settings), file, indent_level + 1);
+
adb2c_add_indentation(file, indent_level);
fprintf(file, "preboot_flow_ctrl:\n");
tools_open_preboot_flow_ctrl_print(&(ptr_struct->preboot_flow_ctrl), file, indent_level + 1);
fprintf(file, "vpi_settings:\n");
tools_open_vpi_settings_print(&(ptr_struct->vpi_settings), file, indent_level + 1);
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "roce_v_1_5_next_protocol:\n");
+ tools_open_roce_v_1_5_next_protocol_print(&(ptr_struct->roce_v_1_5_next_protocol), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "roce_cc:\n");
+ tools_open_roce_cc_print(&(ptr_struct->roce_cc), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "roce_cc_ecn:\n");
+ tools_open_roce_cc_ecn_print(&(ptr_struct->roce_cc_ecn), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "lldp_nb:\n");
+ tools_open_lldp_nb_print(&(ptr_struct->lldp_nb), file, indent_level + 1);
+
+ adb2c_add_indentation(file, indent_level);
+ fprintf(file, "lldp_nb_capability:\n");
+ tools_open_lldp_nb_capability_print(&(ptr_struct->lldp_nb_capability), file, indent_level + 1);
+
}
int tools_open_nv_cfg_size(void){
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
-
/***
- *** This file was generated at "2015-06-16 07:00:30"
+ *** This file was generated at "2015-08-31 18:48:47"
*** by:
*** > /mswg/release/eat_me/last_release/adabe_plugins/adb2c/adb2pack.py --input adb/tools_open/tools_open.adb --file-prefix tools_open --prefix tools_open_
***/
/* Description - */
/* Size in bytes - 4 */
-struct tools_open_eswitch_type {
+struct tools_open_per_port_type {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
/* 0.0 - 0.15 */
u_int16_t param_idx;
/* Description - */
- /* 0.16 - 0.17 */
+ /* 0.16 - 0.23 */
u_int8_t port;
/* Description - */
- /* 0.18 - 0.23 */
- u_int8_t host;
- /* Description - */
/* 0.24 - 4.31 */
u_int8_t param_class;
};
/* Description - */
/* Size in bytes - 4 */
-struct tools_open_per_host_type {
+struct tools_open_bmc_type {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
- /* 0.0 - 0.9 */
+ /* 0.0 - 0.12 */
u_int16_t param_idx;
/* Description - */
- /* 0.10 - 0.17 */
- u_int8_t function;
+ /* 0.13 - 0.17 */
+ u_int8_t channel;
/* Description - */
/* 0.18 - 0.23 */
u_int8_t host;
/* Description - */
/* Size in bytes - 4 */
-struct tools_open_bmc_type {
+struct tools_open_per_host_type {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
- /* 0.0 - 0.12 */
+ /* 0.0 - 0.9 */
u_int16_t param_idx;
/* Description - */
- /* 0.13 - 0.17 */
- u_int8_t channel;
+ /* 0.10 - 0.17 */
+ u_int8_t function;
/* Description - */
/* 0.18 - 0.23 */
u_int8_t host;
/* Description - */
/* Size in bytes - 4 */
-struct tools_open_per_port_type {
+struct tools_open_eswitch_type {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
/* 0.0 - 0.15 */
u_int16_t param_idx;
/* Description - */
- /* 0.16 - 0.23 */
+ /* 0.16 - 0.17 */
u_int8_t port;
/* Description - */
+ /* 0.18 - 0.23 */
+ u_int8_t host;
+ /* Description - */
/* 0.24 - 4.31 */
u_int8_t param_class;
};
struct tools_open_global_type global;
/* Description - */
/* 0.0 - 4.31 */
- struct tools_open_per_port_type per_port;
+ struct tools_open_eswitch_type eswitch;
/* Description - */
/* 0.0 - 4.31 */
- struct tools_open_bmc_type bmc;
+ struct tools_open_per_host_type per_host;
/* Description - */
/* 0.0 - 4.31 */
- struct tools_open_per_host_type per_host;
+ struct tools_open_bmc_type bmc;
/* Description - */
/* 0.0 - 4.31 */
- struct tools_open_eswitch_type eswitch;
+ struct tools_open_per_port_type per_port;
/* Description - */
/* 0.0 - 4.31 */
struct tools_open_tlv_type_dw tlv_type_dw;
u_int16_t addr;
};
-/* Description - */
-/* Size in bytes - 8 */
-struct tools_open_nv_hdr {
-/*---------------- DWORD[0] (Offset 0x0) ----------------*/
- /* Description - Tlv type */
- /* 0.0 - 0.15 */
- u_int16_t type;
- /* Description - size of tlv data in dwords (not including header) */
- /* 0.18 - 0.29 */
- u_int16_t length;
-/*---------------- DWORD[1] (Offset 0x4) ----------------*/
- /* Description - Type Modifier. E.G.: Port number when the config is port related */
- /* 4.16 - 4.23 */
- u_int8_t type_mod;
- /* Description - Shadow: i.e if set the Fw will not update the tlv immediately but wait for a command */
- /* 4.24 - 4.24 */
- u_int8_t shadow;
- /* Description - Pad count: for non dword alligned tlvs */
- /* 4.25 - 4.26 */
- u_int8_t pad_cnt;
- /* Description - Data version can be set by caller or left as 0. */
- /* 4.28 - 8.31 */
- u_int8_t version;
-};
-
/* Description - */
/* Size in bytes - 12 */
struct tools_open_nv_hdr_fifth_gen {
union tools_open_tlv_type type;
};
+/* Description - */
+/* Size in bytes - 8 */
+struct tools_open_nv_hdr {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - Tlv type */
+ /* 0.0 - 0.15 */
+ u_int16_t type;
+ /* Description - size of tlv data in dwords (not including header) */
+ /* 0.18 - 0.29 */
+ u_int16_t length;
+/*---------------- DWORD[1] (Offset 0x4) ----------------*/
+ /* Description - Type Modifier. E.G.: Port number when the config is port related */
+ /* 4.16 - 4.23 */
+ u_int8_t type_mod;
+ /* Description - Shadow: i.e if set the Fw will not update the tlv immediately but wait for a command */
+ /* 4.24 - 4.24 */
+ u_int8_t shadow;
+ /* Description - Pad count: for non dword alligned tlvs */
+ /* 4.25 - 4.26 */
+ u_int8_t pad_cnt;
+ /* Description - Data version can be set by caller or left as 0. */
+ /* 4.28 - 8.31 */
+ u_int8_t version;
+};
+
/* Description - */
/* Size in bytes - 264 */
struct tools_open_pmdio {
};
/* Description - */
-/* Size in bytes - 8 */
-struct tools_open_mnvi {
+/* Size in bytes - 12 */
+struct tools_open_nvdi {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
- /* 0.0 - 8.31 */
- struct tools_open_nv_hdr nv_hdr;
+ /* 0.0 - 12.31 */
+ struct tools_open_nv_hdr_fifth_gen nv_hdr;
};
/* Description - */
-/* Size in bytes - 8 */
-struct tools_open_mnvia {
+/* Size in bytes - 256 */
+struct tools_open_nvda {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
- /* 0.0 - 8.31 */
- struct tools_open_nv_hdr nv_hdr;
+ /* 0.0 - 12.31 */
+ struct tools_open_nv_hdr_fifth_gen nv_hdr;
+/*---------------- DWORD[3] (Offset 0xc) ----------------*/
+ /* Description - */
+ /* 12.24 - 140.23 */
+ u_int8_t data[128];
+};
+
+/* Description - */
+/* Size in bytes - 20 */
+struct tools_open_nvia {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - */
+ /* 0.0 - 12.31 */
+ struct tools_open_nv_hdr_fifth_gen nv_hdr;
+/*---------------- DWORD[3] (Offset 0xc) ----------------*/
+ /* Description - Information targeted for invalidation
+0 - All NVRAM parameters
+1 - NVLOG
+ */
+ /* 12.0 - 12.2 */
+ u_int8_t target;
};
/* Description - */
};
/* Description - */
-/* Size in bytes - 12 */
-struct tools_open_nvdia {
-/*---------------- DWORD[0] (Offset 0x0) ----------------*/
- /* Description - */
- /* 0.0 - 12.31 */
- struct tools_open_nv_hdr_fifth_gen nv_hdr;
-};
-
-/* Description - */
-/* Size in bytes - 256 */
-struct tools_open_nvda {
+/* Size in bytes - 8 */
+struct tools_open_mnvia {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
- /* 0.0 - 12.31 */
- struct tools_open_nv_hdr_fifth_gen nv_hdr;
-/*---------------- DWORD[3] (Offset 0xc) ----------------*/
- /* Description - */
- /* 12.24 - 140.23 */
- u_int8_t data[128];
+ /* 0.0 - 8.31 */
+ struct tools_open_nv_hdr nv_hdr;
};
/* Description - */
-/* Size in bytes - 12 */
-struct tools_open_nvdi {
+/* Size in bytes - 8 */
+struct tools_open_mnvi {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - */
- /* 0.0 - 12.31 */
- struct tools_open_nv_hdr_fifth_gen nv_hdr;
+ /* 0.0 - 8.31 */
+ struct tools_open_nv_hdr nv_hdr;
};
/* Description - */
/* Size in bytes - 28 */
struct tools_open_query_def_params_per_port {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - Firmware supports NV config settings 0x12 on the given port. */
+ /* 0.18 - 0.18 */
+ u_int8_t nv_config_vpi;
+ /* Description - Firmware supports NV config settings 0x10 on the given port. */
+ /* 0.19 - 0.19 */
+ u_int8_t nv_config_wol;
/* Description - */
/* 0.24 - 4.31 */
u_int8_t fw_default_config_payload_version;
/*---------------- DWORD[1] (Offset 0x4) ----------------*/
/* Description - */
/* 4.0 - 4.11 */
- u_int16_t boot_vlan;
+ u_int16_t default_boot_vlan;
/* Description - */
/* 4.16 - 4.19 */
- u_int8_t boot_protocol;
+ u_int8_t default_boot_protocol;
/* Description - */
/* 4.20 - 4.23 */
- u_int8_t boot_retry_cnt;
+ u_int8_t default_boot_retry_cnt;
/* Description - */
/* 4.25 - 4.26 */
- u_int8_t network_link_type;
+ u_int8_t default_network_link_type;
/* Description - */
/* 4.27 - 4.27 */
- u_int8_t en_wol_magic;
+ u_int8_t default_en_wol_magic;
/* Description - */
/* 4.28 - 4.28 */
- u_int8_t boot_vlan_en;
+ u_int8_t default_boot_vlan_en;
/* Description - */
/* 4.29 - 4.29 */
- u_int8_t boot_option_rom_en;
+ u_int8_t default_boot_option_rom_en;
/* Description - */
/* 4.30 - 4.30 */
- u_int8_t pprx;
+ u_int8_t default_pprx;
/* Description - */
/* 4.31 - 8.31 */
- u_int8_t pptx;
+ u_int8_t default_pptx;
/*---------------- DWORD[2] (Offset 0x8) ----------------*/
/* Description - */
/* 8.0 - 8.15 */
- u_int16_t boot_pkey;
+ u_int16_t default_boot_pkey;
+ /* Description - Legacy option ROM supports NV config setting 0x2023. */
+ /* 8.27 - 8.27 */
+ u_int8_t nv_config_infiniband_dhcp_settings;
+ /* Description - Legacy option ROM supports NV config setting 0x2022. */
+ /* 8.28 - 8.28 */
+ u_int8_t nv_config_infiniband_boot_settings;
/* Description - */
/* 8.29 - 8.29 */
u_int8_t nv_config_dhcp_iscsi_parameters;
/* 8.31 - 12.31 */
u_int8_t nv_config_boot_parameters;
/*---------------- DWORD[3] (Offset 0xc) ----------------*/
+ /* Description - Default value of the client_identifier field in the InfiniBand DHCP settings TLV. */
+ /* 12.18 - 12.19 */
+ u_int8_t client_indentifier;
+ /* Description - Default value of the mac_admin_bit in the InfiniBand DHCP settings TLV. */
+ /* 12.20 - 12.21 */
+ u_int8_t mac_admin_bit;
/* Description - */
/* 12.22 - 12.23 */
u_int8_t iscsi_boot_to_target;
/* 0.0 - 256.31 */
struct tools_open_mnva mnva;
/* Description - */
- /* 0.0 - 12.31 */
- struct tools_open_nvdi nvdi;
- /* Description - */
- /* 0.0 - 256.31 */
- struct tools_open_nvda nvda;
- /* Description - */
- /* 0.0 - 12.31 */
- struct tools_open_nvdia nvdia;
- /* Description - */
/* 0.0 - 8.31 */
- struct tools_open_nvqc nvqc;
+ struct tools_open_mnvi mnvi;
/* Description - */
/* 0.0 - 8.31 */
struct tools_open_mnvia mnvia;
/* Description - */
/* 0.0 - 8.31 */
- struct tools_open_mnvi mnvi;
+ struct tools_open_nvqc nvqc;
+ /* Description - */
+ /* 0.0 - 20.31 */
+ struct tools_open_nvia nvia;
+ /* Description - */
+ /* 0.0 - 256.31 */
+ struct tools_open_nvda nvda;
+ /* Description - */
+ /* 0.0 - 12.31 */
+ struct tools_open_nvdi nvdi;
+};
+
+/* Description - */
+/* Size in bytes - 24 */
+struct tools_open_lldp_nb_capability {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - Indicate if LLDP-NB is supported by this firmware
+Default: Enabled
+ */
+ /* 0.31 - 4.31 */
+ u_int8_t lldp_nb_supported;
+/*---------------- DWORD[1] (Offset 0x4) ----------------*/
+ /* Description - The overall (scratchpad) memory size for holding LLDP-TLVs. The memory is first filled with TLVs that the LLDP need to send (TX) the rest of the area is used for incoming TLVs
+
+Default: 3000 octets
+ */
+ /* 4.0 - 4.15 */
+ u_int16_t max_total_lldp_tlv_len;
+/*---------------- DWORD[2] (Offset 0x8) ----------------*/
+ /* Description - A bitmask saying which of the LLDP-TLV the client is capable of sending
+TBD: we think that this is redundant
+ */
+ /* 8.24 - 24.23 */
+ u_int8_t supported_lldp_tx_tlv_mask[16];
+};
+
+/* Description - */
+/* Size in bytes - 28 */
+struct tools_open_lldp_nb {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - Enable processing of incoming LLDB NB BPDUs
+Default: Disable
+ */
+ /* 0.30 - 0.30 */
+ u_int8_t lldp_nb_rx_en;
+ /* Description - Enable transmission of LLDP Next Bridge BPDUs
+Default: Enabled
+ */
+ /* 0.31 - 4.31 */
+ u_int8_t lldp_nb_tx_en;
+/*---------------- DWORD[2] (Offset 0x8) ----------------*/
+ /* Description - Interval for sending LLDP NB PDUs in seconds
+Default: 30
+ */
+ /* 8.0 - 8.11 */
+ u_int16_t lldp_msg_tx_interval;
+/*---------------- DWORD[3] (Offset 0xc) ----------------*/
+ /* Description - A bitmask saying which of the LLDP-TLV to send
+Default: b1111 (only TLVs 0..3) \96 according to the standard these are mandatory TLVs that must always be enabled
+
+An enabled TLV will not be send if a corresponding TLV is not defined
+ */
+ /* 12.24 - 28.23 */
+ u_int8_t lldp_tx_tlv_mask[16];
+};
+
+/* Description - */
+/* Size in bytes - 68 */
+struct tools_open_roce_cc_ecn {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - Default: True
+When receiving an CNP, the target rate should be updated if the transmission rate was increased due to the timer, and not only due to the byte counter
+ */
+ /* 0.30 - 0.30 */
+ u_int8_t clamp_tgt_rate_after_time_inc;
+ /* Description - default - False
+ */
+ /* 0.31 - 4.31 */
+ u_int8_t clamp_tgt_rate;
+/*---------------- DWORD[1] (Offset 0x4) ----------------*/
+ /* Description - Time between rate increases if no CNPs are received. Given in u-seconds.
+Default: 2
+ */
+ /* 4.0 - 4.16 */
+ u_int32_t rpg_time_reset;
+/*---------------- DWORD[2] (Offset 0x8) ----------------*/
+ /* Description - Transmitted data between rate increases if no CNPs are received. Given in Bytes.
+ 0 == disabled TBD: update the PRM
+Default: 150
+ */
+ /* 8.0 - 8.14 */
+ u_int16_t rpg_byte_reset;
+/*---------------- DWORD[3] (Offset 0xc) ----------------*/
+ /* Description - The number of times rpByteStage or rpTimeStage can count before the RP rate control state machine advances states.
+Default: 5
+ */
+ /* 12.0 - 12.4 */
+ u_int8_t rpg_threshold;
+/*---------------- DWORD[4] (Offset 0x10) ----------------*/
+ /* Description - The maximum rate, in Mbits per second, at which an RP can transmit. Once this limit is reached, the RP rate limited is released and the flow is not rate limited any more.
+Default: 0 (Full port speed) \96 TBD update PRM
+ */
+ /* 16.0 - 16.30 */
+ u_int32_t rpg_max_rate;
+/*---------------- DWORD[5] (Offset 0x14) ----------------*/
+ /* Description - The rate, in Mbits per second, used to increase rpTargetRate in the RPR_ACTIVE_INCREASE.
+Default: 10
+ */
+ /* 20.0 - 20.16 */
+ u_int32_t rpg_ai_rate;
+/*---------------- DWORD[6] (Offset 0x18) ----------------*/
+ /* Description - The rate, in Mbits per second, used to increase rpTargetRate in the RPR_HYPER_INCREASE state
+Default: 50
+ */
+ /* 24.0 - 24.16 */
+ u_int32_t rpg_hai_rate;
+/*---------------- DWORD[7] (Offset 0x1c) ----------------*/
+ /* Description - - If a CNP is received, the flow rate is reduced at the beginning of the next rate_reduce_monitor_period interval to (1-Alpha/Gd)*CurrentRate. rpg_gd is given as log2(Gd), where Gd may only be powers of 2.
+Default: 7
+ */
+ /* 28.0 - 28.3 */
+ u_int8_t rpg_gd;
+/*---------------- DWORD[8] (Offset 0x20) ----------------*/
+ /* Description - The minimum factor by which the current transmit rate can be changed when processing a CNP. Value is given as a percentage (1-100).
+Default: 50
+ */
+ /* 32.0 - 32.7 */
+ u_int8_t rpg_min_dec_fac;
+/*---------------- DWORD[9] (Offset 0x24) ----------------*/
+ /* Description - The minimum value, in Mb per second, for rate to limit.
+Default: 2000
+ */
+ /* 36.0 - 36.16 */
+ u_int32_t rpg_min_rate;
+/*---------------- DWORD[10] (Offset 0x28) ----------------*/
+ /* Description - The rate that is set for the flow when a rate limiter is allocated to it upon first CNP received, in Mbps
+Default: 0 Port speed (TBD update PRM)
+ */
+ /* 40.0 - 40.16 */
+ u_int32_t rate_to_set_on_first_cnp;
+/*---------------- DWORD[11] (Offset 0x2c) ----------------*/
+ /* Description - Used to update the congestion estimator (alpha) once every dce_tcp_rtt microseconds, according to the equation:
+Alpha = (cnp_received * dceTcpG) + (1 - dceTcpG) * alpha .
+dceTcpG is divided by 2^10.
+cnp_received is set to one if a CNP was received for this flow during period since the previous update and the current update
+Default: 64
+ */
+ /* 44.0 - 44.9 */
+ u_int16_t dce_tcp_g;
+/*---------------- DWORD[12] (Offset 0x30) ----------------*/
+ /* Description - The time between updates of the alpha value, in microseconds.
+Default: 2
+ */
+ /* 48.0 - 48.16 */
+ u_int32_t dce_tcp_rtt;
+/*---------------- DWORD[13] (Offset 0x34) ----------------*/
+ /* Description - The minimum time between 2 consecutive rate reductions for a single flow. Rate reduction will occur only if a CNP is received during the relevant time interval.
+Default: 2
+ */
+ /* 52.0 - 52.16 */
+ u_int32_t rate_reduce_monitor_period;
+/*---------------- DWORD[14] (Offset 0x38) ----------------*/
+ /* Description - The initial value of alpha to use when receiving the first CNP for a flow. Expressed in a fixed point fraction of 2^10.
+Default: TBD
+ */
+ /* 56.0 - 56.9 */
+ u_int16_t initial_alpha_value;
+/*---------------- DWORD[15] (Offset 0x3c) ----------------*/
+ /* Description - Minimum time between sending cnps from the port, in microseconds.
+Default: 0
+ */
+ /* 60.0 - 60.16 */
+ u_int32_t min_time_between_cnps;
+/*---------------- DWORD[16] (Offset 0x40) ----------------*/
+ /* Description - The DiffServ Code Point of the generated CNP for this port
+Default: 0
+ */
+ /* 64.0 - 64.2 */
+ u_int8_t cnp_dscp;
+ /* Description - The 802.1p priority value of the generated CNP for this port
+Default: 7
+ */
+ /* 64.8 - 64.13 */
+ u_int8_t cnp_802p_prio;
+};
+
+/* Description - */
+/* Size in bytes - 4 */
+struct tools_open_roce_cc {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - Per priority enable disable (0..7)
+Default: False
+ */
+ /* 0.0 - 0.7 */
+ u_int8_t roce_cc_enable_priority;
+ /* Description - 0 = ECN
+1 = QCN
+ */
+ /* 0.31 - 4.31 */
+ u_int8_t roce_cc_algorithm;
+};
+
+/* Description - */
+/* Size in bytes - 4 */
+struct tools_open_roce_v_1_5_next_protocol {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - the next protocol value set in the IPv4/IPv6
+packets for RoCE v1.5
+default = 0xfe
+ */
+ /* 0.0 - 0.7 */
+ u_int8_t roce_over_ip_next_protocol;
};
/* Description - */
u_int8_t pptx;
};
+/* Description - */
+/* Size in bytes - 4 */
+struct tools_open_preboot_boot_settings {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - VLAN ID for network boot. */
+ /* 0.0 - 0.11 */
+ u_int16_t boot_vlan;
+ /* Description - 0 None disable legacy boot.
+1 PXE (DHCP/TFTP boot).
+2 iSCSI
+
+3 PXE + iSCSI
+4-255 Reserved
+ */
+ /* 0.16 - 0.23 */
+ u_int8_t legacy_boot_protocol;
+ /* Description - Number of retries to attempt in case of boot failure.
+7 indicate indefinite retries.
+ */
+ /* 0.24 - 0.26 */
+ u_int8_t boot_retry_count;
+ /* Description - 1 Enable VLAN mode for network boot */
+ /* 0.30 - 0.30 */
+ u_int8_t boot_vlan_en;
+ /* Description - 0 disable boot option ROM: disables installation of the UNDI/16 driver. The option ROM is still required to expose CLP, UEFI and so on.
+1 enable boot option ROM
+ */
+ /* 0.31 - 4.31 */
+ u_int8_t boot_option_rom_en;
+};
+
/* Description - */
/* Size in bytes - 4 */
struct tools_open_boot_settings {
/* Size in bytes - 4 */
struct tools_open_infiniband_boot_settings {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
- /* Description - P_Key to be used by PXE boot. */
+ /* Description - P_key to be used by PXE boot. */
/* 0.0 - 0.15 */
u_int16_t boot_pkey;
};
u_int8_t link_up_delay_time;
};
+/* Description - */
+/* Size in bytes - 4 */
+struct tools_open_port_boot_state {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - 0 Normal operation
+1 SFP power off
+2 SERDES power off
+3 admin linkDown
+ */
+ /* 0.0 - 0.1 */
+ u_int8_t port_boot_state;
+};
+
/* Description - */
/* Size in bytes - 12 */
struct tools_open_pci_configuration {
};
/* Description - */
-/* Size in bytes - 24 */
+/* Size in bytes - 20 */
struct tools_open_pci_capabilities {
/*---------------- DWORD[0] (Offset 0x0) ----------------*/
/* Description - 1 when max_pf_uar_bar_size field is configurable and the log_max_pf_uar_bar_size field is valid */
/*---------------- DWORD[4] (Offset 0x10) ----------------*/
/* Description - Log 2 of the maximum total of the MMIO space for all PFs and VFs combined */
/* 16.0 - 20.31 */
- u_int32_t log_max_total_bar_h;
-/*---------------- DWORD[5] (Offset 0x14) ----------------*/
- /* Description - Log 2 of the maximum total of the MMIO space for all PFs and VFs combined */
- /* 20.0 - 24.31 */
- u_int32_t log_max_total_bar_l;
+ u_int32_t log_max_total_bar;
};
/* Description - */
u_int8_t log_max_payload_size_supported;
};
+/* Description - */
+/* Size in bytes - 8 */
+struct tools_open_infiniband_dc_settings {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - Hash table size minus one */
+ /* 0.0 - 0.4 */
+ u_int8_t log_dcr_hash_table_size;
+/*---------------- DWORD[1] (Offset 0x4) ----------------*/
+ /* Description - The amount of total DCRs available to join linked-lists after hash DCRs. This is a dynamic pool of DCRs that can be used to connect all incoming connections. */
+ /* 4.0 - 4.23 */
+ u_int32_t dcr_lifo_size;
+};
+
+/* Description - */
+/* Size in bytes - 16 */
+struct tools_open_infiniband_dc_capabilities {
+/*---------------- DWORD[0] (Offset 0x0) ----------------*/
+ /* Description - */
+ /* 0.0 - 4.31 */
+ u_int32_t min_log_dcr_hash_table_size;
+/*---------------- DWORD[1] (Offset 0x4) ----------------*/
+ /* Description - */
+ /* 4.0 - 8.31 */
+ u_int32_t max_log_dcr_hash_table_size;
+/*---------------- DWORD[2] (Offset 0x8) ----------------*/
+ /* Description - */
+ /* 8.0 - 12.31 */
+ u_int32_t min_dcr_lifo_size;
+/*---------------- DWORD[3] (Offset 0xc) ----------------*/
+ /* Description - */
+ /* 12.0 - 16.31 */
+ u_int32_t max_dcr_lifo_size;
+};
+
/* Description - */
/* Size in bytes - 8 */
struct tools_open_wol {
/* 0.0 - 8.31 */
struct tools_open_wol wol;
/* Description - */
+ /* 0.0 - 16.31 */
+ struct tools_open_infiniband_dc_capabilities infiniband_dc_capabilities;
+ /* Description - */
+ /* 0.0 - 8.31 */
+ struct tools_open_infiniband_dc_settings infiniband_dc_settings;
+ /* Description - */
/* 0.0 - 4.31 */
struct tools_open_tpt_capabilities tpt_capabilities;
/* Description - */
/* 0.0 - 4.31 */
struct tools_open_tpt_configuration tpt_configuration;
/* Description - */
- /* 0.0 - 24.31 */
+ /* 0.0 - 20.31 */
struct tools_open_pci_capabilities pci_capabilities;
/* Description - */
/* 0.0 - 12.31 */
struct tools_open_pci_configuration pci_configuration;
/* Description - */
+ /* 0.0 - 4.31 */
+ struct tools_open_port_boot_state port_boot_state;
+ /* Description - */
/* 0.0 - 12.31 */
struct tools_open_iscsi_settings iscsi_settings;
/* Description - */
/* 0.0 - 4.31 */
struct tools_open_boot_settings boot_settings;
/* Description - */
+ /* 0.0 - 4.31 */
+ struct tools_open_preboot_boot_settings preboot_boot_settings;
+ /* Description - */
/* 0.0 - 4.31 */
struct tools_open_preboot_flow_ctrl preboot_flow_ctrl;
/* Description - */
/* Description - */
/* 0.0 - 4.31 */
struct tools_open_vpi_settings vpi_settings;
+ /* Description - */
+ /* 0.0 - 4.31 */
+ struct tools_open_roce_v_1_5_next_protocol roce_v_1_5_next_protocol;
+ /* Description - */
+ /* 0.0 - 4.31 */
+ struct tools_open_roce_cc roce_cc;
+ /* Description - */
+ /* 0.0 - 68.31 */
+ struct tools_open_roce_cc_ecn roce_cc_ecn;
+ /* Description - */
+ /* 0.0 - 28.31 */
+ struct tools_open_lldp_nb lldp_nb;
+ /* Description - */
+ /* 0.0 - 24.31 */
+ struct tools_open_lldp_nb_capability lldp_nb_capability;
};
/* Description - */
int tools_open_tlv_type_dw_size(void);
#define TOOLS_OPEN_TLV_TYPE_DW_SIZE (0x4)
void tools_open_tlv_type_dw_dump(const struct tools_open_tlv_type_dw *ptr_struct, FILE* file);
-/* eswitch_type */
-void tools_open_eswitch_type_pack(const struct tools_open_eswitch_type *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_eswitch_type_unpack(struct tools_open_eswitch_type *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_eswitch_type_print(const struct tools_open_eswitch_type *ptr_struct, FILE* file, int indent_level);
-int tools_open_eswitch_type_size(void);
-#define TOOLS_OPEN_ESWITCH_TYPE_SIZE (0x4)
-void tools_open_eswitch_type_dump(const struct tools_open_eswitch_type *ptr_struct, FILE* file);
-/* per_host_type */
-void tools_open_per_host_type_pack(const struct tools_open_per_host_type *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_per_host_type_unpack(struct tools_open_per_host_type *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_per_host_type_print(const struct tools_open_per_host_type *ptr_struct, FILE* file, int indent_level);
-int tools_open_per_host_type_size(void);
-#define TOOLS_OPEN_PER_HOST_TYPE_SIZE (0x4)
-void tools_open_per_host_type_dump(const struct tools_open_per_host_type *ptr_struct, FILE* file);
-/* bmc_type */
-void tools_open_bmc_type_pack(const struct tools_open_bmc_type *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_bmc_type_unpack(struct tools_open_bmc_type *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_bmc_type_print(const struct tools_open_bmc_type *ptr_struct, FILE* file, int indent_level);
-int tools_open_bmc_type_size(void);
-#define TOOLS_OPEN_BMC_TYPE_SIZE (0x4)
-void tools_open_bmc_type_dump(const struct tools_open_bmc_type *ptr_struct, FILE* file);
/* per_port_type */
void tools_open_per_port_type_pack(const struct tools_open_per_port_type *ptr_struct, u_int8_t* ptr_buff);
void tools_open_per_port_type_unpack(struct tools_open_per_port_type *ptr_struct, const u_int8_t* ptr_buff);
int tools_open_per_port_type_size(void);
#define TOOLS_OPEN_PER_PORT_TYPE_SIZE (0x4)
void tools_open_per_port_type_dump(const struct tools_open_per_port_type *ptr_struct, FILE* file);
+/* bmc_type */
+void tools_open_bmc_type_pack(const struct tools_open_bmc_type *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_bmc_type_unpack(struct tools_open_bmc_type *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_bmc_type_print(const struct tools_open_bmc_type *ptr_struct, FILE* file, int indent_level);
+int tools_open_bmc_type_size(void);
+#define TOOLS_OPEN_BMC_TYPE_SIZE (0x4)
+void tools_open_bmc_type_dump(const struct tools_open_bmc_type *ptr_struct, FILE* file);
+/* per_host_type */
+void tools_open_per_host_type_pack(const struct tools_open_per_host_type *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_per_host_type_unpack(struct tools_open_per_host_type *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_per_host_type_print(const struct tools_open_per_host_type *ptr_struct, FILE* file, int indent_level);
+int tools_open_per_host_type_size(void);
+#define TOOLS_OPEN_PER_HOST_TYPE_SIZE (0x4)
+void tools_open_per_host_type_dump(const struct tools_open_per_host_type *ptr_struct, FILE* file);
+/* eswitch_type */
+void tools_open_eswitch_type_pack(const struct tools_open_eswitch_type *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_eswitch_type_unpack(struct tools_open_eswitch_type *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_eswitch_type_print(const struct tools_open_eswitch_type *ptr_struct, FILE* file, int indent_level);
+int tools_open_eswitch_type_size(void);
+#define TOOLS_OPEN_ESWITCH_TYPE_SIZE (0x4)
+void tools_open_eswitch_type_dump(const struct tools_open_eswitch_type *ptr_struct, FILE* file);
/* global_type */
void tools_open_global_type_pack(const struct tools_open_global_type *ptr_struct, u_int8_t* ptr_buff);
void tools_open_global_type_unpack(struct tools_open_global_type *ptr_struct, const u_int8_t* ptr_buff);
int tools_open_pmdio_addr_data_size(void);
#define TOOLS_OPEN_PMDIO_ADDR_DATA_SIZE (0x4)
void tools_open_pmdio_addr_data_dump(const struct tools_open_pmdio_addr_data *ptr_struct, FILE* file);
-/* nv_hdr */
-void tools_open_nv_hdr_pack(const struct tools_open_nv_hdr *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_nv_hdr_unpack(struct tools_open_nv_hdr *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_nv_hdr_print(const struct tools_open_nv_hdr *ptr_struct, FILE* file, int indent_level);
-int tools_open_nv_hdr_size(void);
-#define TOOLS_OPEN_NV_HDR_SIZE (0x8)
-void tools_open_nv_hdr_dump(const struct tools_open_nv_hdr *ptr_struct, FILE* file);
/* nv_hdr_fifth_gen */
void tools_open_nv_hdr_fifth_gen_pack(const struct tools_open_nv_hdr_fifth_gen *ptr_struct, u_int8_t* ptr_buff);
void tools_open_nv_hdr_fifth_gen_unpack(struct tools_open_nv_hdr_fifth_gen *ptr_struct, const u_int8_t* ptr_buff);
int tools_open_nv_hdr_fifth_gen_size(void);
#define TOOLS_OPEN_NV_HDR_FIFTH_GEN_SIZE (0xc)
void tools_open_nv_hdr_fifth_gen_dump(const struct tools_open_nv_hdr_fifth_gen *ptr_struct, FILE* file);
+/* nv_hdr */
+void tools_open_nv_hdr_pack(const struct tools_open_nv_hdr *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_nv_hdr_unpack(struct tools_open_nv_hdr *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_nv_hdr_print(const struct tools_open_nv_hdr *ptr_struct, FILE* file, int indent_level);
+int tools_open_nv_hdr_size(void);
+#define TOOLS_OPEN_NV_HDR_SIZE (0x8)
+void tools_open_nv_hdr_dump(const struct tools_open_nv_hdr *ptr_struct, FILE* file);
/* pmdio */
void tools_open_pmdio_pack(const struct tools_open_pmdio *ptr_struct, u_int8_t* ptr_buff);
void tools_open_pmdio_unpack(struct tools_open_pmdio *ptr_struct, const u_int8_t* ptr_buff);
int tools_open_pmdic_size(void);
#define TOOLS_OPEN_PMDIC_SIZE (0xc)
void tools_open_pmdic_dump(const struct tools_open_pmdic *ptr_struct, FILE* file);
-/* mnvi */
-void tools_open_mnvi_pack(const struct tools_open_mnvi *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_mnvi_unpack(struct tools_open_mnvi *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_mnvi_print(const struct tools_open_mnvi *ptr_struct, FILE* file, int indent_level);
-int tools_open_mnvi_size(void);
-#define TOOLS_OPEN_MNVI_SIZE (0x8)
-void tools_open_mnvi_dump(const struct tools_open_mnvi *ptr_struct, FILE* file);
-/* mnvia */
-void tools_open_mnvia_pack(const struct tools_open_mnvia *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_mnvia_unpack(struct tools_open_mnvia *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_mnvia_print(const struct tools_open_mnvia *ptr_struct, FILE* file, int indent_level);
-int tools_open_mnvia_size(void);
-#define TOOLS_OPEN_MNVIA_SIZE (0x8)
-void tools_open_mnvia_dump(const struct tools_open_mnvia *ptr_struct, FILE* file);
-/* nvqc */
-void tools_open_nvqc_pack(const struct tools_open_nvqc *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_nvqc_unpack(struct tools_open_nvqc *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_nvqc_print(const struct tools_open_nvqc *ptr_struct, FILE* file, int indent_level);
-int tools_open_nvqc_size(void);
-#define TOOLS_OPEN_NVQC_SIZE (0x8)
-void tools_open_nvqc_dump(const struct tools_open_nvqc *ptr_struct, FILE* file);
-/* nvdia */
-void tools_open_nvdia_pack(const struct tools_open_nvdia *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_nvdia_unpack(struct tools_open_nvdia *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_nvdia_print(const struct tools_open_nvdia *ptr_struct, FILE* file, int indent_level);
-int tools_open_nvdia_size(void);
-#define TOOLS_OPEN_NVDIA_SIZE (0xc)
-void tools_open_nvdia_dump(const struct tools_open_nvdia *ptr_struct, FILE* file);
-/* nvda */
-void tools_open_nvda_pack(const struct tools_open_nvda *ptr_struct, u_int8_t* ptr_buff);
-void tools_open_nvda_unpack(struct tools_open_nvda *ptr_struct, const u_int8_t* ptr_buff);
-void tools_open_nvda_print(const struct tools_open_nvda *ptr_struct, FILE* file, int indent_level);
-int tools_open_nvda_size(void);
-#define TOOLS_OPEN_NVDA_SIZE (0x100)
-void tools_open_nvda_dump(const struct tools_open_nvda *ptr_struct, FILE* file);
/* nvdi */
void tools_open_nvdi_pack(const struct tools_open_nvdi *ptr_struct, u_int8_t* ptr_buff);
void tools_open_nvdi_unpack(struct tools_open_nvdi *ptr_struct, const u_int8_t* ptr_buff);
int tools_open_nvdi_size(void);
#define TOOLS_OPEN_NVDI_SIZE (0xc)
void tools_open_nvdi_dump(const struct tools_open_nvdi *ptr_struct, FILE* file);
+/* nvda */
+void tools_open_nvda_pack(const struct tools_open_nvda *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_nvda_unpack(struct tools_open_nvda *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_nvda_print(const struct tools_open_nvda *ptr_struct, FILE* file, int indent_level);
+int tools_open_nvda_size(void);
+#define TOOLS_OPEN_NVDA_SIZE (0x100)
+void tools_open_nvda_dump(const struct tools_open_nvda *ptr_struct, FILE* file);
+/* nvia */
+void tools_open_nvia_pack(const struct tools_open_nvia *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_nvia_unpack(struct tools_open_nvia *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_nvia_print(const struct tools_open_nvia *ptr_struct, FILE* file, int indent_level);
+int tools_open_nvia_size(void);
+#define TOOLS_OPEN_NVIA_SIZE (0x14)
+void tools_open_nvia_dump(const struct tools_open_nvia *ptr_struct, FILE* file);
+/* nvqc */
+void tools_open_nvqc_pack(const struct tools_open_nvqc *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_nvqc_unpack(struct tools_open_nvqc *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_nvqc_print(const struct tools_open_nvqc *ptr_struct, FILE* file, int indent_level);
+int tools_open_nvqc_size(void);
+#define TOOLS_OPEN_NVQC_SIZE (0x8)
+void tools_open_nvqc_dump(const struct tools_open_nvqc *ptr_struct, FILE* file);
+/* mnvia */
+void tools_open_mnvia_pack(const struct tools_open_mnvia *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_mnvia_unpack(struct tools_open_mnvia *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_mnvia_print(const struct tools_open_mnvia *ptr_struct, FILE* file, int indent_level);
+int tools_open_mnvia_size(void);
+#define TOOLS_OPEN_MNVIA_SIZE (0x8)
+void tools_open_mnvia_dump(const struct tools_open_mnvia *ptr_struct, FILE* file);
+/* mnvi */
+void tools_open_mnvi_pack(const struct tools_open_mnvi *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_mnvi_unpack(struct tools_open_mnvi *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_mnvi_print(const struct tools_open_mnvi *ptr_struct, FILE* file, int indent_level);
+int tools_open_mnvi_size(void);
+#define TOOLS_OPEN_MNVI_SIZE (0x8)
+void tools_open_mnvi_dump(const struct tools_open_mnvi *ptr_struct, FILE* file);
/* mnva */
void tools_open_mnva_pack(const struct tools_open_mnva *ptr_struct, u_int8_t* ptr_buff);
void tools_open_mnva_unpack(struct tools_open_mnva *ptr_struct, const u_int8_t* ptr_buff);
int tools_open_mnv_cfg_size(void);
#define TOOLS_OPEN_MNV_CFG_SIZE (0x100)
void tools_open_mnv_cfg_dump(const union tools_open_mnv_cfg *ptr_struct, FILE* file);
+/* lldp_nb_capability */
+void tools_open_lldp_nb_capability_pack(const struct tools_open_lldp_nb_capability *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_lldp_nb_capability_unpack(struct tools_open_lldp_nb_capability *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_lldp_nb_capability_print(const struct tools_open_lldp_nb_capability *ptr_struct, FILE* file, int indent_level);
+int tools_open_lldp_nb_capability_size(void);
+#define TOOLS_OPEN_LLDP_NB_CAPABILITY_SIZE (0x18)
+void tools_open_lldp_nb_capability_dump(const struct tools_open_lldp_nb_capability *ptr_struct, FILE* file);
+/* lldp_nb */
+void tools_open_lldp_nb_pack(const struct tools_open_lldp_nb *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_lldp_nb_unpack(struct tools_open_lldp_nb *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_lldp_nb_print(const struct tools_open_lldp_nb *ptr_struct, FILE* file, int indent_level);
+int tools_open_lldp_nb_size(void);
+#define TOOLS_OPEN_LLDP_NB_SIZE (0x1c)
+void tools_open_lldp_nb_dump(const struct tools_open_lldp_nb *ptr_struct, FILE* file);
+/* roce_cc_ecn */
+void tools_open_roce_cc_ecn_pack(const struct tools_open_roce_cc_ecn *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_roce_cc_ecn_unpack(struct tools_open_roce_cc_ecn *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_roce_cc_ecn_print(const struct tools_open_roce_cc_ecn *ptr_struct, FILE* file, int indent_level);
+int tools_open_roce_cc_ecn_size(void);
+#define TOOLS_OPEN_ROCE_CC_ECN_SIZE (0x44)
+void tools_open_roce_cc_ecn_dump(const struct tools_open_roce_cc_ecn *ptr_struct, FILE* file);
+/* roce_cc */
+void tools_open_roce_cc_pack(const struct tools_open_roce_cc *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_roce_cc_unpack(struct tools_open_roce_cc *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_roce_cc_print(const struct tools_open_roce_cc *ptr_struct, FILE* file, int indent_level);
+int tools_open_roce_cc_size(void);
+#define TOOLS_OPEN_ROCE_CC_SIZE (0x4)
+void tools_open_roce_cc_dump(const struct tools_open_roce_cc *ptr_struct, FILE* file);
+/* roce_v_1_5_next_protocol */
+void tools_open_roce_v_1_5_next_protocol_pack(const struct tools_open_roce_v_1_5_next_protocol *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_roce_v_1_5_next_protocol_unpack(struct tools_open_roce_v_1_5_next_protocol *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_roce_v_1_5_next_protocol_print(const struct tools_open_roce_v_1_5_next_protocol *ptr_struct, FILE* file, int indent_level);
+int tools_open_roce_v_1_5_next_protocol_size(void);
+#define TOOLS_OPEN_ROCE_V_1_5_NEXT_PROTOCOL_SIZE (0x4)
+void tools_open_roce_v_1_5_next_protocol_dump(const struct tools_open_roce_v_1_5_next_protocol *ptr_struct, FILE* file);
/* vpi_settings */
void tools_open_vpi_settings_pack(const struct tools_open_vpi_settings *ptr_struct, u_int8_t* ptr_buff);
void tools_open_vpi_settings_unpack(struct tools_open_vpi_settings *ptr_struct, const u_int8_t* ptr_buff);
int tools_open_preboot_flow_ctrl_size(void);
#define TOOLS_OPEN_PREBOOT_FLOW_CTRL_SIZE (0x4)
void tools_open_preboot_flow_ctrl_dump(const struct tools_open_preboot_flow_ctrl *ptr_struct, FILE* file);
+/* preboot_boot_settings */
+void tools_open_preboot_boot_settings_pack(const struct tools_open_preboot_boot_settings *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_preboot_boot_settings_unpack(struct tools_open_preboot_boot_settings *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_preboot_boot_settings_print(const struct tools_open_preboot_boot_settings *ptr_struct, FILE* file, int indent_level);
+int tools_open_preboot_boot_settings_size(void);
+#define TOOLS_OPEN_PREBOOT_BOOT_SETTINGS_SIZE (0x4)
+void tools_open_preboot_boot_settings_dump(const struct tools_open_preboot_boot_settings *ptr_struct, FILE* file);
/* boot_settings */
void tools_open_boot_settings_pack(const struct tools_open_boot_settings *ptr_struct, u_int8_t* ptr_buff);
void tools_open_boot_settings_unpack(struct tools_open_boot_settings *ptr_struct, const u_int8_t* ptr_buff);
int tools_open_iscsi_settings_size(void);
#define TOOLS_OPEN_ISCSI_SETTINGS_SIZE (0xc)
void tools_open_iscsi_settings_dump(const struct tools_open_iscsi_settings *ptr_struct, FILE* file);
+/* port_boot_state */
+void tools_open_port_boot_state_pack(const struct tools_open_port_boot_state *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_port_boot_state_unpack(struct tools_open_port_boot_state *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_port_boot_state_print(const struct tools_open_port_boot_state *ptr_struct, FILE* file, int indent_level);
+int tools_open_port_boot_state_size(void);
+#define TOOLS_OPEN_PORT_BOOT_STATE_SIZE (0x4)
+void tools_open_port_boot_state_dump(const struct tools_open_port_boot_state *ptr_struct, FILE* file);
/* pci_configuration */
void tools_open_pci_configuration_pack(const struct tools_open_pci_configuration *ptr_struct, u_int8_t* ptr_buff);
void tools_open_pci_configuration_unpack(struct tools_open_pci_configuration *ptr_struct, const u_int8_t* ptr_buff);
void tools_open_pci_capabilities_unpack(struct tools_open_pci_capabilities *ptr_struct, const u_int8_t* ptr_buff);
void tools_open_pci_capabilities_print(const struct tools_open_pci_capabilities *ptr_struct, FILE* file, int indent_level);
int tools_open_pci_capabilities_size(void);
-#define TOOLS_OPEN_PCI_CAPABILITIES_SIZE (0x18)
+#define TOOLS_OPEN_PCI_CAPABILITIES_SIZE (0x14)
void tools_open_pci_capabilities_dump(const struct tools_open_pci_capabilities *ptr_struct, FILE* file);
/* tpt_configuration */
void tools_open_tpt_configuration_pack(const struct tools_open_tpt_configuration *ptr_struct, u_int8_t* ptr_buff);
int tools_open_tpt_capabilities_size(void);
#define TOOLS_OPEN_TPT_CAPABILITIES_SIZE (0x4)
void tools_open_tpt_capabilities_dump(const struct tools_open_tpt_capabilities *ptr_struct, FILE* file);
+/* infiniband_dc_settings */
+void tools_open_infiniband_dc_settings_pack(const struct tools_open_infiniband_dc_settings *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_infiniband_dc_settings_unpack(struct tools_open_infiniband_dc_settings *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_infiniband_dc_settings_print(const struct tools_open_infiniband_dc_settings *ptr_struct, FILE* file, int indent_level);
+int tools_open_infiniband_dc_settings_size(void);
+#define TOOLS_OPEN_INFINIBAND_DC_SETTINGS_SIZE (0x8)
+void tools_open_infiniband_dc_settings_dump(const struct tools_open_infiniband_dc_settings *ptr_struct, FILE* file);
+/* infiniband_dc_capabilities */
+void tools_open_infiniband_dc_capabilities_pack(const struct tools_open_infiniband_dc_capabilities *ptr_struct, u_int8_t* ptr_buff);
+void tools_open_infiniband_dc_capabilities_unpack(struct tools_open_infiniband_dc_capabilities *ptr_struct, const u_int8_t* ptr_buff);
+void tools_open_infiniband_dc_capabilities_print(const struct tools_open_infiniband_dc_capabilities *ptr_struct, FILE* file, int indent_level);
+int tools_open_infiniband_dc_capabilities_size(void);
+#define TOOLS_OPEN_INFINIBAND_DC_CAPABILITIES_SIZE (0x10)
+void tools_open_infiniband_dc_capabilities_dump(const struct tools_open_infiniband_dc_capabilities *ptr_struct, FILE* file);
/* wol */
void tools_open_wol_pack(const struct tools_open_wol *ptr_struct, u_int8_t* ptr_buff);
void tools_open_wol_unpack(struct tools_open_wol *ptr_struct, const u_int8_t* ptr_buff);
0, // vsec_sem_supported
},
{
- DeviceSwitchEN, // dev_id
+ DeviceSpectrum, // dev_id
{0xa24f8}, // hw_sem_addr
0, // vsec_sem_supported
},