[MTHCA/VSTAT] added print of PCIE link capabilities

git-svn-id: svn://openib.tc.cornell.edu/gen1@585 ad392aa1-c5ef-ae45-8dd8-e69d62a5ef86

diff --git a/trunk/hw/mthca/kernel/hca_pci.c b/trunk/hw/mthca/kernel/hca_pci.c
index 5b077878701b1d56ccccb7658e6b60e02a837202..7f6afeb28a11422b0b8ddf07a475783992348f99 100644 (file)
--- a/trunk/hw/mthca/kernel/hca_pci.c
+++ b/trunk/hw/mthca/kernel/hca_pci.c
@@ -672,7 +672,11 @@ hca_tune_pci(
                p_uplink_info->bus_type = UPLINK_BUS_PCIE;\r
                if ((pPciExpCap->LinkStatus & 15) == 1)\r
                        p_uplink_info->u.pci_e.link_speed = UPLINK_BUS_PCIE_SDR;\r
+               if ((pPciExpCap->LinkStatus & 15) == 2)\r
+                       p_uplink_info->u.pci_e.link_speed = UPLINK_BUS_PCIE_DDR;\r
                p_uplink_info->u.pci_e.link_width = (uint8_t)((pPciExpCap->LinkStatus >> 4) & 0x03f);\r
+               p_uplink_info->u.pci_e.capabilities = (uint8_t)((pPciExpCap->LinkCapabilities >> 2) & 0xfc);\r
+               p_uplink_info->u.pci_e.capabilities |= pPciExpCap->LinkCapabilities & 3;\r
 \r
                if (g_tune_pci) {\r
                        /* Update Max_Read_Request_Size. */\r

diff --git a/trunk/inc/mthca/mthca_vc.h b/trunk/inc/mthca/mthca_vc.h
index 7309e25fd15bd3f108fe38943a068cabe8cbfedf..3fdf7fff6b56ba7531bc976eaeb51bad7b3691a3 100644 (file)
--- a/trunk/inc/mthca/mthca_vc.h
+++ b/trunk/inc/mthca/mthca_vc.h
@@ -64,9 +64,10 @@ typedef struct {
                        uint16_t        frequency;      /* in MHz */
                } pci_x;
                struct {
-                       uint8_t reserve;
+                       uint8_t capabilities;
                        uint8_t link_speed;             /* 1X link speed */
 #define UPLINK_BUS_PCIE_SDR    1       /* 2.5 Gbps */
+#define UPLINK_BUS_PCIE_DDR    2       /* 5 Gbps */
                        uint8_t link_width;             /* x1, x2, x4, x8, x12, x16, x32 */
                } pci_e;
        } u;

diff --git a/trunk/tools/vstat/user/vstat_main.c b/trunk/tools/vstat/user/vstat_main.c
index 391aeea2ba6f6c7eb7b8e49402831f55bf5ad564..9e219b530b9aae06fef70ef6c64a4e17547cd0a0 100644 (file)
--- a/trunk/tools/vstat/user/vstat_main.c
+++ b/trunk/tools/vstat/user/vstat_main.c
@@ -197,7 +197,7 @@ void printPortInfo(ib_port_attr_t* portPtr, BOOLEAN fullPrint){
 void print_uplink_info(ib_ca_attr_t* ca_attr)\r
 {\r
        uplink_info_t*p_uplink_info = mthca_get_uplink_info(ca_attr);\r
-       char *bus_type, *link_speed;\r
+       char *bus_type, *link_speed, cap;\r
        int freq;\r
 \r
        switch (p_uplink_info->bus_type) {\r
@@ -218,12 +218,17 @@ void print_uplink_info(ib_ca_attr_t* ca_attr)
                        return;\r
 \r
                case UPLINK_BUS_PCIE:\r
+                       cap = p_uplink_info->u.pci_e.capabilities;\r
                        if (p_uplink_info->u.pci_e.link_speed == UPLINK_BUS_PCIE_SDR)\r
                                link_speed = "2.5 Gbps";\r
+                       else\r
+                       if (p_uplink_info->u.pci_e.link_speed == UPLINK_BUS_PCIE_DDR)\r
+                               link_speed = "5.0 Gbps";\r
                        else\r
                                link_speed = "unknown";\r
-                       printf("\tuplink={BUS=%s, SPEED=%s, WIDTH=x%d}\n",\r
-                               bus_type, link_speed, p_uplink_info->u.pci_e.link_width ); \r
+                       printf("\tuplink={BUS=%s, SPEED=%s, WIDTH=x%d, CAPS=%s*x%d}\n",\r
+                               bus_type, link_speed, p_uplink_info->u.pci_e.link_width,\r
+                               (cap&1) ? "2.5" : "5", cap>>2 ); \r
                        return;\r
        }\r
 }\r