refresh (create temporary patch)

diff --git a/meta b/meta
index 37ae158a1f52bb34470fb0cc36e404bf97cd7d08..f7d867e4e09fa50942e488000c138887acb929b1 100644 (file)
--- a/meta
+++ b/meta
@@ -1,10 +1,11 @@
 Version: 1
-Previous: ab0aa9312bf41e227f20ad665514315da44a90f6
-Head: 7a346b41aeabbe5cf651fe574231777b10e39180
+Previous: 72bcfcf2b2bdb558d428fe7ea4b454895282f288
+Head: 7ea22c6bfd3b632566593a0ac7f33b617963f539
 Applied:
   verbs-ext: b3d744f488bc97442df7e6cef8536d3b0352a786
   xrcd: 07cc711dd4091666de3c99545c64578ce6472da7
   srq_ex: 7a346b41aeabbe5cf651fe574231777b10e39180
+  refresh-temp: 7ea22c6bfd3b632566593a0ac7f33b617963f539
 Unapplied:
   compat-ex: 7cb34472bd00bc286569b726c7d38c6dd0dfe3b0
   xrc_qp: 6c98944a89c8f725d08f68a938954e10c7f09450

diff --git a/patches/refresh-temp b/patches/refresh-temp
new file mode 100644 (file)
index 0000000..ee853ef
--- /dev/null
+++ b/patches/refresh-temp
@@ -0,0 +1,51 @@
+Bottom: a5f0f26822bf3623757cf999d1b2802ffe0f2bd9
+Top:    784a386f91d98852fe49e15ccf421e6423e8e596
+Author: Sean Hefty <sean.hefty@intel.com>
+Date:   2012-09-26 11:19:31 -0700
+
+Refresh of srq_ex
+
+---
+
+diff --git a/src/cmd.c b/src/cmd.c
+index cbdcfdb..68146ad 100644
+--- a/src/cmd.c
++++ b/src/cmd.c
+@@ -513,26 +513,26 @@ int ibv_cmd_create_srq_ex(struct ibv_pd *pd,
+ 
+       VALGRIND_MAKE_MEM_DEFINED(resp, resp_size);
+ 
+-      srq->handle           = resp->srq_handle;
+-      srq->context          = pd->context;
+-      srq->srq_context      = srq_init_attr_ex->srq_context;
+-      srq->pd               = pd;
+-      srq->events_completed = 0;
+-      pthread_mutex_init(&srq->mutex, NULL);
+-      pthread_cond_init(&srq->cond, NULL);
++      srq->srq.handle           = resp->srq_handle;
++      srq->srq.context          = pd->context;
++      srq->srq.srq_context      = attr_ex->srq_context;
++      srq->srq.pd               = pd;
++      srq->srq.events_completed = 0;
++      pthread_mutex_init(&srq->srq.mutex, NULL);
++      pthread_cond_init(&srq->srq.cond, NULL);
+ 
+       srq->comp_mask |= IBV_SRQ_INIT_ATTR_TYPE;
+-      srq->srq_type = (srq_init_attr_ex->comp_mask & IBV_SRQ_INIT_ATTR_TYPE) ?
+-                      srq_init_attr_ex->srq_type : IBV_SRQT_BASIC;
++      srq->srq_type = (attr_ex->comp_mask & IBV_SRQ_INIT_ATTR_TYPE) ?
++                      attr_ex->srq_type : IBV_SRQT_BASIC;
+       if (srq->srq_type == IBV_SRQT_XRC) {
+               srq->comp_mask |= IBV_SRQ_NUM;
+               srq->srq_num = resp->srqn;
+       }
+-      if (srq_init_attr_ex->comp_mask & IBV_SRQ_INIT_ATTR_XRCD) {
++      if (attr_ex->comp_mask & IBV_SRQ_INIT_ATTR_XRCD) {
+               srq->comp_mask |= IBV_SRQ_XRCD;
+               srq->xrcd = vxrcd;
+       }
+-      if (srq_init_attr_ex->comp_mask & IBV_SRQ_INIT_ATTR_CQ) {
++      if (attr_ex->comp_mask & IBV_SRQ_INIT_ATTR_CQ) {
+               srq->comp_mask |= IBV_SRQ_CQ;
+               srq->cq = srq_init_attr_ex->cq;
+       }