u_int32_t lock_val;
u_int32_t counter = 0;
int retries = 0;
-
if (!state) {// unlock
WRITE4_PCI(mf, 0, CAP9_ADDR + PCI_SEMAPHORE_OFFSET, "unlock semaphore", return ME_PCI_WRITE_ERROR);
} else { // lock
READ4_PCI(mf, &lock_val, CAP9_ADDR + PCI_SEMAPHORE_OFFSET, "read counter", return ME_PCI_READ_ERROR);
if (lock_val) { //semaphore is taken
retries++;
- msleep(3); // wait for current op to end
+ msleep(1); // wait for current op to end
continue;
}
//read ticket
READ4_PCI(mf, &flag, CAP9_ADDR + PCI_ADDR_OFFSET, "read flag", return ME_PCI_READ_ERROR);
flag = EXTRACT(flag, PCI_FLAG_BIT_OFFS, 1);
retries++;
+ if ((retries & 0xf) == 0) {// dont sleep always
+ msleep(1);
+ }
} while (flag != expected_val);
return ME_OK;
}
return ME_OK;
}
-// adrianc: no support for auto-increment feature atm
-int mtcr_pciconf_send_pci_cmd_int(mfile *mf, int space, unsigned int offset, u_int32_t* data, int rw)
+int mtcr_pciconf_rw(mfile *mf, unsigned int offset, u_int32_t* data, int rw)
{
int rc = ME_OK;
u_int32_t address = offset;
- if ((offset >> 24) & 0xc) {
+ //last 2 bits must be zero as we only allow 30 bits addresses
+ if (EXTRACT(address, 30, 2)) {
return ME_BAD_PARAMS;
}
+
+ address = MERGE(address,(rw ? 1 : 0), PCI_FLAG_BIT_OFFS, 1);
+ if (rw == WRITE_OP) {
+ // write data
+ WRITE4_PCI(mf, *data, CAP9_ADDR + PCI_DATA_OFFSET, "write value", return ME_PCI_WRITE_ERROR);
+ // write address
+ WRITE4_PCI(mf, address, CAP9_ADDR + PCI_ADDR_OFFSET, "write offset", return ME_PCI_WRITE_ERROR);
+ // wait on flag
+ rc = mtcr_pciconf_wait_on_flag(mf, 0);
+ } else {
+ // write address
+ WRITE4_PCI(mf, address, CAP9_ADDR + PCI_ADDR_OFFSET, "write offset", return ME_PCI_WRITE_ERROR);
+ // wait on flag
+ rc = mtcr_pciconf_wait_on_flag(mf, 1);
+ // read data
+ READ4_PCI(mf, data, CAP9_ADDR + PCI_DATA_OFFSET, "read value", return ME_PCI_READ_ERROR);
+ }
+ return rc;
+}
+
+int mtcr_pciconf_send_pci_cmd_int(mfile *mf, int space, unsigned int offset, u_int32_t* data, int rw)
+{
+ int rc = ME_OK;
+
// take semaphore
rc = mtcr_pciconf_cap9_sem(mf, 1);
if (rc) {
if (rc) {
goto cleanup;
}
- address = MERGE(address,(rw ? 1 : 0), PCI_FLAG_BIT_OFFS, 1);
- if (rw) {
- // write data
- WRITE4_PCI(mf, *data, CAP9_ADDR + PCI_DATA_OFFSET, "write value", rc = ME_PCI_WRITE_ERROR; goto cleanup);
- // write address
- WRITE4_PCI(mf, address, CAP9_ADDR + PCI_ADDR_OFFSET, "write offset", rc = ME_PCI_WRITE_ERROR; goto cleanup);
- // wait on flag
- mtcr_pciconf_wait_on_flag(mf, 0);
- } else {
- // write address
- WRITE4_PCI(mf, address, CAP9_ADDR + PCI_ADDR_OFFSET, "write offset", rc = ME_PCI_WRITE_ERROR; goto cleanup);
- // wait on flag
- mtcr_pciconf_wait_on_flag(mf, 1);
- // read data
- READ4_PCI(mf, data, CAP9_ADDR + PCI_DATA_OFFSET, "read value", rc = ME_PCI_READ_ERROR; goto cleanup);
- }
+ // read/write the data
+ rc = mtcr_pciconf_rw(mf, offset, data, rw);
cleanup:
+ // clear semaphore
mtcr_pciconf_cap9_sem(mf, 0);
return rc;
}
return 4;
}
+static int block_op_pciconf(mfile *mf, unsigned int offset, u_int32_t* data, int length, int rw)
+{
+ int i;
+ int rc = ME_OK;
+ int wrote_or_read = length;
+ if (length % 4) {
+ return -1;
+ }
+ // lock semaphore and set address space
+ rc = mtcr_pciconf_cap9_sem(mf, 1);
+ if (rc) {
+ return -1;
+ }
+ // set address space
+ rc = mtcr_pciconf_set_addr_space(mf, mf->address_domain);
+ if (rc) {
+ wrote_or_read = -1;
+ goto cleanup;
+ }
+
+ for (i = 0; i < length ; i += 4) {
+ if (mtcr_pciconf_rw(mf, offset + i, &(data[(i >> 2)]), rw)) {
+ wrote_or_read = i;
+ goto cleanup;
+ }
+ }
+cleanup:
+ mtcr_pciconf_cap9_sem(mf, 0);
+ return wrote_or_read;
+}
+
+static int
+mread4_block_pciconf(mfile *mf, unsigned int offset, u_int32_t* data, int length)
+{
+ return block_op_pciconf(mf, offset, data, length, READ_OP);
+}
+
+static int
+mwrite4_block_pciconf(mfile *mf, unsigned int offset, u_int32_t* data, int length)
+{
+ return block_op_pciconf(mf, offset, data, length, WRITE_OP);
+}
int mtcr_pciconf_mread4_old(mfile *mf, unsigned int offset, u_int32_t *value)
{
mf->address_domain = CR_SPACE_DOMAIN;
mf->mread4 = mtcr_pciconf_mread4;
mf->mwrite4 = mtcr_pciconf_mwrite4;
+ mf->mread4_block = mread4_block_pciconf;
+ mf->mwrite4_block = mwrite4_block_pciconf;
} else {
mf->mread4 = mtcr_pciconf_mread4_old;
mf->mwrite4 = mtcr_pciconf_mwrite4_old;
+ mf->mread4_block = mread_chunk_as_multi_mread4;
+ mf->mwrite4_block = mwrite_chunk_as_multi_mwrite4;
}
- mf->mread4_block = mread_chunk_as_multi_mread4;
- mf->mwrite4_block = mwrite_chunk_as_multi_mwrite4;
mf->mclose = mtcr_pciconf_mclose;
/* Kernels before 2.6.12 carry the high bit in each byte
int mread4_block (mfile *mf, unsigned int offset, u_int32_t* data, int byte_len)
{
- return mread_chunk_as_multi_mread4(mf, offset, data, byte_len);
+ return mf->mread4_block(mf, offset, data, byte_len);
}
int mwrite4_block (mfile *mf, unsigned int offset, u_int32_t* data, int byte_len)
{
- return mwrite_chunk_as_multi_mwrite4(mf, offset, data, byte_len);
+ return mf->mwrite4_block(mf, offset, data, byte_len);
}
int msw_reset(mfile *mf)
free(dev_info);
}
-mfile *mopen(const char *name)
-{
- return mopen_adv(name, MTCR_ACCESS_AUTO);
-}
-mfile *mopen_adv(const char *name, mtcr_access_method_t access_method)
+mfile *mopen(const char *name)
{
mfile *mf;
off_t offset;
goto open_failed;
}
}
- // update access according to access method
- // if access_method != MTCR_ACCESS_AUTO then we only allow to open conf as memory and via versa
- if (access_method == MTCR_ACCESS_AUTO || access_method == access) {
- ;
- } else if (access_method == MTCR_ACCESS_INBAND) {
- char inband_dev[16] = {0};
- if (get_inband_dev_from_pci(inband_dev, mf->dev_name)) {
- goto open_failed;
- }
- free(mf->dev_name);
- mf->dev_name = strdup(name);
- if (!mf->dev_name) {
- goto open_failed;
- }
- force = 1;
- access = access_method;
- } else {
- access = access_method;
- }
if (force) {
switch (access) {
u_int32_t w_size_reg,
int *reg_status)
{
+
int rc;
if (mf == NULL || reg_data == NULL || reg_status == NULL || reg_size <= 0) {
return ME_BAD_PARAMS;
return ME_REG_ACCESS_NOT_SUPPORTED;
}
#endif
-
+ //printf("-D- reg_id:0x%x, reg_size 0x%x, reg_status=0x%x, rc=0x%x\n", reg_id, reg_size, (unsigned int)*reg_status, (unsigned int)rc);
if (rc ) {
return rc;
} else if (*reg_status) {
//put the reg itself into the buffer
memcpy(buffer + OP_TLV_SIZE + REG_TLV_HEADER_LEN, reg_data, reg_size);
cmdif_size += reg_size;
-
#ifdef _ENABLE_DEBUG_
fprintf(stdout, "-I-Tlv's of Data Sent:\n");
fprintf(stdout, "\tOperation Tlv\n");
#define VCR_CTRL_ADDR 0x0
#define VCR_SEMAPHORE62 0x0 // semaphore Domain
-#define VCR_CMD_ADDR 0x1000000 // mailbox addr
+#define VCR_CMD_ADDR 0x100000 // mailbox addr
#define VCR_CMD_SIZE_ADDR 0x1000 // mailbox size
/*
mf->address_domain = AD_CR_SPACE;\
}while(0)
-
+//#define _DEBUG_MODE
#ifdef _DEBUG_MODE
#define DBG_PRINTF(...) fprintf(stderr, __VA_ARGS__)
#else
*/
static int set_opcode(mfile *mf, u_int16_t opcode) {
u_int32_t reg;
-
+ DBG_PRINTF("-D- in set_opcode\n");
MREAD4_ICMD(mf, mf->icmd.ctrl_addr, ®, return ME_ICMD_STATUS_CR_FAIL);
reg = MERGE(reg, opcode, OPCODE_BITOFF, OPCODE_BITLEN);
MWRITE4_ICMD(mf, mf->icmd.ctrl_addr, reg, return ME_ICMD_STATUS_CR_FAIL);
}
static int get_status(mfile *mf) {
u_int32_t reg;
-
+ DBG_PRINTF("-D- int get_status()");
MREAD4_ICMD(mf, mf->icmd.ctrl_addr, ®, return ME_ICMD_STATUS_CR_FAIL);
return translate_status(EXTRACT(reg, STATUS_BITOFF, STATUS_BITLEN));
}
*/
static int icmd_is_cmd_ifc_ready(mfile *mf) {
u_int32_t reg;
+ DBG_PRINTF("-D- in icmd_is_cmd_ifc_ready()\n");
if (MREAD4(mf, mf->icmd.static_cfg_not_done_addr, ®)) return ME_ICMD_STATUS_CR_FAIL;
u_int32_t bit_val = EXTRACT(reg, mf->icmd.static_cfg_not_done_offs, 1);
/* adrianc: for SWITCHIB the polarity of this bit is opposite than CONNECTIB/CONNECTX4
if (!skip_write)
{
+ DBG_PRINTF("-D- Writing command to mailbox");
MWRITE_BUF_ICMD(mf, mf->icmd.cmd_addr, data, write_data_size, ret=ME_ICMD_STATUS_CR_FAIL; goto cleanup;);
}
if ((ret = get_status(mf))) {
goto cleanup;
}
-
+ DBG_PRINTF("-D- Reading command from mailbox");
MREAD_BUF_ICMD(mf, mf->icmd.cmd_addr, data, read_data_size, ret=ME_ICMD_STATUS_CR_FAIL; goto cleanup;);
ret = ME_OK;
GET_ADDR(mf,STAT_CFG_NOT_DONE_ADDR_CIB, STAT_CFG_NOT_DONE_ADDR_CX4, STAT_CFG_NOT_DONE_ADDR_SW_IB, mf->icmd.static_cfg_not_done_addr);
GET_ADDR(mf, STAT_CFG_NOT_DONE_BITOFF_CIB, STAT_CFG_NOT_DONE_BITOFF_CIB, STAT_CFG_NOT_DONE_BITOFF_SW_IB, mf->icmd.static_cfg_not_done_offs);
mf->icmd.icmd_opened = 1;
+ DBG_PRINTF("-D- iCMD command addr: 0x%x\n", mf->icmd.cmd_addr);
+ DBG_PRINTF("-D- iCMD ctrl addr: 0x%x\n", mf->icmd.ctrl_addr);
+ DBG_PRINTF("-D- iCMD semaphore addr(semaphore space): 0x%x\n", mf->icmd.semaphore_addr);
+ DBG_PRINTF("-D- iCMD max mailbox size: 0x%x\n", mf->icmd.max_cmd_size);
+ DBG_PRINTF("-D- iCMD stat_cfg_not_done addr: 0x%x:%d\n", mf->icmd.static_cfg_not_done_addr, mf->icmd.static_cfg_not_done_offs);
return ME_OK;
}