]> git.openfabrics.org - ~shefty/rdma-dev.git/commitdiff
ARM: GIC: private a standard get_irqnr_preamble assembler macro
authorRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 5 Dec 2010 08:51:38 +0000 (08:51 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Tue, 14 Dec 2010 19:21:47 +0000 (19:21 +0000)
Provide a standard get_irqnr_preamble assembler macro for platforms
to use, which retrieves the base address of the GIC CPU interface
from gic_cpu_base_addr.  Allow platforms to override this by defining
HAVE_GET_IRQNR_PREAMBLE.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/include/asm/hardware/entry-macro-gic.S
arch/arm/mach-cns3xxx/include/mach/entry-macro.S
arch/arm/mach-omap2/include/mach/entry-macro.S
arch/arm/mach-realview/include/mach/entry-macro.S
arch/arm/mach-tegra/include/mach/entry-macro.S
arch/arm/mach-ux500/include/mach/entry-macro.S
arch/arm/mach-vexpress/include/mach/entry-macro.S

index 05587f125a132299fca5f2a94d3905de2395389c..c115b82fe80a4ce8807b0de04b9c53d647c9aa12 100644 (file)
 
 #include <asm/hardware/gic.h>
 
+#ifndef HAVE_GET_IRQNR_PREAMBLE
+       .macro  get_irqnr_preamble, base, tmp
+       ldr     \base, =gic_cpu_base_addr
+       ldr     \base, [\base]
+       .endm
+#endif
+
 /*
  * The interrupt numbering scheme is defined in the
  * interrupt controller spec.  To wit:
index e793c3376728589aa55d63bc2a1927b15e2e979b..6bd83ed90afe33523c047b7bb22f8cf63c4b94a0 100644 (file)
                .macro  disable_fiq
                .endm
 
-               .macro  get_irqnr_preamble, base, tmp
-               ldr     \base, =gic_cpu_base_addr
-               ldr     \base, [\base]
-               .endm
-
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
index 2e358df3fe19e3ca9dd169f74f1bae287cc4bef7..d54c4f89a8bd0b912dc9f5da70e31e5305d1e2ce 100644 (file)
@@ -170,6 +170,7 @@ omap_irq_base:      .word   0
 
 
 #ifdef CONFIG_ARCH_OMAP4
+#define HAVE_GET_IRQNR_PREAMBLE
 #include <asm/hardware/entry-macro-gic.S>
 
                .macro  get_irqnr_preamble, base, tmp
index 4417b10396156baefe81da304e63e0219d63a48f..4071164aebaaafe9872b0557c599d5788a3b9859 100644 (file)
                .macro  disable_fiq
                .endm
 
-               .macro  get_irqnr_preamble, base, tmp
-               ldr     \base, =gic_cpu_base_addr
-               ldr     \base, [\base]
-               .endm
-
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
 
index dc0924915183d9de05cb226ed0b4348b9ed77e48..dd165c53889de61d499731f8e5b6da8fc88d5d55 100644 (file)
@@ -16,7 +16,7 @@
 #include <mach/io.h>
 
 #if defined(CONFIG_ARM_GIC)
-
+#define HAVE_GET_IRQNR_PREAMBLE
 #include <asm/hardware/entry-macro-gic.S>
 
        /* Uses the GIC interrupt controller built into the cpu */
index 3cc3cdf551800deda6bedb13617c72bfdb760ea4..a37f585a3ecbbca21270c78a13681c1955f06c4c 100644 (file)
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 #include <mach/hardware.h>
+#define HAVE_GET_IRQNR_PREAMBLE
 #include <asm/hardware/entry-macro-gic.S>
 
                .macro  disable_fiq
index 19d5ac8ba07182d2a34be57fc412a99d8d640639..73c11297509ed4bf9cfdefad92b831aab9495218 100644 (file)
@@ -3,10 +3,5 @@
        .macro  disable_fiq
        .endm
 
-       .macro  get_irqnr_preamble, base, tmp
-       ldr     \base, =gic_cpu_base_addr
-       ldr     \base, [\base]
-       .endm
-
        .macro  arch_ret_to_user, tmp1, tmp2
        .endm