]> git.openfabrics.org - ~shefty/rdma-dev.git/commitdiff
ath9k: optimize power level initialization for CTL_[25]GHT20
authorGabor Juhos <juhosg@openwrt.org>
Thu, 2 Aug 2012 14:00:51 +0000 (16:00 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 6 Aug 2012 19:12:43 +0000 (15:12 -0400)
The first part of the power array is initialized in a loop
and the last two values are initialized separately. Extend
the loop to cover the last two items, and remove the separate
initialization.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c

index 2588848f4a822a1bf879ce447f9f146c5e186873..a2aa80f2c210a5c4e09f150525fd9b2787d15bdd 100644 (file)
@@ -4963,16 +4963,10 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
                        case CTL_5GHT20:
                        case CTL_2GHT20:
                                for (i = ALL_TARGET_HT20_0_8_16;
-                                    i <= ALL_TARGET_HT20_21; i++)
+                                    i <= ALL_TARGET_HT20_23; i++)
                                        pPwrArray[i] =
                                          (u8)min((u16)pPwrArray[i],
                                                  minCtlPower);
-                               pPwrArray[ALL_TARGET_HT20_22] =
-                                 (u8)min((u16)pPwrArray[ALL_TARGET_HT20_22],
-                                         minCtlPower);
-                               pPwrArray[ALL_TARGET_HT20_23] =
-                                 (u8)min((u16)pPwrArray[ALL_TARGET_HT20_23],
-                                          minCtlPower);
                                break;
                        case CTL_5GHT40:
                        case CTL_2GHT40: