IBV_ACCESS_MW_BIND = (1<<4)
};
+enum ibv_pd_mask {
+ IBV_PD_RESERVED = 1 << 0
+};
+
struct ibv_pd {
struct ibv_context *context;
uint32_t handle;
+ uint32_t comp_mask;
};
enum ibv_rereg_mr_flags {
IBV_REREG_MR_KEEP_VALID = (1 << 3)
};
+enum ibv_mr_mask {
+ IBV_MR_RESERVED = 1 << 0
+};
+
struct ibv_mr {
struct ibv_context *context;
struct ibv_pd *pd;
uint32_t handle;
uint32_t lkey;
uint32_t rkey;
+ uint32_t comp_mask;
};
enum ibv_mw_type {
IBV_MW_TYPE_2 = 2
};
+enum ibv_mw_mask {
+ IBV_MW_RESERVED = 1 << 0
+};
+
struct ibv_mw {
struct ibv_context *context;
struct ibv_pd *pd;
uint32_t rkey;
+ uint32_t comp_mask;
};
struct ibv_global_route {
int mw_access_flags;
};
+enum ibv_srq_mask {
+ IBV_SRQ_RESERVED = 1 << 0
+};
+
struct ibv_srq {
struct ibv_context *context;
void *srq_context;
pthread_mutex_t mutex;
pthread_cond_t cond;
uint32_t events_completed;
+
+ uint32_t comp_mask;
+};
+
+enum ibv_qp_mask {
+ IBV_QP_RESERVED = 1 << 0
};
struct ibv_qp {
pthread_mutex_t mutex;
pthread_cond_t cond;
uint32_t events_completed;
+
+ uint32_t comp_mask;
+};
+
+enum ibv_comp_channel_mask {
+ IBV_COMP_CHANNEL_RESERVED = 1 << 0
};
struct ibv_comp_channel {
struct ibv_context *context;
int fd;
int refcnt;
+
+ uint32_t comp_mask;
+};
+
+enum ibv_cq_mask {
+ IBV_CQ_RESERVED = 1 << 0
};
struct ibv_cq {
pthread_cond_t cond;
uint32_t comp_events_completed;
uint32_t async_events_completed;
+
+ uint32_t comp_mask;
+};
+
+enum ibv_ah_mask {
+ IBV_AH_RESERVED = 1 << 0
};
struct ibv_ah {
struct ibv_context *context;
struct ibv_pd *pd;
uint32_t handle;
+
+ uint32_t comp_mask;
};
struct ibv_device;