xeon-phi: mlx5_ib bug fix releated to large memory regions registration.

Issue described in the release notes for Mellanox OFED 2.4-1.0.4
(page 12, bug fix item number 8) also effects xeon-phi's ability to
use the mlx5_ib is kernel-mode, i.e. ipoib and other ulp's.

Descripion for those release notes:

"Fixed an issue related to large memory regions registration. The problem
 mainly occurred on PPC systems due to the large page size, and on non PPC
 systems with large pages (contig pages)"

Signed-off-by: Jay Sternberg <jay.e.sternberg@intel.com>

diff --git a/tech-preview/xeon-phi/0014-mlx5-get_dma_mr-workaround.patch b/tech-preview/xeon-phi/0014-mlx5-get_dma_mr-workaround.patch
new file mode 100644 (file)
index 0000000..ab9049b
--- /dev/null
+++ b/tech-preview/xeon-phi/0014-mlx5-get_dma_mr-workaround.patch
@@ -0,0 +1,16 @@
+xeon-phi: workaround mlx5_ib issue for card-side ib_get_dma_mr support
+
+Workaround a memory region registration issue due to large (contig) pages.
+---
+diff -Nrup a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
+--- a/drivers/infiniband/hw/mlx5/mr.c  2015-11-24 01:14:56.000000000 -0800
++++ b/drivers/infiniband/hw/mlx5/mr.c  2016-02-18 15:41:03.901148829 -0800
+@@ -665,7 +665,7 @@ static int get_octo_len(u64 addr, u64 le
+ 
+ static int use_umr(int order)
+ {
+-      return order <= 17;
++      return order <= 13;
+ }
+ 
+ static void prep_umr_reg_wqe(struct ib_pd *pd, struct ib_send_wr *wr,