ARM: EXYNOS: Turn off clocks for NAND, OneNAND and TSI controllers

The clocks for NAND, OneNAND and Transport Stream Interface(TSI)
controllers could be either enabled or disabled at boot. To ensure
that these are turned off until used, add them to the list of clocks
to be turned off during boot.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 2f51293c18757712621bb26723f10d1ced8099dd..7cc5491e22b51ef852716e6e2e3bbb55027338f3 100644 (file)
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -500,6 +500,10 @@ static struct clk exynos4_init_clocks_off[] = {
                .devname        = "exynos4-fimc.3",
                .enable         = exynos4_clk_ip_cam_ctrl,
                .ctrlbit        = (1 << 3),
+       }, {
+               .name           = "tsi",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1 << 4),
        }, {
                .name           = "hsmmc",
                .devname        = "exynos4-sdhci.0",
@@ -529,6 +533,14 @@ static struct clk exynos4_init_clocks_off[] = {
                .parent         = &exynos4_clk_aclk_133.clk,
                .enable         = exynos4_clk_ip_fsys_ctrl,
                .ctrlbit        = (1 << 9),
+       }, {
+               .name           = "onenand",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1 << 15),
+       }, {
+               .name           = "nfcon",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1 << 16),
        }, {
                .name           = "dac",
                .devname        = "s5p-sdo",