KVM: PPC: Book3S HV: Access host lppaca and shadow slb in BE

Some data structures are always stored in big endian. Among those are the LPPACA
fields as well as the shadow slb. These structures might be shared with a
hypervisor.

So whenever we access those fields, make sure we do so in big endian byte order.

Signed-off-by: Alexander Graf <agraf@suse.de>

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index e66c1e388ddf5adf1c0fbd87a38e24c3f24696c4..bf5270ef09a57d4ca7112701a78c37a51132d98c 100644 (file)
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -32,10 +32,6 @@
 
 #define VCPU_GPRS_TM(reg) (((reg) * ULONG_SIZE) + VCPU_GPR_TM)
 
-#ifdef __LITTLE_ENDIAN__
-#error Need to fix lppaca and SLB shadow accesses in little endian mode
-#endif
-
 /* Values in HSTATE_NAPPING(r13) */
 #define NAPPING_CEDE   1
 #define NAPPING_NOVCPU 2
@@ -595,9 +591,10 @@ kvmppc_got_guest:
        ld      r3, VCPU_VPA(r4)
        cmpdi   r3, 0
        beq     25f
-       lwz     r5, LPPACA_YIELDCOUNT(r3)
+       li      r6, LPPACA_YIELDCOUNT
+       LWZX_BE r5, r3, r6
        addi    r5, r5, 1
-       stw     r5, LPPACA_YIELDCOUNT(r3)
+       STWX_BE r5, r3, r6
        li      r6, 1
        stb     r6, VCPU_VPA_DIRTY(r4)
 25:
@@ -1442,9 +1439,10 @@ END_FTR_SECTION_IFCLR(CPU_FTR_TM)
        ld      r8, VCPU_VPA(r9)        /* do they have a VPA? */
        cmpdi   r8, 0
        beq     25f
-       lwz     r3, LPPACA_YIELDCOUNT(r8)
+       li      r4, LPPACA_YIELDCOUNT
+       LWZX_BE r3, r8, r4
        addi    r3, r3, 1
-       stw     r3, LPPACA_YIELDCOUNT(r8)
+       STWX_BE r3, r8, r4
        li      r3, 1
        stb     r3, VCPU_VPA_DIRTY(r9)
 25:
@@ -1757,8 +1755,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
 33:    ld      r8,PACA_SLBSHADOWPTR(r13)
 
        .rept   SLB_NUM_BOLTED
-       ld      r5,SLBSHADOW_SAVEAREA(r8)
-       ld      r6,SLBSHADOW_SAVEAREA+8(r8)
+       li      r3, SLBSHADOW_SAVEAREA
+       LDX_BE  r5, r8, r3
+       addi    r3, r3, 8
+       LDX_BE  r6, r8, r3
        andis.  r7,r5,SLB_ESID_V@h
        beq     1f
        slbmte  r6,r5