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MIPS: Netlogic: Split XLP L1 i-cache among threads
authorJayachandran C <jchandra@broadcom.com>
Mon, 14 Jan 2013 15:11:56 +0000 (15:11 +0000)
committerJohn Crispin <blogic@openwrt.org>
Sat, 16 Feb 2013 23:15:20 +0000 (00:15 +0100)
commita69ba6293d11b7dfd395a742f3449d6ddda8ecad
tree3a075124416c51c5548e93fa6e2803e22682d021tree | snapshot
parenta264b5e8dc3cae1b07cea010d6283be6e67b0209commit | diff
MIPS: Netlogic: Split XLP L1 i-cache among threads

Since we now use r4k cache code for Netlogic XLP, it is
better to split L1 icache among the active threads, so that
threads won't step on each other while flushing icache.

The L1 dcache is already split among the threads in the core.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4787/
Signed-off-by: John Crispin <blogic@openwrt.org>
arch/mips/include/asm/netlogic/xlp-hal/cpucontrol.h diff | blob | history
arch/mips/netlogic/common/smpboot.S diff | blob | history
Emulex OneConnect RDMA Driver