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(parent: 1d7c71a) | patch
drm/nouveau/fifo/nvc0-: use interrupt 31 as an event trigger
authorBen Skeggs <bskeggs@redhat.com>
Thu, 31 Jan 2013 03:51:20 +0000 (13:51 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 20 Feb 2013 06:00:46 +0000 (16:00 +1000)
commit9bd2ddbaa241274cd11191838d080fc308ecf6c7
tree0e8ba52fb2034de4f3fcd977589e3a9bdad79b26tree | snapshot
parent1d7c71a3e2f77336df536855b0efd2dc5bdeb41bcommit | diff
drm/nouveau/fifo/nvc0-: use interrupt 31 as an event trigger

Generated if you try and use fifo method 0x20 on any subchannel, appears
that it can be safely masked off without stalling the whole GPU.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/core/engine/fifo/base.c diff | blob | history
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c diff | blob | history
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c diff | blob | history
drivers/gpu/drm/nouveau/core/include/engine/fifo.h diff | blob | history
RDMA kernel development