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(parent: ca18e14) | patch
gma500: Fix n, m1 and m2 clock limits for sdvo and lvds
authorPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Sat, 16 Feb 2013 12:04:21 +0000 (13:04 +0100)
committerDave Airlie <airlied@redhat.com>
Fri, 22 Feb 2013 00:15:48 +0000 (10:15 +1000)
commit907a773ba365daa9f86c6bb8cb11ddbf9b11a3d1
tree0e4351332f02236b63ddfdceae64441baa323b6btree | snapshot
parentca18e1426bb2db987b67030256477c9571aebd09commit | diff
gma500: Fix n, m1 and m2 clock limits for sdvo and lvds

The values of n, m1 and m2 needs to be subtracted by 2 before writing them to
the FP register. The dot clock calculation already thinks of these values in
register form so we must also specify them as such.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/gma500/psb_intel_display.c diff | blob | history
RDMA kernel development